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1 /*
2  * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
3  * Copyright (C) 2007, Jes Sorensen <jes@sgi.com> SGI.
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful, but
11  * WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13  * NON INFRINGEMENT.  See the GNU General Public License for more
14  * details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19  */
20 /*P:450
21  * This file contains the x86-specific lguest code.  It used to be all
22  * mixed in with drivers/lguest/core.c but several foolhardy code slashers
23  * wrestled most of the dependencies out to here in preparation for porting
24  * lguest to other architectures (see what I mean by foolhardy?).
25  *
26  * This also contains a couple of non-obvious setup and teardown pieces which
27  * were implemented after days of debugging pain.
28 :*/
29 #include <linux/kernel.h>
30 #include <linux/start_kernel.h>
31 #include <linux/string.h>
32 #include <linux/console.h>
33 #include <linux/screen_info.h>
34 #include <linux/irq.h>
35 #include <linux/interrupt.h>
36 #include <linux/clocksource.h>
37 #include <linux/clockchips.h>
38 #include <linux/cpu.h>
39 #include <linux/lguest.h>
40 #include <linux/lguest_launcher.h>
41 #include <asm/paravirt.h>
42 #include <asm/param.h>
43 #include <asm/page.h>
44 #include <asm/pgtable.h>
45 #include <asm/desc.h>
46 #include <asm/setup.h>
47 #include <asm/lguest.h>
48 #include <asm/uaccess.h>
49 #include <asm/fpu/internal.h>
50 #include <asm/tlbflush.h>
51 #include "../lg.h"
52 
53 static int cpu_had_pge;
54 
55 static struct {
56 	unsigned long offset;
57 	unsigned short segment;
58 } lguest_entry;
59 
60 /* Offset from where switcher.S was compiled to where we've copied it */
switcher_offset(void)61 static unsigned long switcher_offset(void)
62 {
63 	return switcher_addr - (unsigned long)start_switcher_text;
64 }
65 
66 /* This cpu's struct lguest_pages (after the Switcher text page) */
lguest_pages(unsigned int cpu)67 static struct lguest_pages *lguest_pages(unsigned int cpu)
68 {
69 	return &(((struct lguest_pages *)(switcher_addr + PAGE_SIZE))[cpu]);
70 }
71 
72 static DEFINE_PER_CPU(struct lg_cpu *, lg_last_cpu);
73 
74 /*S:010
75  * We approach the Switcher.
76  *
77  * Remember that each CPU has two pages which are visible to the Guest when it
78  * runs on that CPU.  This has to contain the state for that Guest: we copy the
79  * state in just before we run the Guest.
80  *
81  * Each Guest has "changed" flags which indicate what has changed in the Guest
82  * since it last ran.  We saw this set in interrupts_and_traps.c and
83  * segments.c.
84  */
copy_in_guest_info(struct lg_cpu * cpu,struct lguest_pages * pages)85 static void copy_in_guest_info(struct lg_cpu *cpu, struct lguest_pages *pages)
86 {
87 	/*
88 	 * Copying all this data can be quite expensive.  We usually run the
89 	 * same Guest we ran last time (and that Guest hasn't run anywhere else
90 	 * meanwhile).  If that's not the case, we pretend everything in the
91 	 * Guest has changed.
92 	 */
93 	if (__this_cpu_read(lg_last_cpu) != cpu || cpu->last_pages != pages) {
94 		__this_cpu_write(lg_last_cpu, cpu);
95 		cpu->last_pages = pages;
96 		cpu->changed = CHANGED_ALL;
97 	}
98 
99 	/*
100 	 * These copies are pretty cheap, so we do them unconditionally: */
101 	/* Save the current Host top-level page directory.
102 	 */
103 	pages->state.host_cr3 = __pa(current->mm->pgd);
104 	/*
105 	 * Set up the Guest's page tables to see this CPU's pages (and no
106 	 * other CPU's pages).
107 	 */
108 	map_switcher_in_guest(cpu, pages);
109 	/*
110 	 * Set up the two "TSS" members which tell the CPU what stack to use
111 	 * for traps which do directly into the Guest (ie. traps at privilege
112 	 * level 1).
113 	 */
114 	pages->state.guest_tss.sp1 = cpu->esp1;
115 	pages->state.guest_tss.ss1 = cpu->ss1;
116 
117 	/* Copy direct-to-Guest trap entries. */
118 	if (cpu->changed & CHANGED_IDT)
119 		copy_traps(cpu, pages->state.guest_idt, default_idt_entries);
120 
121 	/* Copy all GDT entries which the Guest can change. */
122 	if (cpu->changed & CHANGED_GDT)
123 		copy_gdt(cpu, pages->state.guest_gdt);
124 	/* If only the TLS entries have changed, copy them. */
125 	else if (cpu->changed & CHANGED_GDT_TLS)
126 		copy_gdt_tls(cpu, pages->state.guest_gdt);
127 
128 	/* Mark the Guest as unchanged for next time. */
129 	cpu->changed = 0;
130 }
131 
132 /* Finally: the code to actually call into the Switcher to run the Guest. */
run_guest_once(struct lg_cpu * cpu,struct lguest_pages * pages)133 static void run_guest_once(struct lg_cpu *cpu, struct lguest_pages *pages)
134 {
135 	/* This is a dummy value we need for GCC's sake. */
136 	unsigned int clobber;
137 
138 	/*
139 	 * Copy the guest-specific information into this CPU's "struct
140 	 * lguest_pages".
141 	 */
142 	copy_in_guest_info(cpu, pages);
143 
144 	/*
145 	 * Set the trap number to 256 (impossible value).  If we fault while
146 	 * switching to the Guest (bad segment registers or bug), this will
147 	 * cause us to abort the Guest.
148 	 */
149 	cpu->regs->trapnum = 256;
150 
151 	/*
152 	 * Now: we push the "eflags" register on the stack, then do an "lcall".
153 	 * This is how we change from using the kernel code segment to using
154 	 * the dedicated lguest code segment, as well as jumping into the
155 	 * Switcher.
156 	 *
157 	 * The lcall also pushes the old code segment (KERNEL_CS) onto the
158 	 * stack, then the address of this call.  This stack layout happens to
159 	 * exactly match the stack layout created by an interrupt...
160 	 */
161 	asm volatile("pushf; lcall *%4"
162 		     /*
163 		      * This is how we tell GCC that %eax ("a") and %ebx ("b")
164 		      * are changed by this routine.  The "=" means output.
165 		      */
166 		     : "=a"(clobber), "=b"(clobber)
167 		     /*
168 		      * %eax contains the pages pointer.  ("0" refers to the
169 		      * 0-th argument above, ie "a").  %ebx contains the
170 		      * physical address of the Guest's top-level page
171 		      * directory.
172 		      */
173 		     : "0"(pages),
174 		       "1"(__pa(cpu->lg->pgdirs[cpu->cpu_pgd].pgdir)),
175 		       "m"(lguest_entry)
176 		     /*
177 		      * We tell gcc that all these registers could change,
178 		      * which means we don't have to save and restore them in
179 		      * the Switcher.
180 		      */
181 		     : "memory", "%edx", "%ecx", "%edi", "%esi");
182 }
183 /*:*/
184 
lguest_arch_regptr(struct lg_cpu * cpu,size_t reg_off,bool any)185 unsigned long *lguest_arch_regptr(struct lg_cpu *cpu, size_t reg_off, bool any)
186 {
187 	switch (reg_off) {
188 	case offsetof(struct pt_regs, bx):
189 		return &cpu->regs->ebx;
190 	case offsetof(struct pt_regs, cx):
191 		return &cpu->regs->ecx;
192 	case offsetof(struct pt_regs, dx):
193 		return &cpu->regs->edx;
194 	case offsetof(struct pt_regs, si):
195 		return &cpu->regs->esi;
196 	case offsetof(struct pt_regs, di):
197 		return &cpu->regs->edi;
198 	case offsetof(struct pt_regs, bp):
199 		return &cpu->regs->ebp;
200 	case offsetof(struct pt_regs, ax):
201 		return &cpu->regs->eax;
202 	case offsetof(struct pt_regs, ip):
203 		return &cpu->regs->eip;
204 	case offsetof(struct pt_regs, sp):
205 		return &cpu->regs->esp;
206 	}
207 
208 	/* Launcher can read these, but we don't allow any setting. */
209 	if (any) {
210 		switch (reg_off) {
211 		case offsetof(struct pt_regs, ds):
212 			return &cpu->regs->ds;
213 		case offsetof(struct pt_regs, es):
214 			return &cpu->regs->es;
215 		case offsetof(struct pt_regs, fs):
216 			return &cpu->regs->fs;
217 		case offsetof(struct pt_regs, gs):
218 			return &cpu->regs->gs;
219 		case offsetof(struct pt_regs, cs):
220 			return &cpu->regs->cs;
221 		case offsetof(struct pt_regs, flags):
222 			return &cpu->regs->eflags;
223 		case offsetof(struct pt_regs, ss):
224 			return &cpu->regs->ss;
225 		}
226 	}
227 
228 	return NULL;
229 }
230 
231 /*M:002
232  * There are hooks in the scheduler which we can register to tell when we
233  * get kicked off the CPU (preempt_notifier_register()).  This would allow us
234  * to lazily disable SYSENTER which would regain some performance, and should
235  * also simplify copy_in_guest_info().  Note that we'd still need to restore
236  * things when we exit to Launcher userspace, but that's fairly easy.
237  *
238  * We could also try using these hooks for PGE, but that might be too expensive.
239  *
240  * The hooks were designed for KVM, but we can also put them to good use.
241 :*/
242 
243 /*H:040
244  * This is the i386-specific code to setup and run the Guest.  Interrupts
245  * are disabled: we own the CPU.
246  */
lguest_arch_run_guest(struct lg_cpu * cpu)247 void lguest_arch_run_guest(struct lg_cpu *cpu)
248 {
249 	/*
250 	 * Remember the awfully-named TS bit?  If the Guest has asked to set it
251 	 * we set it now, so we can trap and pass that trap to the Guest if it
252 	 * uses the FPU.
253 	 */
254 	if (cpu->ts && fpregs_active())
255 		stts();
256 
257 	/*
258 	 * SYSENTER is an optimized way of doing system calls.  We can't allow
259 	 * it because it always jumps to privilege level 0.  A normal Guest
260 	 * won't try it because we don't advertise it in CPUID, but a malicious
261 	 * Guest (or malicious Guest userspace program) could, so we tell the
262 	 * CPU to disable it before running the Guest.
263 	 */
264 	if (boot_cpu_has(X86_FEATURE_SEP))
265 		wrmsr(MSR_IA32_SYSENTER_CS, 0, 0);
266 
267 	/*
268 	 * Now we actually run the Guest.  It will return when something
269 	 * interesting happens, and we can examine its registers to see what it
270 	 * was doing.
271 	 */
272 	run_guest_once(cpu, lguest_pages(raw_smp_processor_id()));
273 
274 	/*
275 	 * Note that the "regs" structure contains two extra entries which are
276 	 * not really registers: a trap number which says what interrupt or
277 	 * trap made the switcher code come back, and an error code which some
278 	 * traps set.
279 	 */
280 
281 	 /* Restore SYSENTER if it's supposed to be on. */
282 	 if (boot_cpu_has(X86_FEATURE_SEP))
283 		wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
284 
285 	/* Clear the host TS bit if it was set above. */
286 	if (cpu->ts && fpregs_active())
287 		clts();
288 
289 	/*
290 	 * If the Guest page faulted, then the cr2 register will tell us the
291 	 * bad virtual address.  We have to grab this now, because once we
292 	 * re-enable interrupts an interrupt could fault and thus overwrite
293 	 * cr2, or we could even move off to a different CPU.
294 	 */
295 	if (cpu->regs->trapnum == 14)
296 		cpu->arch.last_pagefault = read_cr2();
297 	/*
298 	 * Similarly, if we took a trap because the Guest used the FPU,
299 	 * we have to restore the FPU it expects to see.
300 	 * fpu__restore() may sleep and we may even move off to
301 	 * a different CPU. So all the critical stuff should be done
302 	 * before this.
303 	 */
304 	else if (cpu->regs->trapnum == 7 && !fpregs_active())
305 		fpu__restore(&current->thread.fpu);
306 }
307 
308 /*H:130
309  * Now we've examined the hypercall code; our Guest can make requests.
310  * Our Guest is usually so well behaved; it never tries to do things it isn't
311  * allowed to, and uses hypercalls instead.  Unfortunately, Linux's paravirtual
312  * infrastructure isn't quite complete, because it doesn't contain replacements
313  * for the Intel I/O instructions.  As a result, the Guest sometimes fumbles
314  * across one during the boot process as it probes for various things which are
315  * usually attached to a PC.
316  *
317  * When the Guest uses one of these instructions, we get a trap (General
318  * Protection Fault) and come here.  We queue this to be sent out to the
319  * Launcher to handle.
320  */
321 
322 /*
323  * The eip contains the *virtual* address of the Guest's instruction:
324  * we copy the instruction here so the Launcher doesn't have to walk
325  * the page tables to decode it.  We handle the case (eg. in a kernel
326  * module) where the instruction is over two pages, and the pages are
327  * virtually but not physically contiguous.
328  *
329  * The longest possible x86 instruction is 15 bytes, but we don't handle
330  * anything that strange.
331  */
copy_from_guest(struct lg_cpu * cpu,void * dst,unsigned long vaddr,size_t len)332 static void copy_from_guest(struct lg_cpu *cpu,
333 			    void *dst, unsigned long vaddr, size_t len)
334 {
335 	size_t to_page_end = PAGE_SIZE - (vaddr % PAGE_SIZE);
336 	unsigned long paddr;
337 
338 	BUG_ON(len > PAGE_SIZE);
339 
340 	/* If it goes over a page, copy in two parts. */
341 	if (len > to_page_end) {
342 		/* But make sure the next page is mapped! */
343 		if (__guest_pa(cpu, vaddr + to_page_end, &paddr))
344 			copy_from_guest(cpu, dst + to_page_end,
345 					vaddr + to_page_end,
346 					len - to_page_end);
347 		else
348 			/* Otherwise fill with zeroes. */
349 			memset(dst + to_page_end, 0, len - to_page_end);
350 		len = to_page_end;
351 	}
352 
353 	/* This will kill the guest if it isn't mapped, but that
354 	 * shouldn't happen. */
355 	__lgread(cpu, dst, guest_pa(cpu, vaddr), len);
356 }
357 
358 
setup_emulate_insn(struct lg_cpu * cpu)359 static void setup_emulate_insn(struct lg_cpu *cpu)
360 {
361 	cpu->pending.trap = 13;
362 	copy_from_guest(cpu, cpu->pending.insn, cpu->regs->eip,
363 			sizeof(cpu->pending.insn));
364 }
365 
setup_iomem_insn(struct lg_cpu * cpu,unsigned long iomem_addr)366 static void setup_iomem_insn(struct lg_cpu *cpu, unsigned long iomem_addr)
367 {
368 	cpu->pending.trap = 14;
369 	cpu->pending.addr = iomem_addr;
370 	copy_from_guest(cpu, cpu->pending.insn, cpu->regs->eip,
371 			sizeof(cpu->pending.insn));
372 }
373 
374 /*H:050 Once we've re-enabled interrupts, we look at why the Guest exited. */
lguest_arch_handle_trap(struct lg_cpu * cpu)375 void lguest_arch_handle_trap(struct lg_cpu *cpu)
376 {
377 	unsigned long iomem_addr;
378 
379 	switch (cpu->regs->trapnum) {
380 	case 13: /* We've intercepted a General Protection Fault. */
381 		/* Hand to Launcher to emulate those pesky IN and OUT insns */
382 		if (cpu->regs->errcode == 0) {
383 			setup_emulate_insn(cpu);
384 			return;
385 		}
386 		break;
387 	case 14: /* We've intercepted a Page Fault. */
388 		/*
389 		 * The Guest accessed a virtual address that wasn't mapped.
390 		 * This happens a lot: we don't actually set up most of the page
391 		 * tables for the Guest at all when we start: as it runs it asks
392 		 * for more and more, and we set them up as required. In this
393 		 * case, we don't even tell the Guest that the fault happened.
394 		 *
395 		 * The errcode tells whether this was a read or a write, and
396 		 * whether kernel or userspace code.
397 		 */
398 		if (demand_page(cpu, cpu->arch.last_pagefault,
399 				cpu->regs->errcode, &iomem_addr))
400 			return;
401 
402 		/* Was this an access to memory mapped IO? */
403 		if (iomem_addr) {
404 			/* Tell Launcher, let it handle it. */
405 			setup_iomem_insn(cpu, iomem_addr);
406 			return;
407 		}
408 
409 		/*
410 		 * OK, it's really not there (or not OK): the Guest needs to
411 		 * know.  We write out the cr2 value so it knows where the
412 		 * fault occurred.
413 		 *
414 		 * Note that if the Guest were really messed up, this could
415 		 * happen before it's done the LHCALL_LGUEST_INIT hypercall, so
416 		 * lg->lguest_data could be NULL
417 		 */
418 		if (cpu->lg->lguest_data &&
419 		    put_user(cpu->arch.last_pagefault,
420 			     &cpu->lg->lguest_data->cr2))
421 			kill_guest(cpu, "Writing cr2");
422 		break;
423 	case 7: /* We've intercepted a Device Not Available fault. */
424 		/*
425 		 * If the Guest doesn't want to know, we already restored the
426 		 * Floating Point Unit, so we just continue without telling it.
427 		 */
428 		if (!cpu->ts)
429 			return;
430 		break;
431 	case 32 ... 255:
432 		/*
433 		 * These values mean a real interrupt occurred, in which case
434 		 * the Host handler has already been run. We just do a
435 		 * friendly check if another process should now be run, then
436 		 * return to run the Guest again.
437 		 */
438 		cond_resched();
439 		return;
440 	case LGUEST_TRAP_ENTRY:
441 		/*
442 		 * Our 'struct hcall_args' maps directly over our regs: we set
443 		 * up the pointer now to indicate a hypercall is pending.
444 		 */
445 		cpu->hcall = (struct hcall_args *)cpu->regs;
446 		return;
447 	}
448 
449 	/* We didn't handle the trap, so it needs to go to the Guest. */
450 	if (!deliver_trap(cpu, cpu->regs->trapnum))
451 		/*
452 		 * If the Guest doesn't have a handler (either it hasn't
453 		 * registered any yet, or it's one of the faults we don't let
454 		 * it handle), it dies with this cryptic error message.
455 		 */
456 		kill_guest(cpu, "unhandled trap %li at %#lx (%#lx)",
457 			   cpu->regs->trapnum, cpu->regs->eip,
458 			   cpu->regs->trapnum == 14 ? cpu->arch.last_pagefault
459 			   : cpu->regs->errcode);
460 }
461 
462 /*
463  * Now we can look at each of the routines this calls, in increasing order of
464  * complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
465  * deliver_trap() and demand_page().  After all those, we'll be ready to
466  * examine the Switcher, and our philosophical understanding of the Host/Guest
467  * duality will be complete.
468 :*/
adjust_pge(void * on)469 static void adjust_pge(void *on)
470 {
471 	if (on)
472 		cr4_set_bits(X86_CR4_PGE);
473 	else
474 		cr4_clear_bits(X86_CR4_PGE);
475 }
476 
477 /*H:020
478  * Now the Switcher is mapped and every thing else is ready, we need to do
479  * some more i386-specific initialization.
480  */
lguest_arch_host_init(void)481 void __init lguest_arch_host_init(void)
482 {
483 	int i;
484 
485 	/*
486 	 * Most of the x86/switcher_32.S doesn't care that it's been moved; on
487 	 * Intel, jumps are relative, and it doesn't access any references to
488 	 * external code or data.
489 	 *
490 	 * The only exception is the interrupt handlers in switcher.S: their
491 	 * addresses are placed in a table (default_idt_entries), so we need to
492 	 * update the table with the new addresses.  switcher_offset() is a
493 	 * convenience function which returns the distance between the
494 	 * compiled-in switcher code and the high-mapped copy we just made.
495 	 */
496 	for (i = 0; i < IDT_ENTRIES; i++)
497 		default_idt_entries[i] += switcher_offset();
498 
499 	/*
500 	 * Set up the Switcher's per-cpu areas.
501 	 *
502 	 * Each CPU gets two pages of its own within the high-mapped region
503 	 * (aka. "struct lguest_pages").  Much of this can be initialized now,
504 	 * but some depends on what Guest we are running (which is set up in
505 	 * copy_in_guest_info()).
506 	 */
507 	for_each_possible_cpu(i) {
508 		/* lguest_pages() returns this CPU's two pages. */
509 		struct lguest_pages *pages = lguest_pages(i);
510 		/* This is a convenience pointer to make the code neater. */
511 		struct lguest_ro_state *state = &pages->state;
512 
513 		/*
514 		 * The Global Descriptor Table: the Host has a different one
515 		 * for each CPU.  We keep a descriptor for the GDT which says
516 		 * where it is and how big it is (the size is actually the last
517 		 * byte, not the size, hence the "-1").
518 		 */
519 		state->host_gdt_desc.size = GDT_SIZE-1;
520 		state->host_gdt_desc.address = (long)get_cpu_gdt_table(i);
521 
522 		/*
523 		 * All CPUs on the Host use the same Interrupt Descriptor
524 		 * Table, so we just use store_idt(), which gets this CPU's IDT
525 		 * descriptor.
526 		 */
527 		store_idt(&state->host_idt_desc);
528 
529 		/*
530 		 * The descriptors for the Guest's GDT and IDT can be filled
531 		 * out now, too.  We copy the GDT & IDT into ->guest_gdt and
532 		 * ->guest_idt before actually running the Guest.
533 		 */
534 		state->guest_idt_desc.size = sizeof(state->guest_idt)-1;
535 		state->guest_idt_desc.address = (long)&state->guest_idt;
536 		state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1;
537 		state->guest_gdt_desc.address = (long)&state->guest_gdt;
538 
539 		/*
540 		 * We know where we want the stack to be when the Guest enters
541 		 * the Switcher: in pages->regs.  The stack grows upwards, so
542 		 * we start it at the end of that structure.
543 		 */
544 		state->guest_tss.sp0 = (long)(&pages->regs + 1);
545 		/*
546 		 * And this is the GDT entry to use for the stack: we keep a
547 		 * couple of special LGUEST entries.
548 		 */
549 		state->guest_tss.ss0 = LGUEST_DS;
550 
551 		/*
552 		 * x86 can have a finegrained bitmap which indicates what I/O
553 		 * ports the process can use.  We set it to the end of our
554 		 * structure, meaning "none".
555 		 */
556 		state->guest_tss.io_bitmap_base = sizeof(state->guest_tss);
557 
558 		/*
559 		 * Some GDT entries are the same across all Guests, so we can
560 		 * set them up now.
561 		 */
562 		setup_default_gdt_entries(state);
563 		/* Most IDT entries are the same for all Guests, too.*/
564 		setup_default_idt_entries(state, default_idt_entries);
565 
566 		/*
567 		 * The Host needs to be able to use the LGUEST segments on this
568 		 * CPU, too, so put them in the Host GDT.
569 		 */
570 		get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
571 		get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
572 	}
573 
574 	/*
575 	 * In the Switcher, we want the %cs segment register to use the
576 	 * LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
577 	 * it will be undisturbed when we switch.  To change %cs and jump we
578 	 * need this structure to feed to Intel's "lcall" instruction.
579 	 */
580 	lguest_entry.offset = (long)switch_to_guest + switcher_offset();
581 	lguest_entry.segment = LGUEST_CS;
582 
583 	/*
584 	 * Finally, we need to turn off "Page Global Enable".  PGE is an
585 	 * optimization where page table entries are specially marked to show
586 	 * they never change.  The Host kernel marks all the kernel pages this
587 	 * way because it's always present, even when userspace is running.
588 	 *
589 	 * Lguest breaks this: unbeknownst to the rest of the Host kernel, we
590 	 * switch to the Guest kernel.  If you don't disable this on all CPUs,
591 	 * you'll get really weird bugs that you'll chase for two days.
592 	 *
593 	 * I used to turn PGE off every time we switched to the Guest and back
594 	 * on when we return, but that slowed the Switcher down noticibly.
595 	 */
596 
597 	/*
598 	 * We don't need the complexity of CPUs coming and going while we're
599 	 * doing this.
600 	 */
601 	get_online_cpus();
602 	if (cpu_has_pge) { /* We have a broader idea of "global". */
603 		/* Remember that this was originally set (for cleanup). */
604 		cpu_had_pge = 1;
605 		/*
606 		 * adjust_pge is a helper function which sets or unsets the PGE
607 		 * bit on its CPU, depending on the argument (0 == unset).
608 		 */
609 		on_each_cpu(adjust_pge, (void *)0, 1);
610 		/* Turn off the feature in the global feature set. */
611 		clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE);
612 	}
613 	put_online_cpus();
614 }
615 /*:*/
616 
lguest_arch_host_fini(void)617 void __exit lguest_arch_host_fini(void)
618 {
619 	/* If we had PGE before we started, turn it back on now. */
620 	get_online_cpus();
621 	if (cpu_had_pge) {
622 		set_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE);
623 		/* adjust_pge's argument "1" means set PGE. */
624 		on_each_cpu(adjust_pge, (void *)1, 1);
625 	}
626 	put_online_cpus();
627 }
628 
629 
630 /*H:122 The i386-specific hypercalls simply farm out to the right functions. */
lguest_arch_do_hcall(struct lg_cpu * cpu,struct hcall_args * args)631 int lguest_arch_do_hcall(struct lg_cpu *cpu, struct hcall_args *args)
632 {
633 	switch (args->arg0) {
634 	case LHCALL_LOAD_GDT_ENTRY:
635 		load_guest_gdt_entry(cpu, args->arg1, args->arg2, args->arg3);
636 		break;
637 	case LHCALL_LOAD_IDT_ENTRY:
638 		load_guest_idt_entry(cpu, args->arg1, args->arg2, args->arg3);
639 		break;
640 	case LHCALL_LOAD_TLS:
641 		guest_load_tls(cpu, args->arg1);
642 		break;
643 	default:
644 		/* Bad Guest.  Bad! */
645 		return -EIO;
646 	}
647 	return 0;
648 }
649 
650 /*H:126 i386-specific hypercall initialization: */
lguest_arch_init_hypercalls(struct lg_cpu * cpu)651 int lguest_arch_init_hypercalls(struct lg_cpu *cpu)
652 {
653 	u32 tsc_speed;
654 
655 	/*
656 	 * The pointer to the Guest's "struct lguest_data" is the only argument.
657 	 * We check that address now.
658 	 */
659 	if (!lguest_address_ok(cpu->lg, cpu->hcall->arg1,
660 			       sizeof(*cpu->lg->lguest_data)))
661 		return -EFAULT;
662 
663 	/*
664 	 * Having checked it, we simply set lg->lguest_data to point straight
665 	 * into the Launcher's memory at the right place and then use
666 	 * copy_to_user/from_user from now on, instead of lgread/write.  I put
667 	 * this in to show that I'm not immune to writing stupid
668 	 * optimizations.
669 	 */
670 	cpu->lg->lguest_data = cpu->lg->mem_base + cpu->hcall->arg1;
671 
672 	/*
673 	 * We insist that the Time Stamp Counter exist and doesn't change with
674 	 * cpu frequency.  Some devious chip manufacturers decided that TSC
675 	 * changes could be handled in software.  I decided that time going
676 	 * backwards might be good for benchmarks, but it's bad for users.
677 	 *
678 	 * We also insist that the TSC be stable: the kernel detects unreliable
679 	 * TSCs for its own purposes, and we use that here.
680 	 */
681 	if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && !check_tsc_unstable())
682 		tsc_speed = tsc_khz;
683 	else
684 		tsc_speed = 0;
685 	if (put_user(tsc_speed, &cpu->lg->lguest_data->tsc_khz))
686 		return -EFAULT;
687 
688 	/* The interrupt code might not like the system call vector. */
689 	if (!check_syscall_vector(cpu->lg))
690 		kill_guest(cpu, "bad syscall vector");
691 
692 	return 0;
693 }
694 /*:*/
695 
696 /*L:030
697  * Most of the Guest's registers are left alone: we used get_zeroed_page() to
698  * allocate the structure, so they will be 0.
699  */
lguest_arch_setup_regs(struct lg_cpu * cpu,unsigned long start)700 void lguest_arch_setup_regs(struct lg_cpu *cpu, unsigned long start)
701 {
702 	struct lguest_regs *regs = cpu->regs;
703 
704 	/*
705 	 * There are four "segment" registers which the Guest needs to boot:
706 	 * The "code segment" register (cs) refers to the kernel code segment
707 	 * __KERNEL_CS, and the "data", "extra" and "stack" segment registers
708 	 * refer to the kernel data segment __KERNEL_DS.
709 	 *
710 	 * The privilege level is packed into the lower bits.  The Guest runs
711 	 * at privilege level 1 (GUEST_PL).
712 	 */
713 	regs->ds = regs->es = regs->ss = __KERNEL_DS|GUEST_PL;
714 	regs->cs = __KERNEL_CS|GUEST_PL;
715 
716 	/*
717 	 * The "eflags" register contains miscellaneous flags.  Bit 1 (0x002)
718 	 * is supposed to always be "1".  Bit 9 (0x200) controls whether
719 	 * interrupts are enabled.  We always leave interrupts enabled while
720 	 * running the Guest.
721 	 */
722 	regs->eflags = X86_EFLAGS_IF | X86_EFLAGS_FIXED;
723 
724 	/*
725 	 * The "Extended Instruction Pointer" register says where the Guest is
726 	 * running.
727 	 */
728 	regs->eip = start;
729 
730 	/*
731 	 * %esi points to our boot information, at physical address 0, so don't
732 	 * touch it.
733 	 */
734 
735 	/* There are a couple of GDT entries the Guest expects at boot. */
736 	setup_guest_gdt(cpu);
737 }
738