| /arch/arc/include/asm/ |
| D | barrier.h | 29 #define mb() asm volatile("dmb 3\n" : : : "memory") macro
43 #define mb() asm volatile("sync\n" : : : "memory") macro
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| /arch/arm64/include/asm/ |
| D | atomic_lse.h | 78 #define ATOMIC_OP_ADD_RETURN(name, mb, cl...) \ argument
139 #define ATOMIC_OP_SUB_RETURN(name, mb, cl...) \ argument
219 #define ATOMIC64_OP_ADD_RETURN(name, mb, cl...) \ argument
280 #define ATOMIC64_OP_SUB_RETURN(name, mb, cl...) \ argument
342 #define __CMPXCHG_CASE(w, sz, name, mb, cl...) \ argument
389 #define __CMPXCHG_DBL(name, mb, cl...) \ argument
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| D | atomic_ll_sc.h | 58 #define ATOMIC_OP_RETURN(name, mb, acq, rel, cl, op, asm_op) \ argument
121 #define ATOMIC64_OP_RETURN(name, mb, acq, rel, cl, op, asm_op) \ argument
189 #define __CMPXCHG_CASE(w, sz, name, mb, acq, rel, cl) \ argument
235 #define __CMPXCHG_DBL(name, mb, rel, cl) \ argument
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| D | barrier.h | 34 #define mb() dsb(sy) macro
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| /arch/parisc/include/asm/ |
| D | barrier.h | 12 #define mb() do { synchronize_caches(); } while (0) macro
18 #define mb() barrier() macro
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| /arch/x86/um/asm/ |
| D | barrier.h | 20 #define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2) macro
26 #define mb() asm volatile("mfence" : : : "memory") macro
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| /arch/openrisc/include/asm/ |
| D | barrier.h | 5 #define mb() asm volatile ("l.msync" ::: "memory") macro
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| /arch/arm/mach-realview/include/mach/ |
| D | barriers.h | 6 #define mb() dsb() macro
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| /arch/frv/include/asm/ |
| D | barrier.h | 17 #define mb() asm volatile ("membar" : : :"memory") macro
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| /arch/xtensa/include/asm/ |
| D | barrier.h | 12 #define mb() ({ __asm__ __volatile__("memw" : : : "memory"); }) macro
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| /arch/alpha/include/asm/ |
| D | barrier.h | 6 #define mb() __asm__ __volatile__("mb": : :"memory") macro
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| /arch/blackfin/include/asm/ |
| D | barrier.h | 22 # define mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0) macro
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| /arch/sh/include/asm/ |
| D | barrier.h | 27 #define mb() __asm__ __volatile__ ("synco": : :"memory") macro
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| /arch/x86/include/asm/ |
| D | barrier.h | 18 #define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2) macro
22 #define mb() asm volatile("mfence":::"memory") macro
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| /arch/mips/include/asm/ |
| D | barrier.h | 78 #define mb() wbflush() macro
83 #define mb() fast_mb() macro
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| /arch/tile/include/asm/ |
| D | barrier.h | 72 #define mb() fast_mb() macro
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| /arch/ia64/include/asm/ |
| D | barrier.h | 38 #define mb() ia64_mf() macro
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| /arch/sparc/include/asm/ |
| D | barrier_64.h | 36 #define mb() membar_safe("#StoreLoad") macro
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| /arch/arm/include/asm/ |
| D | barrier.h | 65 #define mb() __arm_heavy_mb() macro
71 #define mb() barrier() macro
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| /arch/s390/include/asm/ |
| D | barrier.h | 23 #define mb() do { asm volatile(__ASM_BARRIER : : : "memory"); } while (0) macro
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| /arch/powerpc/include/asm/ |
| D | barrier.h | 33 #define mb() __asm__ __volatile__ ("sync" : : : "memory") macro
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| /arch/metag/include/asm/ |
| D | barrier.h | 43 #define mb() wr_fence() macro
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| /arch/powerpc/lib/ |
| D | sstep.c | 623 #define MASK32(mb, me) ((0xffffffffUL >> (mb)) + \ argument
626 #define MASK64_L(mb) (~0UL >> (mb)) argument
628 #define MASK64(mb, me) (MASK64_L(mb) + MASK64_R(me) + ((me) >= (mb))) argument
648 unsigned int mb, me, sh; in analyse_instr() local
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| /arch/powerpc/mm/ |
| D | ppc_mmu_32.c | 182 unsigned int hmask, mb, mb2; in MMU_init_hw() local
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| /arch/x86/mm/ |
| D | numa.c | 481 struct numa_memblk *mb = &numa_meminfo.blk[i]; in numa_clear_kernel_node_hotplug() local
523 struct numa_memblk *mb = &mi->blk[i]; in numa_register_memblks() local
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