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1 /*
2  * Default clock type
3  *
4  * Copyright (C) 2005-2008, 2015 Texas Instruments, Inc.
5  * Copyright (C) 2004-2010 Nokia Corporation
6  *
7  * Contacts:
8  * Richard Woodruff <r-woodruff2@ti.com>
9  * Paul Walmsley
10  * Tero Kristo <t-kristo@ti.com>
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License version 2 as
14  * published by the Free Software Foundation.
15  *
16  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
17  * kind, whether express or implied; without even the implied warranty
18  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  * GNU General Public License for more details.
20  */
21 
22 #include <linux/kernel.h>
23 #include <linux/errno.h>
24 #include <linux/clk-provider.h>
25 #include <linux/io.h>
26 #include <linux/clk/ti.h>
27 #include <linux/delay.h>
28 
29 #include "clock.h"
30 
31 /*
32  * MAX_MODULE_ENABLE_WAIT: maximum of number of microseconds to wait
33  * for a module to indicate that it is no longer in idle
34  */
35 #define MAX_MODULE_ENABLE_WAIT		100000
36 
37 /*
38  * CM module register offsets, used for calculating the companion
39  * register addresses.
40  */
41 #define CM_FCLKEN			0x0000
42 #define CM_ICLKEN			0x0010
43 
44 /**
45  * _wait_idlest_generic - wait for a module to leave the idle state
46  * @clk: module clock to wait for (needed for register offsets)
47  * @reg: virtual address of module IDLEST register
48  * @mask: value to mask against to determine if the module is active
49  * @idlest: idle state indicator (0 or 1) for the clock
50  * @name: name of the clock (for printk)
51  *
52  * Wait for a module to leave idle, where its idle-status register is
53  * not inside the CM module.  Returns 1 if the module left idle
54  * promptly, or 0 if the module did not leave idle before the timeout
55  * elapsed.  XXX Deprecated - should be moved into drivers for the
56  * individual IP block that the IDLEST register exists in.
57  */
_wait_idlest_generic(struct clk_hw_omap * clk,void __iomem * reg,u32 mask,u8 idlest,const char * name)58 static int _wait_idlest_generic(struct clk_hw_omap *clk, void __iomem *reg,
59 				u32 mask, u8 idlest, const char *name)
60 {
61 	int i = 0, ena = 0;
62 
63 	ena = (idlest) ? 0 : mask;
64 
65 	/* Wait until module enters enabled state */
66 	for (i = 0; i < MAX_MODULE_ENABLE_WAIT; i++) {
67 		if ((ti_clk_ll_ops->clk_readl(reg) & mask) == ena)
68 			break;
69 		udelay(1);
70 	}
71 
72 	if (i < MAX_MODULE_ENABLE_WAIT)
73 		pr_debug("omap clock: module associated with clock %s ready after %d loops\n",
74 			 name, i);
75 	else
76 		pr_err("omap clock: module associated with clock %s didn't enable in %d tries\n",
77 		       name, MAX_MODULE_ENABLE_WAIT);
78 
79 	return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0;
80 }
81 
82 /**
83  * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE
84  * @clk: struct clk * belonging to the module
85  *
86  * If the necessary clocks for the OMAP hardware IP block that
87  * corresponds to clock @clk are enabled, then wait for the module to
88  * indicate readiness (i.e., to leave IDLE).  This code does not
89  * belong in the clock code and will be moved in the medium term to
90  * module-dependent code.  No return value.
91  */
_omap2_module_wait_ready(struct clk_hw_omap * clk)92 static void _omap2_module_wait_ready(struct clk_hw_omap *clk)
93 {
94 	void __iomem *companion_reg, *idlest_reg;
95 	u8 other_bit, idlest_bit, idlest_val, idlest_reg_id;
96 	s16 prcm_mod;
97 	int r;
98 
99 	/* Not all modules have multiple clocks that their IDLEST depends on */
100 	if (clk->ops->find_companion) {
101 		clk->ops->find_companion(clk, &companion_reg, &other_bit);
102 		if (!(ti_clk_ll_ops->clk_readl(companion_reg) &
103 		      (1 << other_bit)))
104 			return;
105 	}
106 
107 	clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val);
108 	r = ti_clk_ll_ops->cm_split_idlest_reg(idlest_reg, &prcm_mod,
109 					       &idlest_reg_id);
110 	if (r) {
111 		/* IDLEST register not in the CM module */
112 		_wait_idlest_generic(clk, idlest_reg, (1 << idlest_bit),
113 				     idlest_val, clk_hw_get_name(&clk->hw));
114 	} else {
115 		ti_clk_ll_ops->cm_wait_module_ready(0, prcm_mod, idlest_reg_id,
116 						    idlest_bit);
117 	}
118 }
119 
120 /**
121  * omap2_clk_dflt_find_companion - find companion clock to @clk
122  * @clk: struct clk * to find the companion clock of
123  * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
124  * @other_bit: u8 ** to return the companion clock bit shift in
125  *
126  * Note: We don't need special code here for INVERT_ENABLE for the
127  * time being since INVERT_ENABLE only applies to clocks enabled by
128  * CM_CLKEN_PLL
129  *
130  * Convert CM_ICLKEN* <-> CM_FCLKEN*.  This conversion assumes it's
131  * just a matter of XORing the bits.
132  *
133  * Some clocks don't have companion clocks.  For example, modules with
134  * only an interface clock (such as MAILBOXES) don't have a companion
135  * clock.  Right now, this code relies on the hardware exporting a bit
136  * in the correct companion register that indicates that the
137  * nonexistent 'companion clock' is active.  Future patches will
138  * associate this type of code with per-module data structures to
139  * avoid this issue, and remove the casts.  No return value.
140  */
omap2_clk_dflt_find_companion(struct clk_hw_omap * clk,void __iomem ** other_reg,u8 * other_bit)141 void omap2_clk_dflt_find_companion(struct clk_hw_omap *clk,
142 				   void __iomem **other_reg, u8 *other_bit)
143 {
144 	u32 r;
145 
146 	/*
147 	 * Convert CM_ICLKEN* <-> CM_FCLKEN*.  This conversion assumes
148 	 * it's just a matter of XORing the bits.
149 	 */
150 	r = ((__force u32)clk->enable_reg ^ (CM_FCLKEN ^ CM_ICLKEN));
151 
152 	*other_reg = (__force void __iomem *)r;
153 	*other_bit = clk->enable_bit;
154 }
155 
156 /**
157  * omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk
158  * @clk: struct clk * to find IDLEST info for
159  * @idlest_reg: void __iomem ** to return the CM_IDLEST va in
160  * @idlest_bit: u8 * to return the CM_IDLEST bit shift in
161  * @idlest_val: u8 * to return the idle status indicator
162  *
163  * Return the CM_IDLEST register address and bit shift corresponding
164  * to the module that "owns" this clock.  This default code assumes
165  * that the CM_IDLEST bit shift is the CM_*CLKEN bit shift, and that
166  * the IDLEST register address ID corresponds to the CM_*CLKEN
167  * register address ID (e.g., that CM_FCLKEN2 corresponds to
168  * CM_IDLEST2).  This is not true for all modules.  No return value.
169  */
omap2_clk_dflt_find_idlest(struct clk_hw_omap * clk,void __iomem ** idlest_reg,u8 * idlest_bit,u8 * idlest_val)170 void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk,
171 				void __iomem **idlest_reg, u8 *idlest_bit,
172 				u8 *idlest_val)
173 {
174 	u32 r;
175 
176 	r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20);
177 	*idlest_reg = (__force void __iomem *)r;
178 	*idlest_bit = clk->enable_bit;
179 
180 	/*
181 	 * 24xx uses 0 to indicate not ready, and 1 to indicate ready.
182 	 * 34xx reverses this, just to keep us on our toes
183 	 * AM35xx uses both, depending on the module.
184 	 */
185 	*idlest_val = ti_clk_get_features()->cm_idlest_val;
186 }
187 
188 /**
189  * omap2_dflt_clk_enable - enable a clock in the hardware
190  * @hw: struct clk_hw * of the clock to enable
191  *
192  * Enable the clock @hw in the hardware.  We first call into the OMAP
193  * clockdomain code to "enable" the corresponding clockdomain if this
194  * is the first enabled user of the clockdomain.  Then program the
195  * hardware to enable the clock.  Then wait for the IP block that uses
196  * this clock to leave idle (if applicable).  Returns the error value
197  * from clkdm_clk_enable() if it terminated with an error, or -EINVAL
198  * if @hw has a null clock enable_reg, or zero upon success.
199  */
omap2_dflt_clk_enable(struct clk_hw * hw)200 int omap2_dflt_clk_enable(struct clk_hw *hw)
201 {
202 	struct clk_hw_omap *clk;
203 	u32 v;
204 	int ret = 0;
205 	bool clkdm_control;
206 
207 	if (ti_clk_get_features()->flags & TI_CLK_DISABLE_CLKDM_CONTROL)
208 		clkdm_control = false;
209 	else
210 		clkdm_control = true;
211 
212 	clk = to_clk_hw_omap(hw);
213 
214 	if (clkdm_control && clk->clkdm) {
215 		ret = ti_clk_ll_ops->clkdm_clk_enable(clk->clkdm, hw->clk);
216 		if (ret) {
217 			WARN(1,
218 			     "%s: could not enable %s's clockdomain %s: %d\n",
219 			     __func__, clk_hw_get_name(hw),
220 			     clk->clkdm_name, ret);
221 			return ret;
222 		}
223 	}
224 
225 	if (unlikely(IS_ERR(clk->enable_reg))) {
226 		pr_err("%s: %s missing enable_reg\n", __func__,
227 		       clk_hw_get_name(hw));
228 		ret = -EINVAL;
229 		goto err;
230 	}
231 
232 	/* FIXME should not have INVERT_ENABLE bit here */
233 	v = ti_clk_ll_ops->clk_readl(clk->enable_reg);
234 	if (clk->flags & INVERT_ENABLE)
235 		v &= ~(1 << clk->enable_bit);
236 	else
237 		v |= (1 << clk->enable_bit);
238 	ti_clk_ll_ops->clk_writel(v, clk->enable_reg);
239 	v = ti_clk_ll_ops->clk_readl(clk->enable_reg); /* OCP barrier */
240 
241 	if (clk->ops && clk->ops->find_idlest)
242 		_omap2_module_wait_ready(clk);
243 
244 	return 0;
245 
246 err:
247 	if (clkdm_control && clk->clkdm)
248 		ti_clk_ll_ops->clkdm_clk_disable(clk->clkdm, hw->clk);
249 	return ret;
250 }
251 
252 /**
253  * omap2_dflt_clk_disable - disable a clock in the hardware
254  * @hw: struct clk_hw * of the clock to disable
255  *
256  * Disable the clock @hw in the hardware, and call into the OMAP
257  * clockdomain code to "disable" the corresponding clockdomain if all
258  * clocks/hwmods in that clockdomain are now disabled.  No return
259  * value.
260  */
omap2_dflt_clk_disable(struct clk_hw * hw)261 void omap2_dflt_clk_disable(struct clk_hw *hw)
262 {
263 	struct clk_hw_omap *clk;
264 	u32 v;
265 
266 	clk = to_clk_hw_omap(hw);
267 	if (IS_ERR(clk->enable_reg)) {
268 		/*
269 		 * 'independent' here refers to a clock which is not
270 		 * controlled by its parent.
271 		 */
272 		pr_err("%s: independent clock %s has no enable_reg\n",
273 		       __func__, clk_hw_get_name(hw));
274 		return;
275 	}
276 
277 	v = ti_clk_ll_ops->clk_readl(clk->enable_reg);
278 	if (clk->flags & INVERT_ENABLE)
279 		v |= (1 << clk->enable_bit);
280 	else
281 		v &= ~(1 << clk->enable_bit);
282 	ti_clk_ll_ops->clk_writel(v, clk->enable_reg);
283 	/* No OCP barrier needed here since it is a disable operation */
284 
285 	if (!(ti_clk_get_features()->flags & TI_CLK_DISABLE_CLKDM_CONTROL) &&
286 	    clk->clkdm)
287 		ti_clk_ll_ops->clkdm_clk_disable(clk->clkdm, hw->clk);
288 }
289 
290 /**
291  * omap2_dflt_clk_is_enabled - is clock enabled in the hardware?
292  * @hw: struct clk_hw * to check
293  *
294  * Return 1 if the clock represented by @hw is enabled in the
295  * hardware, or 0 otherwise.  Intended for use in the struct
296  * clk_ops.is_enabled function pointer.
297  */
omap2_dflt_clk_is_enabled(struct clk_hw * hw)298 int omap2_dflt_clk_is_enabled(struct clk_hw *hw)
299 {
300 	struct clk_hw_omap *clk = to_clk_hw_omap(hw);
301 	u32 v;
302 
303 	v = ti_clk_ll_ops->clk_readl(clk->enable_reg);
304 
305 	if (clk->flags & INVERT_ENABLE)
306 		v ^= BIT(clk->enable_bit);
307 
308 	v &= BIT(clk->enable_bit);
309 
310 	return v ? 1 : 0;
311 }
312 
313 const struct clk_hw_omap_ops clkhwops_wait = {
314 	.find_idlest	= omap2_clk_dflt_find_idlest,
315 	.find_companion	= omap2_clk_dflt_find_companion,
316 };
317