1 /*
2 * (C) 2010,2011 Thomas Renninger <trenn@suse.de>, Novell Inc.
3 *
4 * Licensed under the terms of the GNU GPL License version 2.
5 *
6 * Miscellaneous helpers which do not fit or are worth
7 * to put into separate headers
8 */
9
10 #ifndef __CPUPOWERUTILS_HELPERS__
11 #define __CPUPOWERUTILS_HELPERS__
12
13 #include <libintl.h>
14 #include <locale.h>
15
16 #include "helpers/bitmask.h"
17
18 /* Internationalization ****************************/
19 #ifdef NLS
20
21 #define _(String) gettext(String)
22 #ifndef gettext_noop
23 #define gettext_noop(String) String
24 #endif
25 #define N_(String) gettext_noop(String)
26
27 #else /* !NLS */
28
29 #define _(String) String
30 #define N_(String) String
31
32 #endif
33 /* Internationalization ****************************/
34
35 extern int run_as_root;
36 extern struct bitmask *cpus_chosen;
37
38 /* Global verbose (-d) stuff *********************************/
39 /*
40 * define DEBUG via global Makefile variable
41 * Debug output is sent to stderr, do:
42 * cpupower monitor 2>/tmp/debug
43 * to split debug output away from normal output
44 */
45 #ifdef DEBUG
46 extern int be_verbose;
47
48 #define dprint(fmt, ...) { \
49 if (be_verbose) { \
50 fprintf(stderr, "%s: " fmt, \
51 __func__, ##__VA_ARGS__); \
52 } \
53 }
54 #else
dprint(const char * fmt,...)55 static inline void dprint(const char *fmt, ...) { }
56 #endif
57 extern int be_verbose;
58 /* Global verbose (-v) stuff *********************************/
59
60 /* cpuid and cpuinfo helpers **************************/
61 enum cpupower_cpu_vendor {X86_VENDOR_UNKNOWN = 0, X86_VENDOR_INTEL,
62 X86_VENDOR_AMD, X86_VENDOR_MAX};
63
64 #define CPUPOWER_CAP_INV_TSC 0x00000001
65 #define CPUPOWER_CAP_APERF 0x00000002
66 #define CPUPOWER_CAP_AMD_CBP 0x00000004
67 #define CPUPOWER_CAP_PERF_BIAS 0x00000008
68 #define CPUPOWER_CAP_HAS_TURBO_RATIO 0x00000010
69 #define CPUPOWER_CAP_IS_SNB 0x00000020
70 #define CPUPOWER_CAP_INTEL_IDA 0x00000040
71
72 #define MAX_HW_PSTATES 10
73
74 struct cpupower_cpu_info {
75 enum cpupower_cpu_vendor vendor;
76 unsigned int family;
77 unsigned int model;
78 unsigned int stepping;
79 /* CPU capabilities read out from cpuid */
80 unsigned long long caps;
81 };
82
83 /* get_cpu_info
84 *
85 * Extract CPU vendor, family, model, stepping info from /proc/cpuinfo
86 *
87 * Returns 0 on success or a negativ error code
88 * Only used on x86, below global's struct values are zero/unknown on
89 * other archs
90 */
91 extern int get_cpu_info(unsigned int cpu, struct cpupower_cpu_info *cpu_info);
92 extern struct cpupower_cpu_info cpupower_cpu_info;
93 /* cpuid and cpuinfo helpers **************************/
94
95 struct cpuid_core_info {
96 int pkg;
97 int core;
98 int cpu;
99
100 /* flags */
101 unsigned int is_online:1;
102 };
103
104 /* CPU topology/hierarchy parsing ******************/
105 struct cpupower_topology {
106 /* Amount of CPU cores, packages and threads per core in the system */
107 unsigned int cores;
108 unsigned int pkgs;
109 unsigned int threads; /* per core */
110
111 /* Array gets mallocated with cores entries, holding per core info */
112 struct cpuid_core_info *core_info;
113 };
114
115 extern int get_cpu_topology(struct cpupower_topology *cpu_top);
116 extern void cpu_topology_release(struct cpupower_topology cpu_top);
117
118 /* CPU topology/hierarchy parsing ******************/
119
120 /* X86 ONLY ****************************************/
121 #if defined(__i386__) || defined(__x86_64__)
122
123 #include <pci/pci.h>
124
125 /* Read/Write msr ****************************/
126 extern int read_msr(int cpu, unsigned int idx, unsigned long long *val);
127 extern int write_msr(int cpu, unsigned int idx, unsigned long long val);
128
129 extern int msr_intel_set_perf_bias(unsigned int cpu, unsigned int val);
130 extern int msr_intel_get_perf_bias(unsigned int cpu);
131 extern unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu);
132
133 /* Read/Write msr ****************************/
134
135 /* PCI stuff ****************************/
136 extern int amd_pci_get_num_boost_states(int *active, int *states);
137 extern struct pci_dev *pci_acc_init(struct pci_access **pacc, int domain,
138 int bus, int slot, int func, int vendor,
139 int dev);
140 extern struct pci_dev *pci_slot_func_init(struct pci_access **pacc,
141 int slot, int func);
142
143 /* PCI stuff ****************************/
144
145 /* AMD HW pstate decoding **************************/
146
147 extern int decode_pstates(unsigned int cpu, unsigned int cpu_family,
148 int boost_states, unsigned long *pstates, int *no);
149
150 /* AMD HW pstate decoding **************************/
151
152 extern int cpufreq_has_boost_support(unsigned int cpu, int *support,
153 int *active, int * states);
154 /*
155 * CPUID functions returning a single datum
156 */
157 unsigned int cpuid_eax(unsigned int op);
158 unsigned int cpuid_ebx(unsigned int op);
159 unsigned int cpuid_ecx(unsigned int op);
160 unsigned int cpuid_edx(unsigned int op);
161
162 /* cpuid and cpuinfo helpers **************************/
163 /* X86 ONLY ********************************************/
164 #else
decode_pstates(unsigned int cpu,unsigned int cpu_family,int boost_states,unsigned long * pstates,int * no)165 static inline int decode_pstates(unsigned int cpu, unsigned int cpu_family,
166 int boost_states, unsigned long *pstates,
167 int *no)
168 { return -1; };
169
read_msr(int cpu,unsigned int idx,unsigned long long * val)170 static inline int read_msr(int cpu, unsigned int idx, unsigned long long *val)
171 { return -1; };
write_msr(int cpu,unsigned int idx,unsigned long long val)172 static inline int write_msr(int cpu, unsigned int idx, unsigned long long val)
173 { return -1; };
msr_intel_set_perf_bias(unsigned int cpu,unsigned int val)174 static inline int msr_intel_set_perf_bias(unsigned int cpu, unsigned int val)
175 { return -1; };
msr_intel_get_perf_bias(unsigned int cpu)176 static inline int msr_intel_get_perf_bias(unsigned int cpu)
177 { return -1; };
msr_intel_get_turbo_ratio(unsigned int cpu)178 static inline unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu)
179 { return 0; };
180
181 /* Read/Write msr ****************************/
182
cpufreq_has_boost_support(unsigned int cpu,int * support,int * active,int * states)183 static inline int cpufreq_has_boost_support(unsigned int cpu, int *support,
184 int *active, int * states)
185 { return -1; }
186
187 /* cpuid and cpuinfo helpers **************************/
188
cpuid_eax(unsigned int op)189 static inline unsigned int cpuid_eax(unsigned int op) { return 0; };
cpuid_ebx(unsigned int op)190 static inline unsigned int cpuid_ebx(unsigned int op) { return 0; };
cpuid_ecx(unsigned int op)191 static inline unsigned int cpuid_ecx(unsigned int op) { return 0; };
cpuid_edx(unsigned int op)192 static inline unsigned int cpuid_edx(unsigned int op) { return 0; };
193 #endif /* defined(__i386__) || defined(__x86_64__) */
194
195 #endif /* __CPUPOWERUTILS_HELPERS__ */
196