1 /*
2 * Common functionality for the alsa driver code base for HD Audio.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free
6 * Software Foundation; either version 2 of the License, or (at your option)
7 * any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15 #ifndef __SOUND_HDA_CONTROLLER_H
16 #define __SOUND_HDA_CONTROLLER_H
17
18 #include <linux/timecounter.h>
19 #include <linux/interrupt.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/initval.h>
23 #include "hda_codec.h"
24 #include <sound/hda_register.h>
25
26 #define AZX_MAX_CODECS HDA_MAX_CODECS
27 #define AZX_DEFAULT_CODECS 4
28
29 /* driver quirks (capabilities) */
30 /* bits 0-7 are used for indicating driver type */
31 #define AZX_DCAPS_NO_TCSEL (1 << 8) /* No Intel TCSEL bit */
32 #define AZX_DCAPS_NO_MSI (1 << 9) /* No MSI support */
33 #define AZX_DCAPS_SNOOP_MASK (3 << 10) /* snoop type mask */
34 #define AZX_DCAPS_SNOOP_OFF (1 << 12) /* snoop default off */
35 /* 13 unused */
36 /* 14 unused */
37 #define AZX_DCAPS_CTX_WORKAROUND (1 << 15) /* X-Fi workaround */
38 #define AZX_DCAPS_POSFIX_LPIB (1 << 16) /* Use LPIB as default */
39 #define AZX_DCAPS_POSFIX_VIA (1 << 17) /* Use VIACOMBO as default */
40 #define AZX_DCAPS_NO_64BIT (1 << 18) /* No 64bit address */
41 #define AZX_DCAPS_SYNC_WRITE (1 << 19) /* sync each cmd write */
42 #define AZX_DCAPS_OLD_SSYNC (1 << 20) /* Old SSYNC reg for ICH */
43 #define AZX_DCAPS_NO_ALIGN_BUFSIZE (1 << 21) /* no buffer size alignment */
44 /* 22 unused */
45 #define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23) /* BDLE in 4k boundary */
46 #define AZX_DCAPS_REVERSE_ASSIGN (1 << 24) /* Assign devices in reverse order */
47 #define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */
48 #define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */
49 #define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */
50 #define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */
51 #define AZX_DCAPS_NO_MSI64 (1 << 29) /* Stick to 32-bit MSIs */
52 #define AZX_DCAPS_SEPARATE_STREAM_TAG (1 << 30) /* capture and playback use separate stream tag */
53
54 enum {
55 AZX_SNOOP_TYPE_NONE,
56 AZX_SNOOP_TYPE_SCH,
57 AZX_SNOOP_TYPE_ATI,
58 AZX_SNOOP_TYPE_NVIDIA,
59 };
60
61 struct azx_dev {
62 struct hdac_stream core;
63
64 unsigned int irq_pending:1;
65 /*
66 * For VIA:
67 * A flag to ensure DMA position is 0
68 * when link position is not greater than FIFO size
69 */
70 unsigned int insufficient:1;
71 unsigned int wc_marked:1;
72 };
73
74 #define azx_stream(dev) (&(dev)->core)
75 #define stream_to_azx_dev(s) container_of(s, struct azx_dev, core)
76
77 struct azx;
78
79 /* Functions to read/write to hda registers. */
80 struct hda_controller_ops {
81 /* Disable msi if supported, PCI only */
82 int (*disable_msi_reset_irq)(struct azx *);
83 int (*substream_alloc_pages)(struct azx *chip,
84 struct snd_pcm_substream *substream,
85 size_t size);
86 int (*substream_free_pages)(struct azx *chip,
87 struct snd_pcm_substream *substream);
88 void (*pcm_mmap_prepare)(struct snd_pcm_substream *substream,
89 struct vm_area_struct *area);
90 /* Check if current position is acceptable */
91 int (*position_check)(struct azx *chip, struct azx_dev *azx_dev);
92 /* enable/disable the link power */
93 int (*link_power)(struct azx *chip, bool enable);
94 };
95
96 struct azx_pcm {
97 struct azx *chip;
98 struct snd_pcm *pcm;
99 struct hda_codec *codec;
100 struct hda_pcm *info;
101 struct list_head list;
102 };
103
104 typedef unsigned int (*azx_get_pos_callback_t)(struct azx *, struct azx_dev *);
105 typedef int (*azx_get_delay_callback_t)(struct azx *, struct azx_dev *, unsigned int pos);
106
107 struct azx {
108 struct hda_bus bus;
109
110 struct snd_card *card;
111 struct pci_dev *pci;
112 int dev_index;
113
114 /* chip type specific */
115 int driver_type;
116 unsigned int driver_caps;
117 int playback_streams;
118 int playback_index_offset;
119 int capture_streams;
120 int capture_index_offset;
121 int num_streams;
122 const int *jackpoll_ms; /* per-card jack poll interval */
123
124 /* Register interaction. */
125 const struct hda_controller_ops *ops;
126
127 /* position adjustment callbacks */
128 azx_get_pos_callback_t get_position[2];
129 azx_get_delay_callback_t get_delay[2];
130
131 /* locks */
132 struct mutex open_mutex; /* Prevents concurrent open/close operations */
133
134 /* PCM */
135 struct list_head pcm_list; /* azx_pcm list */
136
137 /* HD codec */
138 int codec_probe_mask; /* copied from probe_mask option */
139 unsigned int beep_mode;
140
141 #ifdef CONFIG_SND_HDA_PATCH_LOADER
142 const struct firmware *fw;
143 #endif
144
145 /* flags */
146 const int *bdl_pos_adj;
147 int poll_count;
148 unsigned int running:1;
149 unsigned int single_cmd:1;
150 unsigned int polling_mode:1;
151 unsigned int msi:1;
152 unsigned int probing:1; /* codec probing phase */
153 unsigned int snoop:1;
154 unsigned int uc_buffer:1; /* non-cached pages for stream buffers */
155 unsigned int align_buffer_size:1;
156 unsigned int region_requested:1;
157 unsigned int disabled:1; /* disabled by vga_switcheroo */
158
159 #ifdef CONFIG_SND_HDA_DSP_LOADER
160 struct azx_dev saved_azx_dev;
161 #endif
162 };
163
164 #define azx_bus(chip) (&(chip)->bus.core)
165 #define bus_to_azx(_bus) container_of(_bus, struct azx, bus.core)
166
azx_snoop(struct azx * chip)167 static inline bool azx_snoop(struct azx *chip)
168 {
169 return !IS_ENABLED(CONFIG_X86) || chip->snoop;
170 }
171
172 /*
173 * macros for easy use
174 */
175
176 #define azx_writel(chip, reg, value) \
177 snd_hdac_chip_writel(azx_bus(chip), reg, value)
178 #define azx_readl(chip, reg) \
179 snd_hdac_chip_readl(azx_bus(chip), reg)
180 #define azx_writew(chip, reg, value) \
181 snd_hdac_chip_writew(azx_bus(chip), reg, value)
182 #define azx_readw(chip, reg) \
183 snd_hdac_chip_readw(azx_bus(chip), reg)
184 #define azx_writeb(chip, reg, value) \
185 snd_hdac_chip_writeb(azx_bus(chip), reg, value)
186 #define azx_readb(chip, reg) \
187 snd_hdac_chip_readb(azx_bus(chip), reg)
188
189 #define azx_has_pm_runtime(chip) \
190 ((chip)->driver_caps & AZX_DCAPS_PM_RUNTIME)
191
192 /* PCM setup */
get_azx_dev(struct snd_pcm_substream * substream)193 static inline struct azx_dev *get_azx_dev(struct snd_pcm_substream *substream)
194 {
195 return substream->runtime->private_data;
196 }
197 unsigned int azx_get_position(struct azx *chip, struct azx_dev *azx_dev);
198 unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev);
199 unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev);
200
201 /* Stream control. */
202 void azx_stop_all_streams(struct azx *chip);
203
204 /* Allocation functions. */
205 #define azx_alloc_stream_pages(chip) \
206 snd_hdac_bus_alloc_stream_pages(azx_bus(chip))
207 #define azx_free_stream_pages(chip) \
208 snd_hdac_bus_free_stream_pages(azx_bus(chip))
209
210 /* Low level azx interface */
211 void azx_init_chip(struct azx *chip, bool full_reset);
212 void azx_stop_chip(struct azx *chip);
213 #define azx_enter_link_reset(chip) \
214 snd_hdac_bus_enter_link_reset(azx_bus(chip))
215 irqreturn_t azx_interrupt(int irq, void *dev_id);
216
217 /* Codec interface */
218 int azx_bus_init(struct azx *chip, const char *model,
219 const struct hdac_io_ops *io_ops);
220 int azx_probe_codecs(struct azx *chip, unsigned int max_slots);
221 int azx_codec_configure(struct azx *chip);
222 int azx_init_streams(struct azx *chip);
223 void azx_free_streams(struct azx *chip);
224
225 #endif /* __SOUND_HDA_CONTROLLER_H */
226