1 /*
2 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14 #include <linux/export.h>
15 #include <linux/module.h>
16 #include <linux/regmap.h>
17 #include <linux/platform_device.h>
18 #include <linux/clk-provider.h>
19 #include <linux/reset-controller.h>
20
21 #include "common.h"
22 #include "clk-rcg.h"
23 #include "clk-regmap.h"
24 #include "reset.h"
25 #include "gdsc.h"
26
27 struct qcom_cc {
28 struct qcom_reset_controller reset;
29 struct clk_onecell_data data;
30 struct clk *clks[];
31 };
32
33 const
qcom_find_freq(const struct freq_tbl * f,unsigned long rate)34 struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, unsigned long rate)
35 {
36 if (!f)
37 return NULL;
38
39 if (!f->freq)
40 return f;
41
42 for (; f->freq; f++)
43 if (rate <= f->freq)
44 return f;
45
46 /* Default to our fastest rate */
47 return f - 1;
48 }
49 EXPORT_SYMBOL_GPL(qcom_find_freq);
50
qcom_find_src_index(struct clk_hw * hw,const struct parent_map * map,u8 src)51 int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map, u8 src)
52 {
53 int i, num_parents = clk_hw_get_num_parents(hw);
54
55 for (i = 0; i < num_parents; i++)
56 if (src == map[i].src)
57 return i;
58
59 return -ENOENT;
60 }
61 EXPORT_SYMBOL_GPL(qcom_find_src_index);
62
63 struct regmap *
qcom_cc_map(struct platform_device * pdev,const struct qcom_cc_desc * desc)64 qcom_cc_map(struct platform_device *pdev, const struct qcom_cc_desc *desc)
65 {
66 void __iomem *base;
67 struct resource *res;
68 struct device *dev = &pdev->dev;
69
70 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
71 base = devm_ioremap_resource(dev, res);
72 if (IS_ERR(base))
73 return ERR_CAST(base);
74
75 return devm_regmap_init_mmio(dev, base, desc->config);
76 }
77 EXPORT_SYMBOL_GPL(qcom_cc_map);
78
qcom_cc_del_clk_provider(void * data)79 static void qcom_cc_del_clk_provider(void *data)
80 {
81 of_clk_del_provider(data);
82 }
83
qcom_cc_reset_unregister(void * data)84 static void qcom_cc_reset_unregister(void *data)
85 {
86 reset_controller_unregister(data);
87 }
88
qcom_cc_gdsc_unregister(void * data)89 static void qcom_cc_gdsc_unregister(void *data)
90 {
91 gdsc_unregister(data);
92 }
93
qcom_cc_really_probe(struct platform_device * pdev,const struct qcom_cc_desc * desc,struct regmap * regmap)94 int qcom_cc_really_probe(struct platform_device *pdev,
95 const struct qcom_cc_desc *desc, struct regmap *regmap)
96 {
97 int i, ret;
98 struct device *dev = &pdev->dev;
99 struct clk *clk;
100 struct clk_onecell_data *data;
101 struct clk **clks;
102 struct qcom_reset_controller *reset;
103 struct qcom_cc *cc;
104 size_t num_clks = desc->num_clks;
105 struct clk_regmap **rclks = desc->clks;
106
107 cc = devm_kzalloc(dev, sizeof(*cc) + sizeof(*clks) * num_clks,
108 GFP_KERNEL);
109 if (!cc)
110 return -ENOMEM;
111
112 clks = cc->clks;
113 data = &cc->data;
114 data->clks = clks;
115 data->clk_num = num_clks;
116
117 for (i = 0; i < num_clks; i++) {
118 if (!rclks[i]) {
119 clks[i] = ERR_PTR(-ENOENT);
120 continue;
121 }
122 clk = devm_clk_register_regmap(dev, rclks[i]);
123 if (IS_ERR(clk))
124 return PTR_ERR(clk);
125 clks[i] = clk;
126 }
127
128 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, data);
129 if (ret)
130 return ret;
131
132 devm_add_action(dev, qcom_cc_del_clk_provider, pdev->dev.of_node);
133
134 reset = &cc->reset;
135 reset->rcdev.of_node = dev->of_node;
136 reset->rcdev.ops = &qcom_reset_ops;
137 reset->rcdev.owner = dev->driver->owner;
138 reset->rcdev.nr_resets = desc->num_resets;
139 reset->regmap = regmap;
140 reset->reset_map = desc->resets;
141
142 ret = reset_controller_register(&reset->rcdev);
143 if (ret)
144 return ret;
145
146 devm_add_action(dev, qcom_cc_reset_unregister, &reset->rcdev);
147
148 if (desc->gdscs && desc->num_gdscs) {
149 ret = gdsc_register(dev, desc->gdscs, desc->num_gdscs,
150 &reset->rcdev, regmap);
151 if (ret)
152 return ret;
153 }
154
155 devm_add_action(dev, qcom_cc_gdsc_unregister, dev);
156
157
158 return 0;
159 }
160 EXPORT_SYMBOL_GPL(qcom_cc_really_probe);
161
qcom_cc_probe(struct platform_device * pdev,const struct qcom_cc_desc * desc)162 int qcom_cc_probe(struct platform_device *pdev, const struct qcom_cc_desc *desc)
163 {
164 struct regmap *regmap;
165
166 regmap = qcom_cc_map(pdev, desc);
167 if (IS_ERR(regmap))
168 return PTR_ERR(regmap);
169
170 return qcom_cc_really_probe(pdev, desc, regmap);
171 }
172 EXPORT_SYMBOL_GPL(qcom_cc_probe);
173
174 MODULE_LICENSE("GPL v2");
175