1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13
14 #include "qla_devtbl.h"
15
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19
20 #include <target/target_core_base.h>
21 #include "qla_target.h"
22
23 /*
24 * QLogic ISP2x00 Hardware Support Function Prototypes.
25 */
26 static int qla2x00_isp_firmware(scsi_qla_host_t *);
27 static int qla2x00_setup_chip(scsi_qla_host_t *);
28 static int qla2x00_fw_ready(scsi_qla_host_t *);
29 static int qla2x00_configure_hba(scsi_qla_host_t *);
30 static int qla2x00_configure_loop(scsi_qla_host_t *);
31 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
32 static int qla2x00_configure_fabric(scsi_qla_host_t *);
33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
34 static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
35 uint16_t *);
36
37 static int qla2x00_restart_isp(scsi_qla_host_t *);
38
39 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
40 static int qla84xx_init_chip(scsi_qla_host_t *);
41 static int qla25xx_init_queues(struct qla_hw_data *);
42
43 /* SRB Extensions ---------------------------------------------------------- */
44
45 void
qla2x00_sp_timeout(unsigned long __data)46 qla2x00_sp_timeout(unsigned long __data)
47 {
48 srb_t *sp = (srb_t *)__data;
49 struct srb_iocb *iocb;
50 fc_port_t *fcport = sp->fcport;
51 struct qla_hw_data *ha = fcport->vha->hw;
52 struct req_que *req;
53 unsigned long flags;
54
55 spin_lock_irqsave(&ha->hardware_lock, flags);
56 req = ha->req_q_map[0];
57 req->outstanding_cmds[sp->handle] = NULL;
58 iocb = &sp->u.iocb_cmd;
59 iocb->timeout(sp);
60 sp->free(fcport->vha, sp);
61 spin_unlock_irqrestore(&ha->hardware_lock, flags);
62 }
63
64 void
qla2x00_sp_free(void * data,void * ptr)65 qla2x00_sp_free(void *data, void *ptr)
66 {
67 srb_t *sp = (srb_t *)ptr;
68 struct srb_iocb *iocb = &sp->u.iocb_cmd;
69 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
70
71 del_timer(&iocb->timer);
72 qla2x00_rel_sp(vha, sp);
73 }
74
75 /* Asynchronous Login/Logout Routines -------------------------------------- */
76
77 unsigned long
qla2x00_get_async_timeout(struct scsi_qla_host * vha)78 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
79 {
80 unsigned long tmo;
81 struct qla_hw_data *ha = vha->hw;
82
83 /* Firmware should use switch negotiated r_a_tov for timeout. */
84 tmo = ha->r_a_tov / 10 * 2;
85 if (IS_QLAFX00(ha)) {
86 tmo = FX00_DEF_RATOV * 2;
87 } else if (!IS_FWI2_CAPABLE(ha)) {
88 /*
89 * Except for earlier ISPs where the timeout is seeded from the
90 * initialization control block.
91 */
92 tmo = ha->login_timeout;
93 }
94 return tmo;
95 }
96
97 static void
qla2x00_async_iocb_timeout(void * data)98 qla2x00_async_iocb_timeout(void *data)
99 {
100 srb_t *sp = (srb_t *)data;
101 fc_port_t *fcport = sp->fcport;
102
103 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
104 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n",
105 sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area,
106 fcport->d_id.b.al_pa);
107
108 fcport->flags &= ~FCF_ASYNC_SENT;
109 if (sp->type == SRB_LOGIN_CMD) {
110 struct srb_iocb *lio = &sp->u.iocb_cmd;
111 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
112 /* Retry as needed. */
113 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
114 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
115 QLA_LOGIO_LOGIN_RETRIED : 0;
116 qla2x00_post_async_login_done_work(fcport->vha, fcport,
117 lio->u.logio.data);
118 } else if (sp->type == SRB_LOGOUT_CMD) {
119 qlt_logo_completion_handler(fcport, QLA_FUNCTION_TIMEOUT);
120 }
121 }
122
123 static void
qla2x00_async_login_sp_done(void * data,void * ptr,int res)124 qla2x00_async_login_sp_done(void *data, void *ptr, int res)
125 {
126 srb_t *sp = (srb_t *)ptr;
127 struct srb_iocb *lio = &sp->u.iocb_cmd;
128 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
129
130 if (!test_bit(UNLOADING, &vha->dpc_flags))
131 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
132 lio->u.logio.data);
133 sp->free(sp->fcport->vha, sp);
134 }
135
136 int
qla2x00_async_login(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)137 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
138 uint16_t *data)
139 {
140 srb_t *sp;
141 struct srb_iocb *lio;
142 int rval;
143
144 rval = QLA_FUNCTION_FAILED;
145 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
146 if (!sp)
147 goto done;
148
149 sp->type = SRB_LOGIN_CMD;
150 sp->name = "login";
151 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
152
153 lio = &sp->u.iocb_cmd;
154 lio->timeout = qla2x00_async_iocb_timeout;
155 sp->done = qla2x00_async_login_sp_done;
156 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
157 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
158 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
159 rval = qla2x00_start_sp(sp);
160 if (rval != QLA_SUCCESS)
161 goto done_free_sp;
162
163 ql_dbg(ql_dbg_disc, vha, 0x2072,
164 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x "
165 "retries=%d.\n", sp->handle, fcport->loop_id,
166 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
167 fcport->login_retry);
168 return rval;
169
170 done_free_sp:
171 sp->free(fcport->vha, sp);
172 done:
173 return rval;
174 }
175
176 static void
qla2x00_async_logout_sp_done(void * data,void * ptr,int res)177 qla2x00_async_logout_sp_done(void *data, void *ptr, int res)
178 {
179 srb_t *sp = (srb_t *)ptr;
180 struct srb_iocb *lio = &sp->u.iocb_cmd;
181 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
182
183 if (!test_bit(UNLOADING, &vha->dpc_flags))
184 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
185 lio->u.logio.data);
186 sp->free(sp->fcport->vha, sp);
187 }
188
189 int
qla2x00_async_logout(struct scsi_qla_host * vha,fc_port_t * fcport)190 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
191 {
192 srb_t *sp;
193 struct srb_iocb *lio;
194 int rval;
195
196 rval = QLA_FUNCTION_FAILED;
197 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
198 if (!sp)
199 goto done;
200
201 sp->type = SRB_LOGOUT_CMD;
202 sp->name = "logout";
203 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
204
205 lio = &sp->u.iocb_cmd;
206 lio->timeout = qla2x00_async_iocb_timeout;
207 sp->done = qla2x00_async_logout_sp_done;
208 rval = qla2x00_start_sp(sp);
209 if (rval != QLA_SUCCESS)
210 goto done_free_sp;
211
212 ql_dbg(ql_dbg_disc, vha, 0x2070,
213 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
214 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
215 fcport->d_id.b.area, fcport->d_id.b.al_pa);
216 return rval;
217
218 done_free_sp:
219 sp->free(fcport->vha, sp);
220 done:
221 return rval;
222 }
223
224 static void
qla2x00_async_adisc_sp_done(void * data,void * ptr,int res)225 qla2x00_async_adisc_sp_done(void *data, void *ptr, int res)
226 {
227 srb_t *sp = (srb_t *)ptr;
228 struct srb_iocb *lio = &sp->u.iocb_cmd;
229 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
230
231 if (!test_bit(UNLOADING, &vha->dpc_flags))
232 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
233 lio->u.logio.data);
234 sp->free(sp->fcport->vha, sp);
235 }
236
237 int
qla2x00_async_adisc(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)238 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
239 uint16_t *data)
240 {
241 srb_t *sp;
242 struct srb_iocb *lio;
243 int rval;
244
245 rval = QLA_FUNCTION_FAILED;
246 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
247 if (!sp)
248 goto done;
249
250 sp->type = SRB_ADISC_CMD;
251 sp->name = "adisc";
252 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
253
254 lio = &sp->u.iocb_cmd;
255 lio->timeout = qla2x00_async_iocb_timeout;
256 sp->done = qla2x00_async_adisc_sp_done;
257 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
258 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
259 rval = qla2x00_start_sp(sp);
260 if (rval != QLA_SUCCESS)
261 goto done_free_sp;
262
263 ql_dbg(ql_dbg_disc, vha, 0x206f,
264 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n",
265 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
266 fcport->d_id.b.area, fcport->d_id.b.al_pa);
267 return rval;
268
269 done_free_sp:
270 sp->free(fcport->vha, sp);
271 done:
272 return rval;
273 }
274
275 static void
qla2x00_tmf_iocb_timeout(void * data)276 qla2x00_tmf_iocb_timeout(void *data)
277 {
278 srb_t *sp = (srb_t *)data;
279 struct srb_iocb *tmf = &sp->u.iocb_cmd;
280
281 tmf->u.tmf.comp_status = CS_TIMEOUT;
282 complete(&tmf->u.tmf.comp);
283 }
284
285 static void
qla2x00_tmf_sp_done(void * data,void * ptr,int res)286 qla2x00_tmf_sp_done(void *data, void *ptr, int res)
287 {
288 srb_t *sp = (srb_t *)ptr;
289 struct srb_iocb *tmf = &sp->u.iocb_cmd;
290 complete(&tmf->u.tmf.comp);
291 }
292
293 int
qla2x00_async_tm_cmd(fc_port_t * fcport,uint32_t flags,uint32_t lun,uint32_t tag)294 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
295 uint32_t tag)
296 {
297 struct scsi_qla_host *vha = fcport->vha;
298 struct srb_iocb *tm_iocb;
299 srb_t *sp;
300 int rval = QLA_FUNCTION_FAILED;
301
302 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
303 if (!sp)
304 goto done;
305
306 tm_iocb = &sp->u.iocb_cmd;
307 sp->type = SRB_TM_CMD;
308 sp->name = "tmf";
309 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
310 tm_iocb->u.tmf.flags = flags;
311 tm_iocb->u.tmf.lun = lun;
312 tm_iocb->u.tmf.data = tag;
313 sp->done = qla2x00_tmf_sp_done;
314 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
315 init_completion(&tm_iocb->u.tmf.comp);
316
317 rval = qla2x00_start_sp(sp);
318 if (rval != QLA_SUCCESS)
319 goto done_free_sp;
320
321 ql_dbg(ql_dbg_taskm, vha, 0x802f,
322 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
323 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
324 fcport->d_id.b.area, fcport->d_id.b.al_pa);
325
326 wait_for_completion(&tm_iocb->u.tmf.comp);
327
328 rval = tm_iocb->u.tmf.data;
329
330 if (rval != QLA_SUCCESS) {
331 ql_log(ql_log_warn, vha, 0x8030,
332 "TM IOCB failed (%x).\n", rval);
333 }
334
335 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
336 flags = tm_iocb->u.tmf.flags;
337 lun = (uint16_t)tm_iocb->u.tmf.lun;
338
339 /* Issue Marker IOCB */
340 qla2x00_marker(vha, vha->hw->req_q_map[0],
341 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
342 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
343 }
344
345 done_free_sp:
346 sp->free(vha, sp);
347 done:
348 return rval;
349 }
350
351 static void
qla24xx_abort_iocb_timeout(void * data)352 qla24xx_abort_iocb_timeout(void *data)
353 {
354 srb_t *sp = (srb_t *)data;
355 struct srb_iocb *abt = &sp->u.iocb_cmd;
356
357 abt->u.abt.comp_status = CS_TIMEOUT;
358 complete(&abt->u.abt.comp);
359 }
360
361 static void
qla24xx_abort_sp_done(void * data,void * ptr,int res)362 qla24xx_abort_sp_done(void *data, void *ptr, int res)
363 {
364 srb_t *sp = (srb_t *)ptr;
365 struct srb_iocb *abt = &sp->u.iocb_cmd;
366
367 if (del_timer(&sp->u.iocb_cmd.timer))
368 complete(&abt->u.abt.comp);
369 }
370
371 static int
qla24xx_async_abort_cmd(srb_t * cmd_sp)372 qla24xx_async_abort_cmd(srb_t *cmd_sp)
373 {
374 scsi_qla_host_t *vha = cmd_sp->fcport->vha;
375 fc_port_t *fcport = cmd_sp->fcport;
376 struct srb_iocb *abt_iocb;
377 srb_t *sp;
378 int rval = QLA_FUNCTION_FAILED;
379
380 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
381 if (!sp)
382 goto done;
383
384 abt_iocb = &sp->u.iocb_cmd;
385 sp->type = SRB_ABT_CMD;
386 sp->name = "abort";
387 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
388 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
389 sp->done = qla24xx_abort_sp_done;
390 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
391 init_completion(&abt_iocb->u.abt.comp);
392
393 rval = qla2x00_start_sp(sp);
394 if (rval != QLA_SUCCESS)
395 goto done_free_sp;
396
397 ql_dbg(ql_dbg_async, vha, 0x507c,
398 "Abort command issued - hdl=%x, target_id=%x\n",
399 cmd_sp->handle, fcport->tgt_id);
400
401 wait_for_completion(&abt_iocb->u.abt.comp);
402
403 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
404 QLA_SUCCESS : QLA_FUNCTION_FAILED;
405
406 done_free_sp:
407 sp->free(vha, sp);
408 done:
409 return rval;
410 }
411
412 int
qla24xx_async_abort_command(srb_t * sp)413 qla24xx_async_abort_command(srb_t *sp)
414 {
415 unsigned long flags = 0;
416
417 uint32_t handle;
418 fc_port_t *fcport = sp->fcport;
419 struct scsi_qla_host *vha = fcport->vha;
420 struct qla_hw_data *ha = vha->hw;
421 struct req_que *req = vha->req;
422
423 spin_lock_irqsave(&ha->hardware_lock, flags);
424 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
425 if (req->outstanding_cmds[handle] == sp)
426 break;
427 }
428 spin_unlock_irqrestore(&ha->hardware_lock, flags);
429 if (handle == req->num_outstanding_cmds) {
430 /* Command not found. */
431 return QLA_FUNCTION_FAILED;
432 }
433 if (sp->type == SRB_FXIOCB_DCMD)
434 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
435 FXDISC_ABORT_IOCTL);
436
437 return qla24xx_async_abort_cmd(sp);
438 }
439
440 void
qla2x00_async_login_done(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)441 qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
442 uint16_t *data)
443 {
444 int rval;
445
446 switch (data[0]) {
447 case MBS_COMMAND_COMPLETE:
448 /*
449 * Driver must validate login state - If PRLI not complete,
450 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
451 * requests.
452 */
453 rval = qla2x00_get_port_database(vha, fcport, 0);
454 if (rval == QLA_NOT_LOGGED_IN) {
455 fcport->flags &= ~FCF_ASYNC_SENT;
456 fcport->flags |= FCF_LOGIN_NEEDED;
457 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
458 break;
459 }
460
461 if (rval != QLA_SUCCESS) {
462 qla2x00_post_async_logout_work(vha, fcport, NULL);
463 qla2x00_post_async_login_work(vha, fcport, NULL);
464 break;
465 }
466 if (fcport->flags & FCF_FCP2_DEVICE) {
467 qla2x00_post_async_adisc_work(vha, fcport, data);
468 break;
469 }
470 qla2x00_update_fcport(vha, fcport);
471 break;
472 case MBS_COMMAND_ERROR:
473 fcport->flags &= ~FCF_ASYNC_SENT;
474 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
475 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
476 else
477 qla2x00_mark_device_lost(vha, fcport, 1, 0);
478 break;
479 case MBS_PORT_ID_USED:
480 fcport->loop_id = data[1];
481 qla2x00_post_async_logout_work(vha, fcport, NULL);
482 qla2x00_post_async_login_work(vha, fcport, NULL);
483 break;
484 case MBS_LOOP_ID_USED:
485 fcport->loop_id++;
486 rval = qla2x00_find_new_loop_id(vha, fcport);
487 if (rval != QLA_SUCCESS) {
488 fcport->flags &= ~FCF_ASYNC_SENT;
489 qla2x00_mark_device_lost(vha, fcport, 1, 0);
490 break;
491 }
492 qla2x00_post_async_login_work(vha, fcport, NULL);
493 break;
494 }
495 return;
496 }
497
498 void
qla2x00_async_logout_done(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)499 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
500 uint16_t *data)
501 {
502 /* Don't re-login in target mode */
503 if (!fcport->tgt_session)
504 qla2x00_mark_device_lost(vha, fcport, 1, 0);
505 qlt_logo_completion_handler(fcport, data[0]);
506 return;
507 }
508
509 void
qla2x00_async_adisc_done(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)510 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
511 uint16_t *data)
512 {
513 if (data[0] == MBS_COMMAND_COMPLETE) {
514 qla2x00_update_fcport(vha, fcport);
515
516 return;
517 }
518
519 /* Retry login. */
520 fcport->flags &= ~FCF_ASYNC_SENT;
521 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
522 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
523 else
524 qla2x00_mark_device_lost(vha, fcport, 1, 0);
525
526 return;
527 }
528
529 /****************************************************************************/
530 /* QLogic ISP2x00 Hardware Support Functions. */
531 /****************************************************************************/
532
533 static int
qla83xx_nic_core_fw_load(scsi_qla_host_t * vha)534 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
535 {
536 int rval = QLA_SUCCESS;
537 struct qla_hw_data *ha = vha->hw;
538 uint32_t idc_major_ver, idc_minor_ver;
539 uint16_t config[4];
540
541 qla83xx_idc_lock(vha, 0);
542
543 /* SV: TODO: Assign initialization timeout from
544 * flash-info / other param
545 */
546 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
547 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
548
549 /* Set our fcoe function presence */
550 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
551 ql_dbg(ql_dbg_p3p, vha, 0xb077,
552 "Error while setting DRV-Presence.\n");
553 rval = QLA_FUNCTION_FAILED;
554 goto exit;
555 }
556
557 /* Decide the reset ownership */
558 qla83xx_reset_ownership(vha);
559
560 /*
561 * On first protocol driver load:
562 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
563 * register.
564 * Others: Check compatibility with current IDC Major version.
565 */
566 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
567 if (ha->flags.nic_core_reset_owner) {
568 /* Set IDC Major version */
569 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
570 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
571
572 /* Clearing IDC-Lock-Recovery register */
573 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
574 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
575 /*
576 * Clear further IDC participation if we are not compatible with
577 * the current IDC Major Version.
578 */
579 ql_log(ql_log_warn, vha, 0xb07d,
580 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
581 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
582 __qla83xx_clear_drv_presence(vha);
583 rval = QLA_FUNCTION_FAILED;
584 goto exit;
585 }
586 /* Each function sets its supported Minor version. */
587 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
588 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
589 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
590
591 if (ha->flags.nic_core_reset_owner) {
592 memset(config, 0, sizeof(config));
593 if (!qla81xx_get_port_config(vha, config))
594 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
595 QLA8XXX_DEV_READY);
596 }
597
598 rval = qla83xx_idc_state_handler(vha);
599
600 exit:
601 qla83xx_idc_unlock(vha, 0);
602
603 return rval;
604 }
605
606 /*
607 * qla2x00_initialize_adapter
608 * Initialize board.
609 *
610 * Input:
611 * ha = adapter block pointer.
612 *
613 * Returns:
614 * 0 = success
615 */
616 int
qla2x00_initialize_adapter(scsi_qla_host_t * vha)617 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
618 {
619 int rval;
620 struct qla_hw_data *ha = vha->hw;
621 struct req_que *req = ha->req_q_map[0];
622
623 /* Clear adapter flags. */
624 vha->flags.online = 0;
625 ha->flags.chip_reset_done = 0;
626 vha->flags.reset_active = 0;
627 ha->flags.pci_channel_io_perm_failure = 0;
628 ha->flags.eeh_busy = 0;
629 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
630 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
631 atomic_set(&vha->loop_state, LOOP_DOWN);
632 vha->device_flags = DFLG_NO_CABLE;
633 vha->dpc_flags = 0;
634 vha->flags.management_server_logged_in = 0;
635 vha->marker_needed = 0;
636 ha->isp_abort_cnt = 0;
637 ha->beacon_blink_led = 0;
638
639 set_bit(0, ha->req_qid_map);
640 set_bit(0, ha->rsp_qid_map);
641
642 ql_dbg(ql_dbg_init, vha, 0x0040,
643 "Configuring PCI space...\n");
644 rval = ha->isp_ops->pci_config(vha);
645 if (rval) {
646 ql_log(ql_log_warn, vha, 0x0044,
647 "Unable to configure PCI space.\n");
648 return (rval);
649 }
650
651 ha->isp_ops->reset_chip(vha);
652
653 rval = qla2xxx_get_flash_info(vha);
654 if (rval) {
655 ql_log(ql_log_fatal, vha, 0x004f,
656 "Unable to validate FLASH data.\n");
657 return rval;
658 }
659
660 if (IS_QLA8044(ha)) {
661 qla8044_read_reset_template(vha);
662
663 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
664 * If DONRESET_BIT0 is set, drivers should not set dev_state
665 * to NEED_RESET. But if NEED_RESET is set, drivers should
666 * should honor the reset. */
667 if (ql2xdontresethba == 1)
668 qla8044_set_idc_dontreset(vha);
669 }
670
671 ha->isp_ops->get_flash_version(vha, req->ring);
672 ql_dbg(ql_dbg_init, vha, 0x0061,
673 "Configure NVRAM parameters...\n");
674
675 ha->isp_ops->nvram_config(vha);
676
677 if (ha->flags.disable_serdes) {
678 /* Mask HBA via NVRAM settings? */
679 ql_log(ql_log_info, vha, 0x0077,
680 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
681 return QLA_FUNCTION_FAILED;
682 }
683
684 ql_dbg(ql_dbg_init, vha, 0x0078,
685 "Verifying loaded RISC code...\n");
686
687 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
688 rval = ha->isp_ops->chip_diag(vha);
689 if (rval)
690 return (rval);
691 rval = qla2x00_setup_chip(vha);
692 if (rval)
693 return (rval);
694 }
695
696 if (IS_QLA84XX(ha)) {
697 ha->cs84xx = qla84xx_get_chip(vha);
698 if (!ha->cs84xx) {
699 ql_log(ql_log_warn, vha, 0x00d0,
700 "Unable to configure ISP84XX.\n");
701 return QLA_FUNCTION_FAILED;
702 }
703 }
704
705 if (qla_ini_mode_enabled(vha))
706 rval = qla2x00_init_rings(vha);
707
708 ha->flags.chip_reset_done = 1;
709
710 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
711 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
712 rval = qla84xx_init_chip(vha);
713 if (rval != QLA_SUCCESS) {
714 ql_log(ql_log_warn, vha, 0x00d4,
715 "Unable to initialize ISP84XX.\n");
716 qla84xx_put_chip(vha);
717 }
718 }
719
720 /* Load the NIC Core f/w if we are the first protocol driver. */
721 if (IS_QLA8031(ha)) {
722 rval = qla83xx_nic_core_fw_load(vha);
723 if (rval)
724 ql_log(ql_log_warn, vha, 0x0124,
725 "Error in initializing NIC Core f/w.\n");
726 }
727
728 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
729 qla24xx_read_fcp_prio_cfg(vha);
730
731 if (IS_P3P_TYPE(ha))
732 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
733 else
734 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
735
736 return (rval);
737 }
738
739 /**
740 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
741 * @ha: HA context
742 *
743 * Returns 0 on success.
744 */
745 int
qla2100_pci_config(scsi_qla_host_t * vha)746 qla2100_pci_config(scsi_qla_host_t *vha)
747 {
748 uint16_t w;
749 unsigned long flags;
750 struct qla_hw_data *ha = vha->hw;
751 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
752
753 pci_set_master(ha->pdev);
754 pci_try_set_mwi(ha->pdev);
755
756 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
757 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
758 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
759
760 pci_disable_rom(ha->pdev);
761
762 /* Get PCI bus information. */
763 spin_lock_irqsave(&ha->hardware_lock, flags);
764 ha->pci_attr = RD_REG_WORD(®->ctrl_status);
765 spin_unlock_irqrestore(&ha->hardware_lock, flags);
766
767 return QLA_SUCCESS;
768 }
769
770 /**
771 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
772 * @ha: HA context
773 *
774 * Returns 0 on success.
775 */
776 int
qla2300_pci_config(scsi_qla_host_t * vha)777 qla2300_pci_config(scsi_qla_host_t *vha)
778 {
779 uint16_t w;
780 unsigned long flags = 0;
781 uint32_t cnt;
782 struct qla_hw_data *ha = vha->hw;
783 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
784
785 pci_set_master(ha->pdev);
786 pci_try_set_mwi(ha->pdev);
787
788 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
789 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
790
791 if (IS_QLA2322(ha) || IS_QLA6322(ha))
792 w &= ~PCI_COMMAND_INTX_DISABLE;
793 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
794
795 /*
796 * If this is a 2300 card and not 2312, reset the
797 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
798 * the 2310 also reports itself as a 2300 so we need to get the
799 * fb revision level -- a 6 indicates it really is a 2300 and
800 * not a 2310.
801 */
802 if (IS_QLA2300(ha)) {
803 spin_lock_irqsave(&ha->hardware_lock, flags);
804
805 /* Pause RISC. */
806 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC);
807 for (cnt = 0; cnt < 30000; cnt++) {
808 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0)
809 break;
810
811 udelay(10);
812 }
813
814 /* Select FPM registers. */
815 WRT_REG_WORD(®->ctrl_status, 0x20);
816 RD_REG_WORD(®->ctrl_status);
817
818 /* Get the fb rev level */
819 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
820
821 if (ha->fb_rev == FPM_2300)
822 pci_clear_mwi(ha->pdev);
823
824 /* Deselect FPM registers. */
825 WRT_REG_WORD(®->ctrl_status, 0x0);
826 RD_REG_WORD(®->ctrl_status);
827
828 /* Release RISC module. */
829 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
830 for (cnt = 0; cnt < 30000; cnt++) {
831 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0)
832 break;
833
834 udelay(10);
835 }
836
837 spin_unlock_irqrestore(&ha->hardware_lock, flags);
838 }
839
840 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
841
842 pci_disable_rom(ha->pdev);
843
844 /* Get PCI bus information. */
845 spin_lock_irqsave(&ha->hardware_lock, flags);
846 ha->pci_attr = RD_REG_WORD(®->ctrl_status);
847 spin_unlock_irqrestore(&ha->hardware_lock, flags);
848
849 return QLA_SUCCESS;
850 }
851
852 /**
853 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
854 * @ha: HA context
855 *
856 * Returns 0 on success.
857 */
858 int
qla24xx_pci_config(scsi_qla_host_t * vha)859 qla24xx_pci_config(scsi_qla_host_t *vha)
860 {
861 uint16_t w;
862 unsigned long flags = 0;
863 struct qla_hw_data *ha = vha->hw;
864 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
865
866 pci_set_master(ha->pdev);
867 pci_try_set_mwi(ha->pdev);
868
869 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
870 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
871 w &= ~PCI_COMMAND_INTX_DISABLE;
872 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
873
874 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
875
876 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
877 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
878 pcix_set_mmrbc(ha->pdev, 2048);
879
880 /* PCIe -- adjust Maximum Read Request Size (2048). */
881 if (pci_is_pcie(ha->pdev))
882 pcie_set_readrq(ha->pdev, 4096);
883
884 pci_disable_rom(ha->pdev);
885
886 ha->chip_revision = ha->pdev->revision;
887
888 /* Get PCI bus information. */
889 spin_lock_irqsave(&ha->hardware_lock, flags);
890 ha->pci_attr = RD_REG_DWORD(®->ctrl_status);
891 spin_unlock_irqrestore(&ha->hardware_lock, flags);
892
893 return QLA_SUCCESS;
894 }
895
896 /**
897 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
898 * @ha: HA context
899 *
900 * Returns 0 on success.
901 */
902 int
qla25xx_pci_config(scsi_qla_host_t * vha)903 qla25xx_pci_config(scsi_qla_host_t *vha)
904 {
905 uint16_t w;
906 struct qla_hw_data *ha = vha->hw;
907
908 pci_set_master(ha->pdev);
909 pci_try_set_mwi(ha->pdev);
910
911 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
912 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
913 w &= ~PCI_COMMAND_INTX_DISABLE;
914 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
915
916 /* PCIe -- adjust Maximum Read Request Size (2048). */
917 if (pci_is_pcie(ha->pdev))
918 pcie_set_readrq(ha->pdev, 4096);
919
920 pci_disable_rom(ha->pdev);
921
922 ha->chip_revision = ha->pdev->revision;
923
924 return QLA_SUCCESS;
925 }
926
927 /**
928 * qla2x00_isp_firmware() - Choose firmware image.
929 * @ha: HA context
930 *
931 * Returns 0 on success.
932 */
933 static int
qla2x00_isp_firmware(scsi_qla_host_t * vha)934 qla2x00_isp_firmware(scsi_qla_host_t *vha)
935 {
936 int rval;
937 uint16_t loop_id, topo, sw_cap;
938 uint8_t domain, area, al_pa;
939 struct qla_hw_data *ha = vha->hw;
940
941 /* Assume loading risc code */
942 rval = QLA_FUNCTION_FAILED;
943
944 if (ha->flags.disable_risc_code_load) {
945 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
946
947 /* Verify checksum of loaded RISC code. */
948 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
949 if (rval == QLA_SUCCESS) {
950 /* And, verify we are not in ROM code. */
951 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
952 &area, &domain, &topo, &sw_cap);
953 }
954 }
955
956 if (rval)
957 ql_dbg(ql_dbg_init, vha, 0x007a,
958 "**** Load RISC code ****.\n");
959
960 return (rval);
961 }
962
963 /**
964 * qla2x00_reset_chip() - Reset ISP chip.
965 * @ha: HA context
966 *
967 * Returns 0 on success.
968 */
969 void
qla2x00_reset_chip(scsi_qla_host_t * vha)970 qla2x00_reset_chip(scsi_qla_host_t *vha)
971 {
972 unsigned long flags = 0;
973 struct qla_hw_data *ha = vha->hw;
974 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
975 uint32_t cnt;
976 uint16_t cmd;
977
978 if (unlikely(pci_channel_offline(ha->pdev)))
979 return;
980
981 ha->isp_ops->disable_intrs(ha);
982
983 spin_lock_irqsave(&ha->hardware_lock, flags);
984
985 /* Turn off master enable */
986 cmd = 0;
987 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
988 cmd &= ~PCI_COMMAND_MASTER;
989 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
990
991 if (!IS_QLA2100(ha)) {
992 /* Pause RISC. */
993 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC);
994 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
995 for (cnt = 0; cnt < 30000; cnt++) {
996 if ((RD_REG_WORD(®->hccr) &
997 HCCR_RISC_PAUSE) != 0)
998 break;
999 udelay(100);
1000 }
1001 } else {
1002 RD_REG_WORD(®->hccr); /* PCI Posting. */
1003 udelay(10);
1004 }
1005
1006 /* Select FPM registers. */
1007 WRT_REG_WORD(®->ctrl_status, 0x20);
1008 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */
1009
1010 /* FPM Soft Reset. */
1011 WRT_REG_WORD(®->fpm_diag_config, 0x100);
1012 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */
1013
1014 /* Toggle Fpm Reset. */
1015 if (!IS_QLA2200(ha)) {
1016 WRT_REG_WORD(®->fpm_diag_config, 0x0);
1017 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */
1018 }
1019
1020 /* Select frame buffer registers. */
1021 WRT_REG_WORD(®->ctrl_status, 0x10);
1022 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */
1023
1024 /* Reset frame buffer FIFOs. */
1025 if (IS_QLA2200(ha)) {
1026 WRT_FB_CMD_REG(ha, reg, 0xa000);
1027 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
1028 } else {
1029 WRT_FB_CMD_REG(ha, reg, 0x00fc);
1030
1031 /* Read back fb_cmd until zero or 3 seconds max */
1032 for (cnt = 0; cnt < 3000; cnt++) {
1033 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
1034 break;
1035 udelay(100);
1036 }
1037 }
1038
1039 /* Select RISC module registers. */
1040 WRT_REG_WORD(®->ctrl_status, 0);
1041 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */
1042
1043 /* Reset RISC processor. */
1044 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
1045 RD_REG_WORD(®->hccr); /* PCI Posting. */
1046
1047 /* Release RISC processor. */
1048 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
1049 RD_REG_WORD(®->hccr); /* PCI Posting. */
1050 }
1051
1052 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT);
1053 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT);
1054
1055 /* Reset ISP chip. */
1056 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET);
1057
1058 /* Wait for RISC to recover from reset. */
1059 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1060 /*
1061 * It is necessary to for a delay here since the card doesn't
1062 * respond to PCI reads during a reset. On some architectures
1063 * this will result in an MCA.
1064 */
1065 udelay(20);
1066 for (cnt = 30000; cnt; cnt--) {
1067 if ((RD_REG_WORD(®->ctrl_status) &
1068 CSR_ISP_SOFT_RESET) == 0)
1069 break;
1070 udelay(100);
1071 }
1072 } else
1073 udelay(10);
1074
1075 /* Reset RISC processor. */
1076 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
1077
1078 WRT_REG_WORD(®->semaphore, 0);
1079
1080 /* Release RISC processor. */
1081 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
1082 RD_REG_WORD(®->hccr); /* PCI Posting. */
1083
1084 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1085 for (cnt = 0; cnt < 30000; cnt++) {
1086 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
1087 break;
1088
1089 udelay(100);
1090 }
1091 } else
1092 udelay(100);
1093
1094 /* Turn on master enable */
1095 cmd |= PCI_COMMAND_MASTER;
1096 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
1097
1098 /* Disable RISC pause on FPM parity error. */
1099 if (!IS_QLA2100(ha)) {
1100 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE);
1101 RD_REG_WORD(®->hccr); /* PCI Posting. */
1102 }
1103
1104 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1105 }
1106
1107 /**
1108 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
1109 *
1110 * Returns 0 on success.
1111 */
1112 static int
qla81xx_reset_mpi(scsi_qla_host_t * vha)1113 qla81xx_reset_mpi(scsi_qla_host_t *vha)
1114 {
1115 uint16_t mb[4] = {0x1010, 0, 1, 0};
1116
1117 if (!IS_QLA81XX(vha->hw))
1118 return QLA_SUCCESS;
1119
1120 return qla81xx_write_mpi_register(vha, mb);
1121 }
1122
1123 /**
1124 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
1125 * @ha: HA context
1126 *
1127 * Returns 0 on success.
1128 */
1129 static inline int
qla24xx_reset_risc(scsi_qla_host_t * vha)1130 qla24xx_reset_risc(scsi_qla_host_t *vha)
1131 {
1132 unsigned long flags = 0;
1133 struct qla_hw_data *ha = vha->hw;
1134 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1135 uint32_t cnt;
1136 uint16_t wd;
1137 static int abts_cnt; /* ISP abort retry counts */
1138 int rval = QLA_SUCCESS;
1139
1140 spin_lock_irqsave(&ha->hardware_lock, flags);
1141
1142 /* Reset RISC. */
1143 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
1144 for (cnt = 0; cnt < 30000; cnt++) {
1145 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
1146 break;
1147
1148 udelay(10);
1149 }
1150
1151 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE))
1152 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
1153
1154 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
1155 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
1156 RD_REG_DWORD(®->hccr),
1157 RD_REG_DWORD(®->ctrl_status),
1158 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE));
1159
1160 WRT_REG_DWORD(®->ctrl_status,
1161 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
1162 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
1163
1164 udelay(100);
1165
1166 /* Wait for firmware to complete NVRAM accesses. */
1167 RD_REG_WORD(®->mailbox0);
1168 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 &&
1169 rval == QLA_SUCCESS; cnt--) {
1170 barrier();
1171 if (cnt)
1172 udelay(5);
1173 else
1174 rval = QLA_FUNCTION_TIMEOUT;
1175 }
1176
1177 if (rval == QLA_SUCCESS)
1178 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
1179
1180 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
1181 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
1182 RD_REG_DWORD(®->hccr),
1183 RD_REG_DWORD(®->mailbox0));
1184
1185 /* Wait for soft-reset to complete. */
1186 RD_REG_DWORD(®->ctrl_status);
1187 for (cnt = 0; cnt < 6000000; cnt++) {
1188 barrier();
1189 if ((RD_REG_DWORD(®->ctrl_status) &
1190 CSRX_ISP_SOFT_RESET) == 0)
1191 break;
1192
1193 udelay(5);
1194 }
1195 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET))
1196 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
1197
1198 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
1199 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
1200 RD_REG_DWORD(®->hccr),
1201 RD_REG_DWORD(®->ctrl_status));
1202
1203 /* If required, do an MPI FW reset now */
1204 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
1205 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
1206 if (++abts_cnt < 5) {
1207 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1208 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
1209 } else {
1210 /*
1211 * We exhausted the ISP abort retries. We have to
1212 * set the board offline.
1213 */
1214 abts_cnt = 0;
1215 vha->flags.online = 0;
1216 }
1217 }
1218 }
1219
1220 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET);
1221 RD_REG_DWORD(®->hccr);
1222
1223 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE);
1224 RD_REG_DWORD(®->hccr);
1225
1226 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET);
1227 RD_REG_DWORD(®->hccr);
1228
1229 RD_REG_WORD(®->mailbox0);
1230 for (cnt = 6000000; RD_REG_WORD(®->mailbox0) != 0 &&
1231 rval == QLA_SUCCESS; cnt--) {
1232 barrier();
1233 if (cnt)
1234 udelay(5);
1235 else
1236 rval = QLA_FUNCTION_TIMEOUT;
1237 }
1238 if (rval == QLA_SUCCESS)
1239 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
1240
1241 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
1242 "Host Risc 0x%x, mailbox0 0x%x\n",
1243 RD_REG_DWORD(®->hccr),
1244 RD_REG_WORD(®->mailbox0));
1245
1246 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1247
1248 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
1249 "Driver in %s mode\n",
1250 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
1251
1252 if (IS_NOPOLLING_TYPE(ha))
1253 ha->isp_ops->enable_intrs(ha);
1254
1255 return rval;
1256 }
1257
1258 static void
qla25xx_read_risc_sema_reg(scsi_qla_host_t * vha,uint32_t * data)1259 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
1260 {
1261 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
1262
1263 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
1264 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET);
1265
1266 }
1267
1268 static void
qla25xx_write_risc_sema_reg(scsi_qla_host_t * vha,uint32_t data)1269 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
1270 {
1271 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
1272
1273 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
1274 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
1275 }
1276
1277 static void
qla25xx_manipulate_risc_semaphore(scsi_qla_host_t * vha)1278 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
1279 {
1280 uint32_t wd32 = 0;
1281 uint delta_msec = 100;
1282 uint elapsed_msec = 0;
1283 uint timeout_msec;
1284 ulong n;
1285
1286 if (vha->hw->pdev->subsystem_device != 0x0175 &&
1287 vha->hw->pdev->subsystem_device != 0x0240)
1288 return;
1289
1290 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
1291 udelay(100);
1292
1293 attempt:
1294 timeout_msec = TIMEOUT_SEMAPHORE;
1295 n = timeout_msec / delta_msec;
1296 while (n--) {
1297 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
1298 qla25xx_read_risc_sema_reg(vha, &wd32);
1299 if (wd32 & RISC_SEMAPHORE)
1300 break;
1301 msleep(delta_msec);
1302 elapsed_msec += delta_msec;
1303 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
1304 goto force;
1305 }
1306
1307 if (!(wd32 & RISC_SEMAPHORE))
1308 goto force;
1309
1310 if (!(wd32 & RISC_SEMAPHORE_FORCE))
1311 goto acquired;
1312
1313 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
1314 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
1315 n = timeout_msec / delta_msec;
1316 while (n--) {
1317 qla25xx_read_risc_sema_reg(vha, &wd32);
1318 if (!(wd32 & RISC_SEMAPHORE_FORCE))
1319 break;
1320 msleep(delta_msec);
1321 elapsed_msec += delta_msec;
1322 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
1323 goto force;
1324 }
1325
1326 if (wd32 & RISC_SEMAPHORE_FORCE)
1327 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
1328
1329 goto attempt;
1330
1331 force:
1332 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
1333
1334 acquired:
1335 return;
1336 }
1337
1338 /**
1339 * qla24xx_reset_chip() - Reset ISP24xx chip.
1340 * @ha: HA context
1341 *
1342 * Returns 0 on success.
1343 */
1344 void
qla24xx_reset_chip(scsi_qla_host_t * vha)1345 qla24xx_reset_chip(scsi_qla_host_t *vha)
1346 {
1347 struct qla_hw_data *ha = vha->hw;
1348
1349 if (pci_channel_offline(ha->pdev) &&
1350 ha->flags.pci_channel_io_perm_failure) {
1351 return;
1352 }
1353
1354 ha->isp_ops->disable_intrs(ha);
1355
1356 qla25xx_manipulate_risc_semaphore(vha);
1357
1358 /* Perform RISC reset. */
1359 qla24xx_reset_risc(vha);
1360 }
1361
1362 /**
1363 * qla2x00_chip_diag() - Test chip for proper operation.
1364 * @ha: HA context
1365 *
1366 * Returns 0 on success.
1367 */
1368 int
qla2x00_chip_diag(scsi_qla_host_t * vha)1369 qla2x00_chip_diag(scsi_qla_host_t *vha)
1370 {
1371 int rval;
1372 struct qla_hw_data *ha = vha->hw;
1373 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1374 unsigned long flags = 0;
1375 uint16_t data;
1376 uint32_t cnt;
1377 uint16_t mb[5];
1378 struct req_que *req = ha->req_q_map[0];
1379
1380 /* Assume a failed state */
1381 rval = QLA_FUNCTION_FAILED;
1382
1383 ql_dbg(ql_dbg_init, vha, 0x007b,
1384 "Testing device at %lx.\n", (u_long)®->flash_address);
1385
1386 spin_lock_irqsave(&ha->hardware_lock, flags);
1387
1388 /* Reset ISP chip. */
1389 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET);
1390
1391 /*
1392 * We need to have a delay here since the card will not respond while
1393 * in reset causing an MCA on some architectures.
1394 */
1395 udelay(20);
1396 data = qla2x00_debounce_register(®->ctrl_status);
1397 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
1398 udelay(5);
1399 data = RD_REG_WORD(®->ctrl_status);
1400 barrier();
1401 }
1402
1403 if (!cnt)
1404 goto chip_diag_failed;
1405
1406 ql_dbg(ql_dbg_init, vha, 0x007c,
1407 "Reset register cleared by chip reset.\n");
1408
1409 /* Reset RISC processor. */
1410 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
1411 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
1412
1413 /* Workaround for QLA2312 PCI parity error */
1414 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1415 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
1416 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
1417 udelay(5);
1418 data = RD_MAILBOX_REG(ha, reg, 0);
1419 barrier();
1420 }
1421 } else
1422 udelay(10);
1423
1424 if (!cnt)
1425 goto chip_diag_failed;
1426
1427 /* Check product ID of chip */
1428 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n");
1429
1430 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
1431 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
1432 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
1433 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
1434 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
1435 mb[3] != PROD_ID_3) {
1436 ql_log(ql_log_warn, vha, 0x0062,
1437 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
1438 mb[1], mb[2], mb[3]);
1439
1440 goto chip_diag_failed;
1441 }
1442 ha->product_id[0] = mb[1];
1443 ha->product_id[1] = mb[2];
1444 ha->product_id[2] = mb[3];
1445 ha->product_id[3] = mb[4];
1446
1447 /* Adjust fw RISC transfer size */
1448 if (req->length > 1024)
1449 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
1450 else
1451 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
1452 req->length;
1453
1454 if (IS_QLA2200(ha) &&
1455 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
1456 /* Limit firmware transfer size with a 2200A */
1457 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1458
1459 ha->device_type |= DT_ISP2200A;
1460 ha->fw_transfer_size = 128;
1461 }
1462
1463 /* Wrap Incoming Mailboxes Test. */
1464 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1465
1466 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
1467 rval = qla2x00_mbx_reg_test(vha);
1468 if (rval)
1469 ql_log(ql_log_warn, vha, 0x0080,
1470 "Failed mailbox send register test.\n");
1471 else
1472 /* Flag a successful rval */
1473 rval = QLA_SUCCESS;
1474 spin_lock_irqsave(&ha->hardware_lock, flags);
1475
1476 chip_diag_failed:
1477 if (rval)
1478 ql_log(ql_log_info, vha, 0x0081,
1479 "Chip diagnostics **** FAILED ****.\n");
1480
1481 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1482
1483 return (rval);
1484 }
1485
1486 /**
1487 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
1488 * @ha: HA context
1489 *
1490 * Returns 0 on success.
1491 */
1492 int
qla24xx_chip_diag(scsi_qla_host_t * vha)1493 qla24xx_chip_diag(scsi_qla_host_t *vha)
1494 {
1495 int rval;
1496 struct qla_hw_data *ha = vha->hw;
1497 struct req_que *req = ha->req_q_map[0];
1498
1499 if (IS_P3P_TYPE(ha))
1500 return QLA_SUCCESS;
1501
1502 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
1503
1504 rval = qla2x00_mbx_reg_test(vha);
1505 if (rval) {
1506 ql_log(ql_log_warn, vha, 0x0082,
1507 "Failed mailbox send register test.\n");
1508 } else {
1509 /* Flag a successful rval */
1510 rval = QLA_SUCCESS;
1511 }
1512
1513 return rval;
1514 }
1515
1516 void
qla2x00_alloc_fw_dump(scsi_qla_host_t * vha)1517 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
1518 {
1519 int rval;
1520 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
1521 eft_size, fce_size, mq_size;
1522 dma_addr_t tc_dma;
1523 void *tc;
1524 struct qla_hw_data *ha = vha->hw;
1525 struct req_que *req = ha->req_q_map[0];
1526 struct rsp_que *rsp = ha->rsp_q_map[0];
1527
1528 if (ha->fw_dump) {
1529 ql_dbg(ql_dbg_init, vha, 0x00bd,
1530 "Firmware dump already allocated.\n");
1531 return;
1532 }
1533
1534 ha->fw_dumped = 0;
1535 ha->fw_dump_cap_flags = 0;
1536 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
1537 req_q_size = rsp_q_size = 0;
1538
1539 if (IS_QLA27XX(ha))
1540 goto try_fce;
1541
1542 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
1543 fixed_size = sizeof(struct qla2100_fw_dump);
1544 } else if (IS_QLA23XX(ha)) {
1545 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
1546 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
1547 sizeof(uint16_t);
1548 } else if (IS_FWI2_CAPABLE(ha)) {
1549 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
1550 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
1551 else if (IS_QLA81XX(ha))
1552 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
1553 else if (IS_QLA25XX(ha))
1554 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
1555 else
1556 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
1557
1558 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
1559 sizeof(uint32_t);
1560 if (ha->mqenable) {
1561 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
1562 mq_size = sizeof(struct qla2xxx_mq_chain);
1563 /*
1564 * Allocate maximum buffer size for all queues.
1565 * Resizing must be done at end-of-dump processing.
1566 */
1567 mq_size += ha->max_req_queues *
1568 (req->length * sizeof(request_t));
1569 mq_size += ha->max_rsp_queues *
1570 (rsp->length * sizeof(response_t));
1571 }
1572 if (ha->tgt.atio_ring)
1573 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
1574 /* Allocate memory for Fibre Channel Event Buffer. */
1575 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
1576 !IS_QLA27XX(ha))
1577 goto try_eft;
1578
1579 try_fce:
1580 if (ha->fce)
1581 dma_free_coherent(&ha->pdev->dev,
1582 FCE_SIZE, ha->fce, ha->fce_dma);
1583
1584 /* Allocate memory for Fibre Channel Event Buffer. */
1585 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
1586 GFP_KERNEL);
1587 if (!tc) {
1588 ql_log(ql_log_warn, vha, 0x00be,
1589 "Unable to allocate (%d KB) for FCE.\n",
1590 FCE_SIZE / 1024);
1591 goto try_eft;
1592 }
1593
1594 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
1595 ha->fce_mb, &ha->fce_bufs);
1596 if (rval) {
1597 ql_log(ql_log_warn, vha, 0x00bf,
1598 "Unable to initialize FCE (%d).\n", rval);
1599 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
1600 tc_dma);
1601 ha->flags.fce_enabled = 0;
1602 goto try_eft;
1603 }
1604 ql_dbg(ql_dbg_init, vha, 0x00c0,
1605 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
1606
1607 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
1608 ha->flags.fce_enabled = 1;
1609 ha->fce_dma = tc_dma;
1610 ha->fce = tc;
1611
1612 try_eft:
1613 if (ha->eft)
1614 dma_free_coherent(&ha->pdev->dev,
1615 EFT_SIZE, ha->eft, ha->eft_dma);
1616
1617 /* Allocate memory for Extended Trace Buffer. */
1618 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
1619 GFP_KERNEL);
1620 if (!tc) {
1621 ql_log(ql_log_warn, vha, 0x00c1,
1622 "Unable to allocate (%d KB) for EFT.\n",
1623 EFT_SIZE / 1024);
1624 goto cont_alloc;
1625 }
1626
1627 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
1628 if (rval) {
1629 ql_log(ql_log_warn, vha, 0x00c2,
1630 "Unable to initialize EFT (%d).\n", rval);
1631 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
1632 tc_dma);
1633 goto cont_alloc;
1634 }
1635 ql_dbg(ql_dbg_init, vha, 0x00c3,
1636 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
1637
1638 eft_size = EFT_SIZE;
1639 ha->eft_dma = tc_dma;
1640 ha->eft = tc;
1641 }
1642
1643 cont_alloc:
1644 if (IS_QLA27XX(ha)) {
1645 if (!ha->fw_dump_template) {
1646 ql_log(ql_log_warn, vha, 0x00ba,
1647 "Failed missing fwdump template\n");
1648 return;
1649 }
1650 dump_size = qla27xx_fwdt_calculate_dump_size(vha);
1651 ql_dbg(ql_dbg_init, vha, 0x00fa,
1652 "-> allocating fwdump (%x bytes)...\n", dump_size);
1653 goto allocate;
1654 }
1655
1656 req_q_size = req->length * sizeof(request_t);
1657 rsp_q_size = rsp->length * sizeof(response_t);
1658 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
1659 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
1660 ha->chain_offset = dump_size;
1661 dump_size += mq_size + fce_size;
1662
1663 allocate:
1664 ha->fw_dump = vmalloc(dump_size);
1665 if (!ha->fw_dump) {
1666 ql_log(ql_log_warn, vha, 0x00c4,
1667 "Unable to allocate (%d KB) for firmware dump.\n",
1668 dump_size / 1024);
1669
1670 if (ha->fce) {
1671 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
1672 ha->fce_dma);
1673 ha->fce = NULL;
1674 ha->fce_dma = 0;
1675 }
1676
1677 if (ha->eft) {
1678 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
1679 ha->eft_dma);
1680 ha->eft = NULL;
1681 ha->eft_dma = 0;
1682 }
1683 return;
1684 }
1685 ha->fw_dump_len = dump_size;
1686 ql_dbg(ql_dbg_init, vha, 0x00c5,
1687 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
1688
1689 if (IS_QLA27XX(ha))
1690 return;
1691
1692 ha->fw_dump->signature[0] = 'Q';
1693 ha->fw_dump->signature[1] = 'L';
1694 ha->fw_dump->signature[2] = 'G';
1695 ha->fw_dump->signature[3] = 'C';
1696 ha->fw_dump->version = htonl(1);
1697
1698 ha->fw_dump->fixed_size = htonl(fixed_size);
1699 ha->fw_dump->mem_size = htonl(mem_size);
1700 ha->fw_dump->req_q_size = htonl(req_q_size);
1701 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
1702
1703 ha->fw_dump->eft_size = htonl(eft_size);
1704 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
1705 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
1706
1707 ha->fw_dump->header_size =
1708 htonl(offsetof(struct qla2xxx_fw_dump, isp));
1709 }
1710
1711 static int
qla81xx_mpi_sync(scsi_qla_host_t * vha)1712 qla81xx_mpi_sync(scsi_qla_host_t *vha)
1713 {
1714 #define MPS_MASK 0xe0
1715 int rval;
1716 uint16_t dc;
1717 uint32_t dw;
1718
1719 if (!IS_QLA81XX(vha->hw))
1720 return QLA_SUCCESS;
1721
1722 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
1723 if (rval != QLA_SUCCESS) {
1724 ql_log(ql_log_warn, vha, 0x0105,
1725 "Unable to acquire semaphore.\n");
1726 goto done;
1727 }
1728
1729 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
1730 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
1731 if (rval != QLA_SUCCESS) {
1732 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
1733 goto done_release;
1734 }
1735
1736 dc &= MPS_MASK;
1737 if (dc == (dw & MPS_MASK))
1738 goto done_release;
1739
1740 dw &= ~MPS_MASK;
1741 dw |= dc;
1742 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
1743 if (rval != QLA_SUCCESS) {
1744 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
1745 }
1746
1747 done_release:
1748 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
1749 if (rval != QLA_SUCCESS) {
1750 ql_log(ql_log_warn, vha, 0x006d,
1751 "Unable to release semaphore.\n");
1752 }
1753
1754 done:
1755 return rval;
1756 }
1757
1758 int
qla2x00_alloc_outstanding_cmds(struct qla_hw_data * ha,struct req_que * req)1759 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
1760 {
1761 /* Don't try to reallocate the array */
1762 if (req->outstanding_cmds)
1763 return QLA_SUCCESS;
1764
1765 if (!IS_FWI2_CAPABLE(ha) || (ha->mqiobase &&
1766 (ql2xmultique_tag || ql2xmaxqueues > 1)))
1767 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
1768 else {
1769 if (ha->fw_xcb_count <= ha->fw_iocb_count)
1770 req->num_outstanding_cmds = ha->fw_xcb_count;
1771 else
1772 req->num_outstanding_cmds = ha->fw_iocb_count;
1773 }
1774
1775 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
1776 req->num_outstanding_cmds, GFP_KERNEL);
1777
1778 if (!req->outstanding_cmds) {
1779 /*
1780 * Try to allocate a minimal size just so we can get through
1781 * initialization.
1782 */
1783 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
1784 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
1785 req->num_outstanding_cmds, GFP_KERNEL);
1786
1787 if (!req->outstanding_cmds) {
1788 ql_log(ql_log_fatal, NULL, 0x0126,
1789 "Failed to allocate memory for "
1790 "outstanding_cmds for req_que %p.\n", req);
1791 req->num_outstanding_cmds = 0;
1792 return QLA_FUNCTION_FAILED;
1793 }
1794 }
1795
1796 return QLA_SUCCESS;
1797 }
1798
1799 /**
1800 * qla2x00_setup_chip() - Load and start RISC firmware.
1801 * @ha: HA context
1802 *
1803 * Returns 0 on success.
1804 */
1805 static int
qla2x00_setup_chip(scsi_qla_host_t * vha)1806 qla2x00_setup_chip(scsi_qla_host_t *vha)
1807 {
1808 int rval;
1809 uint32_t srisc_address = 0;
1810 struct qla_hw_data *ha = vha->hw;
1811 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1812 unsigned long flags;
1813 uint16_t fw_major_version;
1814
1815 if (IS_P3P_TYPE(ha)) {
1816 rval = ha->isp_ops->load_risc(vha, &srisc_address);
1817 if (rval == QLA_SUCCESS) {
1818 qla2x00_stop_firmware(vha);
1819 goto enable_82xx_npiv;
1820 } else
1821 goto failed;
1822 }
1823
1824 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1825 /* Disable SRAM, Instruction RAM and GP RAM parity. */
1826 spin_lock_irqsave(&ha->hardware_lock, flags);
1827 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0));
1828 RD_REG_WORD(®->hccr);
1829 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1830 }
1831
1832 qla81xx_mpi_sync(vha);
1833
1834 /* Load firmware sequences */
1835 rval = ha->isp_ops->load_risc(vha, &srisc_address);
1836 if (rval == QLA_SUCCESS) {
1837 ql_dbg(ql_dbg_init, vha, 0x00c9,
1838 "Verifying Checksum of loaded RISC code.\n");
1839
1840 rval = qla2x00_verify_checksum(vha, srisc_address);
1841 if (rval == QLA_SUCCESS) {
1842 /* Start firmware execution. */
1843 ql_dbg(ql_dbg_init, vha, 0x00ca,
1844 "Starting firmware.\n");
1845
1846 rval = qla2x00_execute_fw(vha, srisc_address);
1847 /* Retrieve firmware information. */
1848 if (rval == QLA_SUCCESS) {
1849 enable_82xx_npiv:
1850 fw_major_version = ha->fw_major_version;
1851 if (IS_P3P_TYPE(ha))
1852 qla82xx_check_md_needed(vha);
1853 else
1854 rval = qla2x00_get_fw_version(vha);
1855 if (rval != QLA_SUCCESS)
1856 goto failed;
1857 ha->flags.npiv_supported = 0;
1858 if (IS_QLA2XXX_MIDTYPE(ha) &&
1859 (ha->fw_attributes & BIT_2)) {
1860 ha->flags.npiv_supported = 1;
1861 if ((!ha->max_npiv_vports) ||
1862 ((ha->max_npiv_vports + 1) %
1863 MIN_MULTI_ID_FABRIC))
1864 ha->max_npiv_vports =
1865 MIN_MULTI_ID_FABRIC - 1;
1866 }
1867 qla2x00_get_resource_cnts(vha, NULL,
1868 &ha->fw_xcb_count, NULL, &ha->fw_iocb_count,
1869 &ha->max_npiv_vports, NULL);
1870
1871 /*
1872 * Allocate the array of outstanding commands
1873 * now that we know the firmware resources.
1874 */
1875 rval = qla2x00_alloc_outstanding_cmds(ha,
1876 vha->req);
1877 if (rval != QLA_SUCCESS)
1878 goto failed;
1879
1880 if (!fw_major_version && ql2xallocfwdump
1881 && !(IS_P3P_TYPE(ha)))
1882 qla2x00_alloc_fw_dump(vha);
1883 } else {
1884 goto failed;
1885 }
1886 } else {
1887 ql_log(ql_log_fatal, vha, 0x00cd,
1888 "ISP Firmware failed checksum.\n");
1889 goto failed;
1890 }
1891 } else
1892 goto failed;
1893
1894 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1895 /* Enable proper parity. */
1896 spin_lock_irqsave(&ha->hardware_lock, flags);
1897 if (IS_QLA2300(ha))
1898 /* SRAM parity */
1899 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1);
1900 else
1901 /* SRAM, Instruction RAM and GP RAM parity */
1902 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7);
1903 RD_REG_WORD(®->hccr);
1904 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1905 }
1906
1907 if (IS_QLA27XX(ha))
1908 ha->flags.fac_supported = 1;
1909 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1910 uint32_t size;
1911
1912 rval = qla81xx_fac_get_sector_size(vha, &size);
1913 if (rval == QLA_SUCCESS) {
1914 ha->flags.fac_supported = 1;
1915 ha->fdt_block_size = size << 2;
1916 } else {
1917 ql_log(ql_log_warn, vha, 0x00ce,
1918 "Unsupported FAC firmware (%d.%02d.%02d).\n",
1919 ha->fw_major_version, ha->fw_minor_version,
1920 ha->fw_subminor_version);
1921
1922 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
1923 ha->flags.fac_supported = 0;
1924 rval = QLA_SUCCESS;
1925 }
1926 }
1927 }
1928 failed:
1929 if (rval) {
1930 ql_log(ql_log_fatal, vha, 0x00cf,
1931 "Setup chip ****FAILED****.\n");
1932 }
1933
1934 return (rval);
1935 }
1936
1937 /**
1938 * qla2x00_init_response_q_entries() - Initializes response queue entries.
1939 * @ha: HA context
1940 *
1941 * Beginning of request ring has initialization control block already built
1942 * by nvram config routine.
1943 *
1944 * Returns 0 on success.
1945 */
1946 void
qla2x00_init_response_q_entries(struct rsp_que * rsp)1947 qla2x00_init_response_q_entries(struct rsp_que *rsp)
1948 {
1949 uint16_t cnt;
1950 response_t *pkt;
1951
1952 rsp->ring_ptr = rsp->ring;
1953 rsp->ring_index = 0;
1954 rsp->status_srb = NULL;
1955 pkt = rsp->ring_ptr;
1956 for (cnt = 0; cnt < rsp->length; cnt++) {
1957 pkt->signature = RESPONSE_PROCESSED;
1958 pkt++;
1959 }
1960 }
1961
1962 /**
1963 * qla2x00_update_fw_options() - Read and process firmware options.
1964 * @ha: HA context
1965 *
1966 * Returns 0 on success.
1967 */
1968 void
qla2x00_update_fw_options(scsi_qla_host_t * vha)1969 qla2x00_update_fw_options(scsi_qla_host_t *vha)
1970 {
1971 uint16_t swing, emphasis, tx_sens, rx_sens;
1972 struct qla_hw_data *ha = vha->hw;
1973
1974 memset(ha->fw_options, 0, sizeof(ha->fw_options));
1975 qla2x00_get_fw_options(vha, ha->fw_options);
1976
1977 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1978 return;
1979
1980 /* Serial Link options. */
1981 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
1982 "Serial link options.\n");
1983 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
1984 (uint8_t *)&ha->fw_seriallink_options,
1985 sizeof(ha->fw_seriallink_options));
1986
1987 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
1988 if (ha->fw_seriallink_options[3] & BIT_2) {
1989 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
1990
1991 /* 1G settings */
1992 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
1993 emphasis = (ha->fw_seriallink_options[2] &
1994 (BIT_4 | BIT_3)) >> 3;
1995 tx_sens = ha->fw_seriallink_options[0] &
1996 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1997 rx_sens = (ha->fw_seriallink_options[0] &
1998 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1999 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
2000 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
2001 if (rx_sens == 0x0)
2002 rx_sens = 0x3;
2003 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
2004 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
2005 ha->fw_options[10] |= BIT_5 |
2006 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
2007 (tx_sens & (BIT_1 | BIT_0));
2008
2009 /* 2G settings */
2010 swing = (ha->fw_seriallink_options[2] &
2011 (BIT_7 | BIT_6 | BIT_5)) >> 5;
2012 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
2013 tx_sens = ha->fw_seriallink_options[1] &
2014 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2015 rx_sens = (ha->fw_seriallink_options[1] &
2016 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
2017 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
2018 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
2019 if (rx_sens == 0x0)
2020 rx_sens = 0x3;
2021 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
2022 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
2023 ha->fw_options[11] |= BIT_5 |
2024 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
2025 (tx_sens & (BIT_1 | BIT_0));
2026 }
2027
2028 /* FCP2 options. */
2029 /* Return command IOCBs without waiting for an ABTS to complete. */
2030 ha->fw_options[3] |= BIT_13;
2031
2032 /* LED scheme. */
2033 if (ha->flags.enable_led_scheme)
2034 ha->fw_options[2] |= BIT_12;
2035
2036 /* Detect ISP6312. */
2037 if (IS_QLA6312(ha))
2038 ha->fw_options[2] |= BIT_13;
2039
2040 /* Update firmware options. */
2041 qla2x00_set_fw_options(vha, ha->fw_options);
2042 }
2043
2044 void
qla24xx_update_fw_options(scsi_qla_host_t * vha)2045 qla24xx_update_fw_options(scsi_qla_host_t *vha)
2046 {
2047 int rval;
2048 struct qla_hw_data *ha = vha->hw;
2049
2050 if (IS_P3P_TYPE(ha))
2051 return;
2052
2053 /* Update Serial Link options. */
2054 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
2055 return;
2056
2057 rval = qla2x00_set_serdes_params(vha,
2058 le16_to_cpu(ha->fw_seriallink_options24[1]),
2059 le16_to_cpu(ha->fw_seriallink_options24[2]),
2060 le16_to_cpu(ha->fw_seriallink_options24[3]));
2061 if (rval != QLA_SUCCESS) {
2062 ql_log(ql_log_warn, vha, 0x0104,
2063 "Unable to update Serial Link options (%x).\n", rval);
2064 }
2065 }
2066
2067 void
qla2x00_config_rings(struct scsi_qla_host * vha)2068 qla2x00_config_rings(struct scsi_qla_host *vha)
2069 {
2070 struct qla_hw_data *ha = vha->hw;
2071 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2072 struct req_que *req = ha->req_q_map[0];
2073 struct rsp_que *rsp = ha->rsp_q_map[0];
2074
2075 /* Setup ring parameters in initialization control block. */
2076 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
2077 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
2078 ha->init_cb->request_q_length = cpu_to_le16(req->length);
2079 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
2080 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
2081 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
2082 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
2083 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
2084
2085 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
2086 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
2087 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
2088 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
2089 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
2090 }
2091
2092 void
qla24xx_config_rings(struct scsi_qla_host * vha)2093 qla24xx_config_rings(struct scsi_qla_host *vha)
2094 {
2095 struct qla_hw_data *ha = vha->hw;
2096 device_reg_t *reg = ISP_QUE_REG(ha, 0);
2097 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
2098 struct qla_msix_entry *msix;
2099 struct init_cb_24xx *icb;
2100 uint16_t rid = 0;
2101 struct req_que *req = ha->req_q_map[0];
2102 struct rsp_que *rsp = ha->rsp_q_map[0];
2103
2104 /* Setup ring parameters in initialization control block. */
2105 icb = (struct init_cb_24xx *)ha->init_cb;
2106 icb->request_q_outpointer = cpu_to_le16(0);
2107 icb->response_q_inpointer = cpu_to_le16(0);
2108 icb->request_q_length = cpu_to_le16(req->length);
2109 icb->response_q_length = cpu_to_le16(rsp->length);
2110 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
2111 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
2112 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
2113 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
2114
2115 /* Setup ATIO queue dma pointers for target mode */
2116 icb->atio_q_inpointer = cpu_to_le16(0);
2117 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
2118 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
2119 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
2120
2121 if (IS_SHADOW_REG_CAPABLE(ha))
2122 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
2123
2124 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2125 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
2126 icb->rid = cpu_to_le16(rid);
2127 if (ha->flags.msix_enabled) {
2128 msix = &ha->msix_entries[1];
2129 ql_dbg(ql_dbg_init, vha, 0x00fd,
2130 "Registering vector 0x%x for base que.\n",
2131 msix->entry);
2132 icb->msix = cpu_to_le16(msix->entry);
2133 }
2134 /* Use alternate PCI bus number */
2135 if (MSB(rid))
2136 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
2137 /* Use alternate PCI devfn */
2138 if (LSB(rid))
2139 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
2140
2141 /* Use Disable MSIX Handshake mode for capable adapters */
2142 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
2143 (ha->flags.msix_enabled)) {
2144 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
2145 ha->flags.disable_msix_handshake = 1;
2146 ql_dbg(ql_dbg_init, vha, 0x00fe,
2147 "MSIX Handshake Disable Mode turned on.\n");
2148 } else {
2149 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
2150 }
2151 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
2152
2153 WRT_REG_DWORD(®->isp25mq.req_q_in, 0);
2154 WRT_REG_DWORD(®->isp25mq.req_q_out, 0);
2155 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0);
2156 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0);
2157 } else {
2158 WRT_REG_DWORD(®->isp24.req_q_in, 0);
2159 WRT_REG_DWORD(®->isp24.req_q_out, 0);
2160 WRT_REG_DWORD(®->isp24.rsp_q_in, 0);
2161 WRT_REG_DWORD(®->isp24.rsp_q_out, 0);
2162 }
2163 qlt_24xx_config_rings(vha);
2164
2165 /* PCI posting */
2166 RD_REG_DWORD(&ioreg->hccr);
2167 }
2168
2169 /**
2170 * qla2x00_init_rings() - Initializes firmware.
2171 * @ha: HA context
2172 *
2173 * Beginning of request ring has initialization control block already built
2174 * by nvram config routine.
2175 *
2176 * Returns 0 on success.
2177 */
2178 int
qla2x00_init_rings(scsi_qla_host_t * vha)2179 qla2x00_init_rings(scsi_qla_host_t *vha)
2180 {
2181 int rval;
2182 unsigned long flags = 0;
2183 int cnt, que;
2184 struct qla_hw_data *ha = vha->hw;
2185 struct req_que *req;
2186 struct rsp_que *rsp;
2187 struct mid_init_cb_24xx *mid_init_cb =
2188 (struct mid_init_cb_24xx *) ha->init_cb;
2189
2190 spin_lock_irqsave(&ha->hardware_lock, flags);
2191
2192 /* Clear outstanding commands array. */
2193 for (que = 0; que < ha->max_req_queues; que++) {
2194 req = ha->req_q_map[que];
2195 if (!req || !test_bit(que, ha->req_qid_map))
2196 continue;
2197 req->out_ptr = (void *)(req->ring + req->length);
2198 *req->out_ptr = 0;
2199 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
2200 req->outstanding_cmds[cnt] = NULL;
2201
2202 req->current_outstanding_cmd = 1;
2203
2204 /* Initialize firmware. */
2205 req->ring_ptr = req->ring;
2206 req->ring_index = 0;
2207 req->cnt = req->length;
2208 }
2209
2210 for (que = 0; que < ha->max_rsp_queues; que++) {
2211 rsp = ha->rsp_q_map[que];
2212 if (!rsp || !test_bit(que, ha->rsp_qid_map))
2213 continue;
2214 rsp->in_ptr = (void *)(rsp->ring + rsp->length);
2215 *rsp->in_ptr = 0;
2216 /* Initialize response queue entries */
2217 if (IS_QLAFX00(ha))
2218 qlafx00_init_response_q_entries(rsp);
2219 else
2220 qla2x00_init_response_q_entries(rsp);
2221 }
2222
2223 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
2224 ha->tgt.atio_ring_index = 0;
2225 /* Initialize ATIO queue entries */
2226 qlt_init_atio_q_entries(vha);
2227
2228 ha->isp_ops->config_rings(vha);
2229
2230 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2231
2232 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
2233
2234 if (IS_QLAFX00(ha)) {
2235 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
2236 goto next_check;
2237 }
2238
2239 /* Update any ISP specific firmware options before initialization. */
2240 ha->isp_ops->update_fw_options(vha);
2241
2242 if (ha->flags.npiv_supported) {
2243 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
2244 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
2245 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
2246 }
2247
2248 if (IS_FWI2_CAPABLE(ha)) {
2249 mid_init_cb->options = cpu_to_le16(BIT_1);
2250 mid_init_cb->init_cb.execution_throttle =
2251 cpu_to_le16(ha->fw_xcb_count);
2252 /* D-Port Status */
2253 if (IS_DPORT_CAPABLE(ha))
2254 mid_init_cb->init_cb.firmware_options_1 |=
2255 cpu_to_le16(BIT_7);
2256 /* Enable FA-WWPN */
2257 ha->flags.fawwpn_enabled =
2258 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) ? 1 : 0;
2259 ql_dbg(ql_dbg_init, vha, 0x0141, "FA-WWPN Support: %s.\n",
2260 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
2261 }
2262
2263 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
2264 next_check:
2265 if (rval) {
2266 ql_log(ql_log_fatal, vha, 0x00d2,
2267 "Init Firmware **** FAILED ****.\n");
2268 } else {
2269 ql_dbg(ql_dbg_init, vha, 0x00d3,
2270 "Init Firmware -- success.\n");
2271 }
2272
2273 return (rval);
2274 }
2275
2276 /**
2277 * qla2x00_fw_ready() - Waits for firmware ready.
2278 * @ha: HA context
2279 *
2280 * Returns 0 on success.
2281 */
2282 static int
qla2x00_fw_ready(scsi_qla_host_t * vha)2283 qla2x00_fw_ready(scsi_qla_host_t *vha)
2284 {
2285 int rval;
2286 unsigned long wtime, mtime, cs84xx_time;
2287 uint16_t min_wait; /* Minimum wait time if loop is down */
2288 uint16_t wait_time; /* Wait time if loop is coming ready */
2289 uint16_t state[6];
2290 struct qla_hw_data *ha = vha->hw;
2291
2292 if (IS_QLAFX00(vha->hw))
2293 return qlafx00_fw_ready(vha);
2294
2295 rval = QLA_SUCCESS;
2296
2297 /* Time to wait for loop down */
2298 if (IS_P3P_TYPE(ha))
2299 min_wait = 30;
2300 else
2301 min_wait = 20;
2302
2303 /*
2304 * Firmware should take at most one RATOV to login, plus 5 seconds for
2305 * our own processing.
2306 */
2307 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
2308 wait_time = min_wait;
2309 }
2310
2311 /* Min wait time if loop down */
2312 mtime = jiffies + (min_wait * HZ);
2313
2314 /* wait time before firmware ready */
2315 wtime = jiffies + (wait_time * HZ);
2316
2317 /* Wait for ISP to finish LIP */
2318 if (!vha->flags.init_done)
2319 ql_log(ql_log_info, vha, 0x801e,
2320 "Waiting for LIP to complete.\n");
2321
2322 do {
2323 memset(state, -1, sizeof(state));
2324 rval = qla2x00_get_firmware_state(vha, state);
2325 if (rval == QLA_SUCCESS) {
2326 if (state[0] < FSTATE_LOSS_OF_SYNC) {
2327 vha->device_flags &= ~DFLG_NO_CABLE;
2328 }
2329 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
2330 ql_dbg(ql_dbg_taskm, vha, 0x801f,
2331 "fw_state=%x 84xx=%x.\n", state[0],
2332 state[2]);
2333 if ((state[2] & FSTATE_LOGGED_IN) &&
2334 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
2335 ql_dbg(ql_dbg_taskm, vha, 0x8028,
2336 "Sending verify iocb.\n");
2337
2338 cs84xx_time = jiffies;
2339 rval = qla84xx_init_chip(vha);
2340 if (rval != QLA_SUCCESS) {
2341 ql_log(ql_log_warn,
2342 vha, 0x8007,
2343 "Init chip failed.\n");
2344 break;
2345 }
2346
2347 /* Add time taken to initialize. */
2348 cs84xx_time = jiffies - cs84xx_time;
2349 wtime += cs84xx_time;
2350 mtime += cs84xx_time;
2351 ql_dbg(ql_dbg_taskm, vha, 0x8008,
2352 "Increasing wait time by %ld. "
2353 "New time %ld.\n", cs84xx_time,
2354 wtime);
2355 }
2356 } else if (state[0] == FSTATE_READY) {
2357 ql_dbg(ql_dbg_taskm, vha, 0x8037,
2358 "F/W Ready - OK.\n");
2359
2360 qla2x00_get_retry_cnt(vha, &ha->retry_count,
2361 &ha->login_timeout, &ha->r_a_tov);
2362
2363 rval = QLA_SUCCESS;
2364 break;
2365 }
2366
2367 rval = QLA_FUNCTION_FAILED;
2368
2369 if (atomic_read(&vha->loop_down_timer) &&
2370 state[0] != FSTATE_READY) {
2371 /* Loop down. Timeout on min_wait for states
2372 * other than Wait for Login.
2373 */
2374 if (time_after_eq(jiffies, mtime)) {
2375 ql_log(ql_log_info, vha, 0x8038,
2376 "Cable is unplugged...\n");
2377
2378 vha->device_flags |= DFLG_NO_CABLE;
2379 break;
2380 }
2381 }
2382 } else {
2383 /* Mailbox cmd failed. Timeout on min_wait. */
2384 if (time_after_eq(jiffies, mtime) ||
2385 ha->flags.isp82xx_fw_hung)
2386 break;
2387 }
2388
2389 if (time_after_eq(jiffies, wtime))
2390 break;
2391
2392 /* Delay for a while */
2393 msleep(500);
2394 } while (1);
2395
2396 ql_dbg(ql_dbg_taskm, vha, 0x803a,
2397 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
2398 state[1], state[2], state[3], state[4], state[5], jiffies);
2399
2400 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
2401 ql_log(ql_log_warn, vha, 0x803b,
2402 "Firmware ready **** FAILED ****.\n");
2403 }
2404
2405 return (rval);
2406 }
2407
2408 /*
2409 * qla2x00_configure_hba
2410 * Setup adapter context.
2411 *
2412 * Input:
2413 * ha = adapter state pointer.
2414 *
2415 * Returns:
2416 * 0 = success
2417 *
2418 * Context:
2419 * Kernel context.
2420 */
2421 static int
qla2x00_configure_hba(scsi_qla_host_t * vha)2422 qla2x00_configure_hba(scsi_qla_host_t *vha)
2423 {
2424 int rval;
2425 uint16_t loop_id;
2426 uint16_t topo;
2427 uint16_t sw_cap;
2428 uint8_t al_pa;
2429 uint8_t area;
2430 uint8_t domain;
2431 char connect_type[22];
2432 struct qla_hw_data *ha = vha->hw;
2433 unsigned long flags;
2434 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
2435
2436 /* Get host addresses. */
2437 rval = qla2x00_get_adapter_id(vha,
2438 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
2439 if (rval != QLA_SUCCESS) {
2440 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
2441 IS_CNA_CAPABLE(ha) ||
2442 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
2443 ql_dbg(ql_dbg_disc, vha, 0x2008,
2444 "Loop is in a transition state.\n");
2445 } else {
2446 ql_log(ql_log_warn, vha, 0x2009,
2447 "Unable to get host loop ID.\n");
2448 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
2449 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
2450 ql_log(ql_log_warn, vha, 0x1151,
2451 "Doing link init.\n");
2452 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
2453 return rval;
2454 }
2455 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2456 }
2457 return (rval);
2458 }
2459
2460 if (topo == 4) {
2461 ql_log(ql_log_info, vha, 0x200a,
2462 "Cannot get topology - retrying.\n");
2463 return (QLA_FUNCTION_FAILED);
2464 }
2465
2466 vha->loop_id = loop_id;
2467
2468 /* initialize */
2469 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
2470 ha->operating_mode = LOOP;
2471 ha->switch_cap = 0;
2472
2473 switch (topo) {
2474 case 0:
2475 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
2476 ha->current_topology = ISP_CFG_NL;
2477 strcpy(connect_type, "(Loop)");
2478 break;
2479
2480 case 1:
2481 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2482 ha->switch_cap = sw_cap;
2483 ha->current_topology = ISP_CFG_FL;
2484 strcpy(connect_type, "(FL_Port)");
2485 break;
2486
2487 case 2:
2488 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
2489 ha->operating_mode = P2P;
2490 ha->current_topology = ISP_CFG_N;
2491 strcpy(connect_type, "(N_Port-to-N_Port)");
2492 break;
2493
2494 case 3:
2495 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2496 ha->switch_cap = sw_cap;
2497 ha->operating_mode = P2P;
2498 ha->current_topology = ISP_CFG_F;
2499 strcpy(connect_type, "(F_Port)");
2500 break;
2501
2502 default:
2503 ql_dbg(ql_dbg_disc, vha, 0x200f,
2504 "HBA in unknown topology %x, using NL.\n", topo);
2505 ha->current_topology = ISP_CFG_NL;
2506 strcpy(connect_type, "(Loop)");
2507 break;
2508 }
2509
2510 /* Save Host port and loop ID. */
2511 /* byte order - Big Endian */
2512 vha->d_id.b.domain = domain;
2513 vha->d_id.b.area = area;
2514 vha->d_id.b.al_pa = al_pa;
2515
2516 spin_lock_irqsave(&ha->vport_slock, flags);
2517 qlt_update_vp_map(vha, SET_AL_PA);
2518 spin_unlock_irqrestore(&ha->vport_slock, flags);
2519
2520 if (!vha->flags.init_done)
2521 ql_log(ql_log_info, vha, 0x2010,
2522 "Topology - %s, Host Loop address 0x%x.\n",
2523 connect_type, vha->loop_id);
2524
2525 return(rval);
2526 }
2527
2528 inline void
qla2x00_set_model_info(scsi_qla_host_t * vha,uint8_t * model,size_t len,char * def)2529 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
2530 char *def)
2531 {
2532 char *st, *en;
2533 uint16_t index;
2534 struct qla_hw_data *ha = vha->hw;
2535 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
2536 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
2537
2538 if (memcmp(model, BINZERO, len) != 0) {
2539 strncpy(ha->model_number, model, len);
2540 st = en = ha->model_number;
2541 en += len - 1;
2542 while (en > st) {
2543 if (*en != 0x20 && *en != 0x00)
2544 break;
2545 *en-- = '\0';
2546 }
2547
2548 index = (ha->pdev->subsystem_device & 0xff);
2549 if (use_tbl &&
2550 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
2551 index < QLA_MODEL_NAMES)
2552 strncpy(ha->model_desc,
2553 qla2x00_model_name[index * 2 + 1],
2554 sizeof(ha->model_desc) - 1);
2555 } else {
2556 index = (ha->pdev->subsystem_device & 0xff);
2557 if (use_tbl &&
2558 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
2559 index < QLA_MODEL_NAMES) {
2560 strcpy(ha->model_number,
2561 qla2x00_model_name[index * 2]);
2562 strncpy(ha->model_desc,
2563 qla2x00_model_name[index * 2 + 1],
2564 sizeof(ha->model_desc) - 1);
2565 } else {
2566 strcpy(ha->model_number, def);
2567 }
2568 }
2569 if (IS_FWI2_CAPABLE(ha))
2570 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
2571 sizeof(ha->model_desc));
2572 }
2573
2574 /* On sparc systems, obtain port and node WWN from firmware
2575 * properties.
2576 */
qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,nvram_t * nv)2577 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
2578 {
2579 #ifdef CONFIG_SPARC
2580 struct qla_hw_data *ha = vha->hw;
2581 struct pci_dev *pdev = ha->pdev;
2582 struct device_node *dp = pci_device_to_OF_node(pdev);
2583 const u8 *val;
2584 int len;
2585
2586 val = of_get_property(dp, "port-wwn", &len);
2587 if (val && len >= WWN_SIZE)
2588 memcpy(nv->port_name, val, WWN_SIZE);
2589
2590 val = of_get_property(dp, "node-wwn", &len);
2591 if (val && len >= WWN_SIZE)
2592 memcpy(nv->node_name, val, WWN_SIZE);
2593 #endif
2594 }
2595
2596 /*
2597 * NVRAM configuration for ISP 2xxx
2598 *
2599 * Input:
2600 * ha = adapter block pointer.
2601 *
2602 * Output:
2603 * initialization control block in response_ring
2604 * host adapters parameters in host adapter block
2605 *
2606 * Returns:
2607 * 0 = success.
2608 */
2609 int
qla2x00_nvram_config(scsi_qla_host_t * vha)2610 qla2x00_nvram_config(scsi_qla_host_t *vha)
2611 {
2612 int rval;
2613 uint8_t chksum = 0;
2614 uint16_t cnt;
2615 uint8_t *dptr1, *dptr2;
2616 struct qla_hw_data *ha = vha->hw;
2617 init_cb_t *icb = ha->init_cb;
2618 nvram_t *nv = ha->nvram;
2619 uint8_t *ptr = ha->nvram;
2620 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2621
2622 rval = QLA_SUCCESS;
2623
2624 /* Determine NVRAM starting address. */
2625 ha->nvram_size = sizeof(nvram_t);
2626 ha->nvram_base = 0;
2627 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
2628 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1)
2629 ha->nvram_base = 0x80;
2630
2631 /* Get NVRAM data and calculate checksum. */
2632 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
2633 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
2634 chksum += *ptr++;
2635
2636 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
2637 "Contents of NVRAM.\n");
2638 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
2639 (uint8_t *)nv, ha->nvram_size);
2640
2641 /* Bad NVRAM data, set defaults parameters. */
2642 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
2643 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
2644 /* Reset NVRAM data. */
2645 ql_log(ql_log_warn, vha, 0x0064,
2646 "Inconsistent NVRAM "
2647 "detected: checksum=0x%x id=%c version=0x%x.\n",
2648 chksum, nv->id[0], nv->nvram_version);
2649 ql_log(ql_log_warn, vha, 0x0065,
2650 "Falling back to "
2651 "functioning (yet invalid -- WWPN) defaults.\n");
2652
2653 /*
2654 * Set default initialization control block.
2655 */
2656 memset(nv, 0, ha->nvram_size);
2657 nv->parameter_block_version = ICB_VERSION;
2658
2659 if (IS_QLA23XX(ha)) {
2660 nv->firmware_options[0] = BIT_2 | BIT_1;
2661 nv->firmware_options[1] = BIT_7 | BIT_5;
2662 nv->add_firmware_options[0] = BIT_5;
2663 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2664 nv->frame_payload_size = 2048;
2665 nv->special_options[1] = BIT_7;
2666 } else if (IS_QLA2200(ha)) {
2667 nv->firmware_options[0] = BIT_2 | BIT_1;
2668 nv->firmware_options[1] = BIT_7 | BIT_5;
2669 nv->add_firmware_options[0] = BIT_5;
2670 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2671 nv->frame_payload_size = 1024;
2672 } else if (IS_QLA2100(ha)) {
2673 nv->firmware_options[0] = BIT_3 | BIT_1;
2674 nv->firmware_options[1] = BIT_5;
2675 nv->frame_payload_size = 1024;
2676 }
2677
2678 nv->max_iocb_allocation = cpu_to_le16(256);
2679 nv->execution_throttle = cpu_to_le16(16);
2680 nv->retry_count = 8;
2681 nv->retry_delay = 1;
2682
2683 nv->port_name[0] = 33;
2684 nv->port_name[3] = 224;
2685 nv->port_name[4] = 139;
2686
2687 qla2xxx_nvram_wwn_from_ofw(vha, nv);
2688
2689 nv->login_timeout = 4;
2690
2691 /*
2692 * Set default host adapter parameters
2693 */
2694 nv->host_p[1] = BIT_2;
2695 nv->reset_delay = 5;
2696 nv->port_down_retry_count = 8;
2697 nv->max_luns_per_target = cpu_to_le16(8);
2698 nv->link_down_timeout = 60;
2699
2700 rval = 1;
2701 }
2702
2703 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
2704 /*
2705 * The SN2 does not provide BIOS emulation which means you can't change
2706 * potentially bogus BIOS settings. Force the use of default settings
2707 * for link rate and frame size. Hope that the rest of the settings
2708 * are valid.
2709 */
2710 if (ia64_platform_is("sn2")) {
2711 nv->frame_payload_size = 2048;
2712 if (IS_QLA23XX(ha))
2713 nv->special_options[1] = BIT_7;
2714 }
2715 #endif
2716
2717 /* Reset Initialization control block */
2718 memset(icb, 0, ha->init_cb_size);
2719
2720 /*
2721 * Setup driver NVRAM options.
2722 */
2723 nv->firmware_options[0] |= (BIT_6 | BIT_1);
2724 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
2725 nv->firmware_options[1] |= (BIT_5 | BIT_0);
2726 nv->firmware_options[1] &= ~BIT_4;
2727
2728 if (IS_QLA23XX(ha)) {
2729 nv->firmware_options[0] |= BIT_2;
2730 nv->firmware_options[0] &= ~BIT_3;
2731 nv->special_options[0] &= ~BIT_6;
2732 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
2733
2734 if (IS_QLA2300(ha)) {
2735 if (ha->fb_rev == FPM_2310) {
2736 strcpy(ha->model_number, "QLA2310");
2737 } else {
2738 strcpy(ha->model_number, "QLA2300");
2739 }
2740 } else {
2741 qla2x00_set_model_info(vha, nv->model_number,
2742 sizeof(nv->model_number), "QLA23xx");
2743 }
2744 } else if (IS_QLA2200(ha)) {
2745 nv->firmware_options[0] |= BIT_2;
2746 /*
2747 * 'Point-to-point preferred, else loop' is not a safe
2748 * connection mode setting.
2749 */
2750 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
2751 (BIT_5 | BIT_4)) {
2752 /* Force 'loop preferred, else point-to-point'. */
2753 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
2754 nv->add_firmware_options[0] |= BIT_5;
2755 }
2756 strcpy(ha->model_number, "QLA22xx");
2757 } else /*if (IS_QLA2100(ha))*/ {
2758 strcpy(ha->model_number, "QLA2100");
2759 }
2760
2761 /*
2762 * Copy over NVRAM RISC parameter block to initialization control block.
2763 */
2764 dptr1 = (uint8_t *)icb;
2765 dptr2 = (uint8_t *)&nv->parameter_block_version;
2766 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
2767 while (cnt--)
2768 *dptr1++ = *dptr2++;
2769
2770 /* Copy 2nd half. */
2771 dptr1 = (uint8_t *)icb->add_firmware_options;
2772 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
2773 while (cnt--)
2774 *dptr1++ = *dptr2++;
2775
2776 /* Use alternate WWN? */
2777 if (nv->host_p[1] & BIT_7) {
2778 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
2779 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
2780 }
2781
2782 /* Prepare nodename */
2783 if ((icb->firmware_options[1] & BIT_6) == 0) {
2784 /*
2785 * Firmware will apply the following mask if the nodename was
2786 * not provided.
2787 */
2788 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
2789 icb->node_name[0] &= 0xF0;
2790 }
2791
2792 /*
2793 * Set host adapter parameters.
2794 */
2795
2796 /*
2797 * BIT_7 in the host-parameters section allows for modification to
2798 * internal driver logging.
2799 */
2800 if (nv->host_p[0] & BIT_7)
2801 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
2802 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
2803 /* Always load RISC code on non ISP2[12]00 chips. */
2804 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
2805 ha->flags.disable_risc_code_load = 0;
2806 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
2807 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
2808 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
2809 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
2810 ha->flags.disable_serdes = 0;
2811
2812 ha->operating_mode =
2813 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
2814
2815 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
2816 sizeof(ha->fw_seriallink_options));
2817
2818 /* save HBA serial number */
2819 ha->serial0 = icb->port_name[5];
2820 ha->serial1 = icb->port_name[6];
2821 ha->serial2 = icb->port_name[7];
2822 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
2823 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
2824
2825 icb->execution_throttle = cpu_to_le16(0xFFFF);
2826
2827 ha->retry_count = nv->retry_count;
2828
2829 /* Set minimum login_timeout to 4 seconds. */
2830 if (nv->login_timeout != ql2xlogintimeout)
2831 nv->login_timeout = ql2xlogintimeout;
2832 if (nv->login_timeout < 4)
2833 nv->login_timeout = 4;
2834 ha->login_timeout = nv->login_timeout;
2835 icb->login_timeout = nv->login_timeout;
2836
2837 /* Set minimum RATOV to 100 tenths of a second. */
2838 ha->r_a_tov = 100;
2839
2840 ha->loop_reset_delay = nv->reset_delay;
2841
2842 /* Link Down Timeout = 0:
2843 *
2844 * When Port Down timer expires we will start returning
2845 * I/O's to OS with "DID_NO_CONNECT".
2846 *
2847 * Link Down Timeout != 0:
2848 *
2849 * The driver waits for the link to come up after link down
2850 * before returning I/Os to OS with "DID_NO_CONNECT".
2851 */
2852 if (nv->link_down_timeout == 0) {
2853 ha->loop_down_abort_time =
2854 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
2855 } else {
2856 ha->link_down_timeout = nv->link_down_timeout;
2857 ha->loop_down_abort_time =
2858 (LOOP_DOWN_TIME - ha->link_down_timeout);
2859 }
2860
2861 /*
2862 * Need enough time to try and get the port back.
2863 */
2864 ha->port_down_retry_count = nv->port_down_retry_count;
2865 if (qlport_down_retry)
2866 ha->port_down_retry_count = qlport_down_retry;
2867 /* Set login_retry_count */
2868 ha->login_retry_count = nv->retry_count;
2869 if (ha->port_down_retry_count == nv->port_down_retry_count &&
2870 ha->port_down_retry_count > 3)
2871 ha->login_retry_count = ha->port_down_retry_count;
2872 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
2873 ha->login_retry_count = ha->port_down_retry_count;
2874 if (ql2xloginretrycount)
2875 ha->login_retry_count = ql2xloginretrycount;
2876
2877 icb->lun_enables = cpu_to_le16(0);
2878 icb->command_resource_count = 0;
2879 icb->immediate_notify_resource_count = 0;
2880 icb->timeout = cpu_to_le16(0);
2881
2882 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2883 /* Enable RIO */
2884 icb->firmware_options[0] &= ~BIT_3;
2885 icb->add_firmware_options[0] &=
2886 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2887 icb->add_firmware_options[0] |= BIT_2;
2888 icb->response_accumulation_timer = 3;
2889 icb->interrupt_delay_timer = 5;
2890
2891 vha->flags.process_response_queue = 1;
2892 } else {
2893 /* Enable ZIO. */
2894 if (!vha->flags.init_done) {
2895 ha->zio_mode = icb->add_firmware_options[0] &
2896 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2897 ha->zio_timer = icb->interrupt_delay_timer ?
2898 icb->interrupt_delay_timer: 2;
2899 }
2900 icb->add_firmware_options[0] &=
2901 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2902 vha->flags.process_response_queue = 0;
2903 if (ha->zio_mode != QLA_ZIO_DISABLED) {
2904 ha->zio_mode = QLA_ZIO_MODE_6;
2905
2906 ql_log(ql_log_info, vha, 0x0068,
2907 "ZIO mode %d enabled; timer delay (%d us).\n",
2908 ha->zio_mode, ha->zio_timer * 100);
2909
2910 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
2911 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
2912 vha->flags.process_response_queue = 1;
2913 }
2914 }
2915
2916 if (rval) {
2917 ql_log(ql_log_warn, vha, 0x0069,
2918 "NVRAM configuration failed.\n");
2919 }
2920 return (rval);
2921 }
2922
2923 static void
qla2x00_rport_del(void * data)2924 qla2x00_rport_del(void *data)
2925 {
2926 fc_port_t *fcport = data;
2927 struct fc_rport *rport;
2928 unsigned long flags;
2929
2930 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
2931 rport = fcport->drport ? fcport->drport: fcport->rport;
2932 fcport->drport = NULL;
2933 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
2934 if (rport)
2935 fc_remote_port_delete(rport);
2936 }
2937
2938 /**
2939 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2940 * @ha: HA context
2941 * @flags: allocation flags
2942 *
2943 * Returns a pointer to the allocated fcport, or NULL, if none available.
2944 */
2945 fc_port_t *
qla2x00_alloc_fcport(scsi_qla_host_t * vha,gfp_t flags)2946 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
2947 {
2948 fc_port_t *fcport;
2949
2950 fcport = kzalloc(sizeof(fc_port_t), flags);
2951 if (!fcport)
2952 return NULL;
2953
2954 /* Setup fcport template structure. */
2955 fcport->vha = vha;
2956 fcport->port_type = FCT_UNKNOWN;
2957 fcport->loop_id = FC_NO_LOOP_ID;
2958 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
2959 fcport->supported_classes = FC_COS_UNSPECIFIED;
2960
2961 return fcport;
2962 }
2963
2964 /*
2965 * qla2x00_configure_loop
2966 * Updates Fibre Channel Device Database with what is actually on loop.
2967 *
2968 * Input:
2969 * ha = adapter block pointer.
2970 *
2971 * Returns:
2972 * 0 = success.
2973 * 1 = error.
2974 * 2 = database was full and device was not configured.
2975 */
2976 static int
qla2x00_configure_loop(scsi_qla_host_t * vha)2977 qla2x00_configure_loop(scsi_qla_host_t *vha)
2978 {
2979 int rval;
2980 unsigned long flags, save_flags;
2981 struct qla_hw_data *ha = vha->hw;
2982 rval = QLA_SUCCESS;
2983
2984 /* Get Initiator ID */
2985 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
2986 rval = qla2x00_configure_hba(vha);
2987 if (rval != QLA_SUCCESS) {
2988 ql_dbg(ql_dbg_disc, vha, 0x2013,
2989 "Unable to configure HBA.\n");
2990 return (rval);
2991 }
2992 }
2993
2994 save_flags = flags = vha->dpc_flags;
2995 ql_dbg(ql_dbg_disc, vha, 0x2014,
2996 "Configure loop -- dpc flags = 0x%lx.\n", flags);
2997
2998 /*
2999 * If we have both an RSCN and PORT UPDATE pending then handle them
3000 * both at the same time.
3001 */
3002 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
3003 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
3004
3005 qla2x00_get_data_rate(vha);
3006
3007 /* Determine what we need to do */
3008 if (ha->current_topology == ISP_CFG_FL &&
3009 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
3010
3011 set_bit(RSCN_UPDATE, &flags);
3012
3013 } else if (ha->current_topology == ISP_CFG_F &&
3014 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
3015
3016 set_bit(RSCN_UPDATE, &flags);
3017 clear_bit(LOCAL_LOOP_UPDATE, &flags);
3018
3019 } else if (ha->current_topology == ISP_CFG_N) {
3020 clear_bit(RSCN_UPDATE, &flags);
3021
3022 } else if (!vha->flags.online ||
3023 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
3024
3025 set_bit(RSCN_UPDATE, &flags);
3026 set_bit(LOCAL_LOOP_UPDATE, &flags);
3027 }
3028
3029 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
3030 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
3031 ql_dbg(ql_dbg_disc, vha, 0x2015,
3032 "Loop resync needed, failing.\n");
3033 rval = QLA_FUNCTION_FAILED;
3034 } else
3035 rval = qla2x00_configure_local_loop(vha);
3036 }
3037
3038 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
3039 if (LOOP_TRANSITION(vha)) {
3040 ql_dbg(ql_dbg_disc, vha, 0x201e,
3041 "Needs RSCN update and loop transition.\n");
3042 rval = QLA_FUNCTION_FAILED;
3043 }
3044 else
3045 rval = qla2x00_configure_fabric(vha);
3046 }
3047
3048 if (rval == QLA_SUCCESS) {
3049 if (atomic_read(&vha->loop_down_timer) ||
3050 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
3051 rval = QLA_FUNCTION_FAILED;
3052 } else {
3053 atomic_set(&vha->loop_state, LOOP_READY);
3054 ql_dbg(ql_dbg_disc, vha, 0x2069,
3055 "LOOP READY.\n");
3056 }
3057 }
3058
3059 if (rval) {
3060 ql_dbg(ql_dbg_disc, vha, 0x206a,
3061 "%s *** FAILED ***.\n", __func__);
3062 } else {
3063 ql_dbg(ql_dbg_disc, vha, 0x206b,
3064 "%s: exiting normally.\n", __func__);
3065 }
3066
3067 /* Restore state if a resync event occurred during processing */
3068 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
3069 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
3070 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
3071 if (test_bit(RSCN_UPDATE, &save_flags)) {
3072 set_bit(RSCN_UPDATE, &vha->dpc_flags);
3073 }
3074 }
3075
3076 return (rval);
3077 }
3078
3079
3080
3081 /*
3082 * qla2x00_configure_local_loop
3083 * Updates Fibre Channel Device Database with local loop devices.
3084 *
3085 * Input:
3086 * ha = adapter block pointer.
3087 *
3088 * Returns:
3089 * 0 = success.
3090 */
3091 static int
qla2x00_configure_local_loop(scsi_qla_host_t * vha)3092 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
3093 {
3094 int rval, rval2;
3095 int found_devs;
3096 int found;
3097 fc_port_t *fcport, *new_fcport;
3098
3099 uint16_t index;
3100 uint16_t entries;
3101 char *id_iter;
3102 uint16_t loop_id;
3103 uint8_t domain, area, al_pa;
3104 struct qla_hw_data *ha = vha->hw;
3105
3106 found_devs = 0;
3107 new_fcport = NULL;
3108 entries = MAX_FIBRE_DEVICES_LOOP;
3109
3110 /* Get list of logged in devices. */
3111 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
3112 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
3113 &entries);
3114 if (rval != QLA_SUCCESS)
3115 goto cleanup_allocation;
3116
3117 ql_dbg(ql_dbg_disc, vha, 0x2017,
3118 "Entries in ID list (%d).\n", entries);
3119 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
3120 (uint8_t *)ha->gid_list,
3121 entries * sizeof(struct gid_list_info));
3122
3123 /* Allocate temporary fcport for any new fcports discovered. */
3124 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3125 if (new_fcport == NULL) {
3126 ql_log(ql_log_warn, vha, 0x2018,
3127 "Memory allocation failed for fcport.\n");
3128 rval = QLA_MEMORY_ALLOC_FAILED;
3129 goto cleanup_allocation;
3130 }
3131 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
3132
3133 /*
3134 * Mark local devices that were present with FCF_DEVICE_LOST for now.
3135 */
3136 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3137 if (atomic_read(&fcport->state) == FCS_ONLINE &&
3138 fcport->port_type != FCT_BROADCAST &&
3139 (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3140
3141 ql_dbg(ql_dbg_disc, vha, 0x2019,
3142 "Marking port lost loop_id=0x%04x.\n",
3143 fcport->loop_id);
3144
3145 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3146 }
3147 }
3148
3149 /* Add devices to port list. */
3150 id_iter = (char *)ha->gid_list;
3151 for (index = 0; index < entries; index++) {
3152 domain = ((struct gid_list_info *)id_iter)->domain;
3153 area = ((struct gid_list_info *)id_iter)->area;
3154 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
3155 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3156 loop_id = (uint16_t)
3157 ((struct gid_list_info *)id_iter)->loop_id_2100;
3158 else
3159 loop_id = le16_to_cpu(
3160 ((struct gid_list_info *)id_iter)->loop_id);
3161 id_iter += ha->gid_list_info_size;
3162
3163 /* Bypass reserved domain fields. */
3164 if ((domain & 0xf0) == 0xf0)
3165 continue;
3166
3167 /* Bypass if not same domain and area of adapter. */
3168 if (area && domain &&
3169 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
3170 continue;
3171
3172 /* Bypass invalid local loop ID. */
3173 if (loop_id > LAST_LOCAL_LOOP_ID)
3174 continue;
3175
3176 memset(new_fcport, 0, sizeof(fc_port_t));
3177
3178 /* Fill in member data. */
3179 new_fcport->d_id.b.domain = domain;
3180 new_fcport->d_id.b.area = area;
3181 new_fcport->d_id.b.al_pa = al_pa;
3182 new_fcport->loop_id = loop_id;
3183 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
3184 if (rval2 != QLA_SUCCESS) {
3185 ql_dbg(ql_dbg_disc, vha, 0x201a,
3186 "Failed to retrieve fcport information "
3187 "-- get_port_database=%x, loop_id=0x%04x.\n",
3188 rval2, new_fcport->loop_id);
3189 ql_dbg(ql_dbg_disc, vha, 0x201b,
3190 "Scheduling resync.\n");
3191 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3192 continue;
3193 }
3194
3195 /* Check for matching device in port list. */
3196 found = 0;
3197 fcport = NULL;
3198 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3199 if (memcmp(new_fcport->port_name, fcport->port_name,
3200 WWN_SIZE))
3201 continue;
3202
3203 fcport->flags &= ~FCF_FABRIC_DEVICE;
3204 fcport->loop_id = new_fcport->loop_id;
3205 fcport->port_type = new_fcport->port_type;
3206 fcport->d_id.b24 = new_fcport->d_id.b24;
3207 memcpy(fcport->node_name, new_fcport->node_name,
3208 WWN_SIZE);
3209
3210 found++;
3211 break;
3212 }
3213
3214 if (!found) {
3215 /* New device, add to fcports list. */
3216 list_add_tail(&new_fcport->list, &vha->vp_fcports);
3217
3218 /* Allocate a new replacement fcport. */
3219 fcport = new_fcport;
3220 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3221 if (new_fcport == NULL) {
3222 ql_log(ql_log_warn, vha, 0x201c,
3223 "Failed to allocate memory for fcport.\n");
3224 rval = QLA_MEMORY_ALLOC_FAILED;
3225 goto cleanup_allocation;
3226 }
3227 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
3228 }
3229
3230 /* Base iIDMA settings on HBA port speed. */
3231 fcport->fp_speed = ha->link_data_rate;
3232
3233 qla2x00_update_fcport(vha, fcport);
3234
3235 found_devs++;
3236 }
3237
3238 cleanup_allocation:
3239 kfree(new_fcport);
3240
3241 if (rval != QLA_SUCCESS) {
3242 ql_dbg(ql_dbg_disc, vha, 0x201d,
3243 "Configure local loop error exit: rval=%x.\n", rval);
3244 }
3245
3246 return (rval);
3247 }
3248
3249 static void
qla2x00_iidma_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)3250 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
3251 {
3252 int rval;
3253 uint16_t mb[MAILBOX_REGISTER_COUNT];
3254 struct qla_hw_data *ha = vha->hw;
3255
3256 if (!IS_IIDMA_CAPABLE(ha))
3257 return;
3258
3259 if (atomic_read(&fcport->state) != FCS_ONLINE)
3260 return;
3261
3262 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
3263 fcport->fp_speed > ha->link_data_rate ||
3264 !ha->flags.gpsc_supported)
3265 return;
3266
3267 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
3268 mb);
3269 if (rval != QLA_SUCCESS) {
3270 ql_dbg(ql_dbg_disc, vha, 0x2004,
3271 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
3272 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
3273 } else {
3274 ql_dbg(ql_dbg_disc, vha, 0x2005,
3275 "iIDMA adjusted to %s GB/s on %8phN.\n",
3276 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
3277 fcport->port_name);
3278 }
3279 }
3280
3281 static void
qla2x00_reg_remote_port(scsi_qla_host_t * vha,fc_port_t * fcport)3282 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
3283 {
3284 struct fc_rport_identifiers rport_ids;
3285 struct fc_rport *rport;
3286 unsigned long flags;
3287
3288 rport_ids.node_name = wwn_to_u64(fcport->node_name);
3289 rport_ids.port_name = wwn_to_u64(fcport->port_name);
3290 rport_ids.port_id = fcport->d_id.b.domain << 16 |
3291 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
3292 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
3293 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
3294 if (!rport) {
3295 ql_log(ql_log_warn, vha, 0x2006,
3296 "Unable to allocate fc remote port.\n");
3297 return;
3298 }
3299 /*
3300 * Create target mode FC NEXUS in qla_target.c if target mode is
3301 * enabled..
3302 */
3303
3304 qlt_fc_port_added(vha, fcport);
3305
3306 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
3307 *((fc_port_t **)rport->dd_data) = fcport;
3308 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
3309
3310 rport->supported_classes = fcport->supported_classes;
3311
3312 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
3313 if (fcport->port_type == FCT_INITIATOR)
3314 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
3315 if (fcport->port_type == FCT_TARGET)
3316 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
3317 fc_remote_port_rolechg(rport, rport_ids.roles);
3318 }
3319
3320 /*
3321 * qla2x00_update_fcport
3322 * Updates device on list.
3323 *
3324 * Input:
3325 * ha = adapter block pointer.
3326 * fcport = port structure pointer.
3327 *
3328 * Return:
3329 * 0 - Success
3330 * BIT_0 - error
3331 *
3332 * Context:
3333 * Kernel context.
3334 */
3335 void
qla2x00_update_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)3336 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
3337 {
3338 fcport->vha = vha;
3339
3340 if (IS_QLAFX00(vha->hw)) {
3341 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
3342 goto reg_port;
3343 }
3344 fcport->login_retry = 0;
3345 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
3346
3347 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
3348 qla2x00_iidma_fcport(vha, fcport);
3349 qla24xx_update_fcport_fcp_prio(vha, fcport);
3350
3351 reg_port:
3352 if (qla_ini_mode_enabled(vha))
3353 qla2x00_reg_remote_port(vha, fcport);
3354 else {
3355 /*
3356 * Create target mode FC NEXUS in qla_target.c
3357 */
3358 qlt_fc_port_added(vha, fcport);
3359 }
3360 }
3361
3362 /*
3363 * qla2x00_configure_fabric
3364 * Setup SNS devices with loop ID's.
3365 *
3366 * Input:
3367 * ha = adapter block pointer.
3368 *
3369 * Returns:
3370 * 0 = success.
3371 * BIT_0 = error
3372 */
3373 static int
qla2x00_configure_fabric(scsi_qla_host_t * vha)3374 qla2x00_configure_fabric(scsi_qla_host_t *vha)
3375 {
3376 int rval;
3377 fc_port_t *fcport, *fcptemp;
3378 uint16_t next_loopid;
3379 uint16_t mb[MAILBOX_REGISTER_COUNT];
3380 uint16_t loop_id;
3381 LIST_HEAD(new_fcports);
3382 struct qla_hw_data *ha = vha->hw;
3383 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3384 int discovery_gen;
3385
3386 /* If FL port exists, then SNS is present */
3387 if (IS_FWI2_CAPABLE(ha))
3388 loop_id = NPH_F_PORT;
3389 else
3390 loop_id = SNS_FL_PORT;
3391 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
3392 if (rval != QLA_SUCCESS) {
3393 ql_dbg(ql_dbg_disc, vha, 0x201f,
3394 "MBX_GET_PORT_NAME failed, No FL Port.\n");
3395
3396 vha->device_flags &= ~SWITCH_FOUND;
3397 return (QLA_SUCCESS);
3398 }
3399 vha->device_flags |= SWITCH_FOUND;
3400
3401 do {
3402 /* FDMI support. */
3403 if (ql2xfdmienable &&
3404 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
3405 qla2x00_fdmi_register(vha);
3406
3407 /* Ensure we are logged into the SNS. */
3408 if (IS_FWI2_CAPABLE(ha))
3409 loop_id = NPH_SNS;
3410 else
3411 loop_id = SIMPLE_NAME_SERVER;
3412 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
3413 0xfc, mb, BIT_1|BIT_0);
3414 if (rval != QLA_SUCCESS) {
3415 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3416 return rval;
3417 }
3418 if (mb[0] != MBS_COMMAND_COMPLETE) {
3419 ql_dbg(ql_dbg_disc, vha, 0x2042,
3420 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
3421 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1],
3422 mb[2], mb[6], mb[7]);
3423 return (QLA_SUCCESS);
3424 }
3425
3426 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
3427 if (qla2x00_rft_id(vha)) {
3428 /* EMPTY */
3429 ql_dbg(ql_dbg_disc, vha, 0x2045,
3430 "Register FC-4 TYPE failed.\n");
3431 }
3432 if (qla2x00_rff_id(vha)) {
3433 /* EMPTY */
3434 ql_dbg(ql_dbg_disc, vha, 0x2049,
3435 "Register FC-4 Features failed.\n");
3436 }
3437 if (qla2x00_rnn_id(vha)) {
3438 /* EMPTY */
3439 ql_dbg(ql_dbg_disc, vha, 0x204f,
3440 "Register Node Name failed.\n");
3441 } else if (qla2x00_rsnn_nn(vha)) {
3442 /* EMPTY */
3443 ql_dbg(ql_dbg_disc, vha, 0x2053,
3444 "Register Symobilic Node Name failed.\n");
3445 }
3446 }
3447
3448 #define QLA_FCPORT_SCAN 1
3449 #define QLA_FCPORT_FOUND 2
3450
3451 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3452 fcport->scan_state = QLA_FCPORT_SCAN;
3453 }
3454
3455 /* Mark the time right before querying FW for connected ports.
3456 * This process is long, asynchronous and by the time it's done,
3457 * collected information might not be accurate anymore. E.g.
3458 * disconnected port might have re-connected and a brand new
3459 * session has been created. In this case session's generation
3460 * will be newer than discovery_gen. */
3461 qlt_do_generation_tick(vha, &discovery_gen);
3462
3463 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
3464 if (rval != QLA_SUCCESS)
3465 break;
3466
3467 /*
3468 * Logout all previous fabric devices marked lost, except
3469 * FCP2 devices.
3470 */
3471 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3472 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3473 break;
3474
3475 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
3476 continue;
3477
3478 if (fcport->scan_state == QLA_FCPORT_SCAN) {
3479 if (qla_ini_mode_enabled(base_vha) &&
3480 atomic_read(&fcport->state) == FCS_ONLINE) {
3481 qla2x00_mark_device_lost(vha, fcport,
3482 ql2xplogiabsentdevice, 0);
3483 if (fcport->loop_id != FC_NO_LOOP_ID &&
3484 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3485 fcport->port_type != FCT_INITIATOR &&
3486 fcport->port_type != FCT_BROADCAST) {
3487 ha->isp_ops->fabric_logout(vha,
3488 fcport->loop_id,
3489 fcport->d_id.b.domain,
3490 fcport->d_id.b.area,
3491 fcport->d_id.b.al_pa);
3492 qla2x00_clear_loop_id(fcport);
3493 }
3494 } else if (!qla_ini_mode_enabled(base_vha)) {
3495 /*
3496 * In target mode, explicitly kill
3497 * sessions and log out of devices
3498 * that are gone, so that we don't
3499 * end up with an initiator using the
3500 * wrong ACL (if the fabric recycles
3501 * an FC address and we have a stale
3502 * session around) and so that we don't
3503 * report initiators that are no longer
3504 * on the fabric.
3505 */
3506 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf077,
3507 "port gone, logging out/killing session: "
3508 "%8phC state 0x%x flags 0x%x fc4_type 0x%x "
3509 "scan_state %d\n",
3510 fcport->port_name,
3511 atomic_read(&fcport->state),
3512 fcport->flags, fcport->fc4_type,
3513 fcport->scan_state);
3514 qlt_fc_port_deleted(vha, fcport,
3515 discovery_gen);
3516 }
3517 }
3518 }
3519
3520 /* Starting free loop ID. */
3521 next_loopid = ha->min_external_loopid;
3522
3523 /*
3524 * Scan through our port list and login entries that need to be
3525 * logged in.
3526 */
3527 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3528 if (atomic_read(&vha->loop_down_timer) ||
3529 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3530 break;
3531
3532 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3533 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
3534 continue;
3535
3536 /*
3537 * If we're not an initiator, skip looking for devices
3538 * and logging in. There's no reason for us to do it,
3539 * and it seems to actively cause problems in target
3540 * mode if we race with the initiator logging into us
3541 * (we might get the "port ID used" status back from
3542 * our login command and log out the initiator, which
3543 * seems to cause havoc).
3544 */
3545 if (!qla_ini_mode_enabled(base_vha)) {
3546 if (fcport->scan_state == QLA_FCPORT_FOUND) {
3547 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf078,
3548 "port %8phC state 0x%x flags 0x%x fc4_type 0x%x "
3549 "scan_state %d (initiator mode disabled; skipping "
3550 "login)\n", fcport->port_name,
3551 atomic_read(&fcport->state),
3552 fcport->flags, fcport->fc4_type,
3553 fcport->scan_state);
3554 }
3555 continue;
3556 }
3557
3558 if (fcport->loop_id == FC_NO_LOOP_ID) {
3559 fcport->loop_id = next_loopid;
3560 rval = qla2x00_find_new_loop_id(
3561 base_vha, fcport);
3562 if (rval != QLA_SUCCESS) {
3563 /* Ran out of IDs to use */
3564 break;
3565 }
3566 }
3567 /* Login and update database */
3568 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3569 }
3570
3571 /* Exit if out of loop IDs. */
3572 if (rval != QLA_SUCCESS) {
3573 break;
3574 }
3575
3576 /*
3577 * Login and add the new devices to our port list.
3578 */
3579 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3580 if (atomic_read(&vha->loop_down_timer) ||
3581 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3582 break;
3583
3584 /*
3585 * If we're not an initiator, skip looking for devices
3586 * and logging in. There's no reason for us to do it,
3587 * and it seems to actively cause problems in target
3588 * mode if we race with the initiator logging into us
3589 * (we might get the "port ID used" status back from
3590 * our login command and log out the initiator, which
3591 * seems to cause havoc).
3592 */
3593 if (qla_ini_mode_enabled(base_vha)) {
3594 /* Find a new loop ID to use. */
3595 fcport->loop_id = next_loopid;
3596 rval = qla2x00_find_new_loop_id(base_vha,
3597 fcport);
3598 if (rval != QLA_SUCCESS) {
3599 /* Ran out of IDs to use */
3600 break;
3601 }
3602
3603 /* Login and update database */
3604 qla2x00_fabric_dev_login(vha, fcport,
3605 &next_loopid);
3606 } else {
3607 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf079,
3608 "new port %8phC state 0x%x flags 0x%x fc4_type "
3609 "0x%x scan_state %d (initiator mode disabled; "
3610 "skipping login)\n",
3611 fcport->port_name,
3612 atomic_read(&fcport->state),
3613 fcport->flags, fcport->fc4_type,
3614 fcport->scan_state);
3615 }
3616
3617 list_move_tail(&fcport->list, &vha->vp_fcports);
3618 }
3619 } while (0);
3620
3621 /* Free all new device structures not processed. */
3622 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3623 list_del(&fcport->list);
3624 kfree(fcport);
3625 }
3626
3627 if (rval) {
3628 ql_dbg(ql_dbg_disc, vha, 0x2068,
3629 "Configure fabric error exit rval=%d.\n", rval);
3630 }
3631
3632 return (rval);
3633 }
3634
3635 /*
3636 * qla2x00_find_all_fabric_devs
3637 *
3638 * Input:
3639 * ha = adapter block pointer.
3640 * dev = database device entry pointer.
3641 *
3642 * Returns:
3643 * 0 = success.
3644 *
3645 * Context:
3646 * Kernel context.
3647 */
3648 static int
qla2x00_find_all_fabric_devs(scsi_qla_host_t * vha,struct list_head * new_fcports)3649 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
3650 struct list_head *new_fcports)
3651 {
3652 int rval;
3653 uint16_t loop_id;
3654 fc_port_t *fcport, *new_fcport, *fcptemp;
3655 int found;
3656
3657 sw_info_t *swl;
3658 int swl_idx;
3659 int first_dev, last_dev;
3660 port_id_t wrap = {}, nxt_d_id;
3661 struct qla_hw_data *ha = vha->hw;
3662 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3663
3664 rval = QLA_SUCCESS;
3665
3666 /* Try GID_PT to get device list, else GAN. */
3667 if (!ha->swl)
3668 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
3669 GFP_KERNEL);
3670 swl = ha->swl;
3671 if (!swl) {
3672 /*EMPTY*/
3673 ql_dbg(ql_dbg_disc, vha, 0x2054,
3674 "GID_PT allocations failed, fallback on GA_NXT.\n");
3675 } else {
3676 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
3677 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
3678 swl = NULL;
3679 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
3680 swl = NULL;
3681 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
3682 swl = NULL;
3683 } else if (ql2xiidmaenable &&
3684 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
3685 qla2x00_gpsc(vha, swl);
3686 }
3687
3688 /* If other queries succeeded probe for FC-4 type */
3689 if (swl)
3690 qla2x00_gff_id(vha, swl);
3691 }
3692 swl_idx = 0;
3693
3694 /* Allocate temporary fcport for any new fcports discovered. */
3695 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3696 if (new_fcport == NULL) {
3697 ql_log(ql_log_warn, vha, 0x205e,
3698 "Failed to allocate memory for fcport.\n");
3699 return (QLA_MEMORY_ALLOC_FAILED);
3700 }
3701 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3702 /* Set start port ID scan at adapter ID. */
3703 first_dev = 1;
3704 last_dev = 0;
3705
3706 /* Starting free loop ID. */
3707 loop_id = ha->min_external_loopid;
3708 for (; loop_id <= ha->max_loop_id; loop_id++) {
3709 if (qla2x00_is_reserved_id(vha, loop_id))
3710 continue;
3711
3712 if (ha->current_topology == ISP_CFG_FL &&
3713 (atomic_read(&vha->loop_down_timer) ||
3714 LOOP_TRANSITION(vha))) {
3715 atomic_set(&vha->loop_down_timer, 0);
3716 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3717 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
3718 break;
3719 }
3720
3721 if (swl != NULL) {
3722 if (last_dev) {
3723 wrap.b24 = new_fcport->d_id.b24;
3724 } else {
3725 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
3726 memcpy(new_fcport->node_name,
3727 swl[swl_idx].node_name, WWN_SIZE);
3728 memcpy(new_fcport->port_name,
3729 swl[swl_idx].port_name, WWN_SIZE);
3730 memcpy(new_fcport->fabric_port_name,
3731 swl[swl_idx].fabric_port_name, WWN_SIZE);
3732 new_fcport->fp_speed = swl[swl_idx].fp_speed;
3733 new_fcport->fc4_type = swl[swl_idx].fc4_type;
3734
3735 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
3736 last_dev = 1;
3737 }
3738 swl_idx++;
3739 }
3740 } else {
3741 /* Send GA_NXT to the switch */
3742 rval = qla2x00_ga_nxt(vha, new_fcport);
3743 if (rval != QLA_SUCCESS) {
3744 ql_log(ql_log_warn, vha, 0x2064,
3745 "SNS scan failed -- assuming "
3746 "zero-entry result.\n");
3747 list_for_each_entry_safe(fcport, fcptemp,
3748 new_fcports, list) {
3749 list_del(&fcport->list);
3750 kfree(fcport);
3751 }
3752 rval = QLA_SUCCESS;
3753 break;
3754 }
3755 }
3756
3757 /* If wrap on switch device list, exit. */
3758 if (first_dev) {
3759 wrap.b24 = new_fcport->d_id.b24;
3760 first_dev = 0;
3761 } else if (new_fcport->d_id.b24 == wrap.b24) {
3762 ql_dbg(ql_dbg_disc, vha, 0x2065,
3763 "Device wrap (%02x%02x%02x).\n",
3764 new_fcport->d_id.b.domain,
3765 new_fcport->d_id.b.area,
3766 new_fcport->d_id.b.al_pa);
3767 break;
3768 }
3769
3770 /* Bypass if same physical adapter. */
3771 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
3772 continue;
3773
3774 /* Bypass virtual ports of the same host. */
3775 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
3776 continue;
3777
3778 /* Bypass if same domain and area of adapter. */
3779 if (((new_fcport->d_id.b24 & 0xffff00) ==
3780 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
3781 ISP_CFG_FL)
3782 continue;
3783
3784 /* Bypass reserved domain fields. */
3785 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
3786 continue;
3787
3788 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
3789 if (ql2xgffidenable &&
3790 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
3791 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
3792 continue;
3793
3794 /* Locate matching device in database. */
3795 found = 0;
3796 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3797 if (memcmp(new_fcport->port_name, fcport->port_name,
3798 WWN_SIZE))
3799 continue;
3800
3801 fcport->scan_state = QLA_FCPORT_FOUND;
3802
3803 found++;
3804
3805 /* Update port state. */
3806 memcpy(fcport->fabric_port_name,
3807 new_fcport->fabric_port_name, WWN_SIZE);
3808 fcport->fp_speed = new_fcport->fp_speed;
3809
3810 /*
3811 * If address the same and state FCS_ONLINE
3812 * (or in target mode), nothing changed.
3813 */
3814 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
3815 (atomic_read(&fcport->state) == FCS_ONLINE ||
3816 !qla_ini_mode_enabled(base_vha))) {
3817 break;
3818 }
3819
3820 /*
3821 * If device was not a fabric device before.
3822 */
3823 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3824 fcport->d_id.b24 = new_fcport->d_id.b24;
3825 qla2x00_clear_loop_id(fcport);
3826 fcport->flags |= (FCF_FABRIC_DEVICE |
3827 FCF_LOGIN_NEEDED);
3828 break;
3829 }
3830
3831 /*
3832 * Port ID changed or device was marked to be updated;
3833 * Log it out if still logged in and mark it for
3834 * relogin later.
3835 */
3836 if (!qla_ini_mode_enabled(base_vha)) {
3837 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
3838 "port changed FC ID, %8phC"
3839 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
3840 fcport->port_name,
3841 fcport->d_id.b.domain,
3842 fcport->d_id.b.area,
3843 fcport->d_id.b.al_pa,
3844 fcport->loop_id,
3845 new_fcport->d_id.b.domain,
3846 new_fcport->d_id.b.area,
3847 new_fcport->d_id.b.al_pa);
3848 fcport->d_id.b24 = new_fcport->d_id.b24;
3849 break;
3850 }
3851
3852 fcport->d_id.b24 = new_fcport->d_id.b24;
3853 fcport->flags |= FCF_LOGIN_NEEDED;
3854 if (fcport->loop_id != FC_NO_LOOP_ID &&
3855 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3856 (fcport->flags & FCF_ASYNC_SENT) == 0 &&
3857 fcport->port_type != FCT_INITIATOR &&
3858 fcport->port_type != FCT_BROADCAST) {
3859 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3860 fcport->d_id.b.domain, fcport->d_id.b.area,
3861 fcport->d_id.b.al_pa);
3862 qla2x00_clear_loop_id(fcport);
3863 }
3864
3865 break;
3866 }
3867
3868 if (found)
3869 continue;
3870 /* If device was not in our fcports list, then add it. */
3871 new_fcport->scan_state = QLA_FCPORT_FOUND;
3872 list_add_tail(&new_fcport->list, new_fcports);
3873
3874 /* Allocate a new replacement fcport. */
3875 nxt_d_id.b24 = new_fcport->d_id.b24;
3876 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3877 if (new_fcport == NULL) {
3878 ql_log(ql_log_warn, vha, 0x2066,
3879 "Memory allocation failed for fcport.\n");
3880 return (QLA_MEMORY_ALLOC_FAILED);
3881 }
3882 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3883 new_fcport->d_id.b24 = nxt_d_id.b24;
3884 }
3885
3886 kfree(new_fcport);
3887
3888 return (rval);
3889 }
3890
3891 /*
3892 * qla2x00_find_new_loop_id
3893 * Scan through our port list and find a new usable loop ID.
3894 *
3895 * Input:
3896 * ha: adapter state pointer.
3897 * dev: port structure pointer.
3898 *
3899 * Returns:
3900 * qla2x00 local function return status code.
3901 *
3902 * Context:
3903 * Kernel context.
3904 */
3905 int
qla2x00_find_new_loop_id(scsi_qla_host_t * vha,fc_port_t * dev)3906 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
3907 {
3908 int rval;
3909 struct qla_hw_data *ha = vha->hw;
3910 unsigned long flags = 0;
3911
3912 rval = QLA_SUCCESS;
3913
3914 spin_lock_irqsave(&ha->vport_slock, flags);
3915
3916 dev->loop_id = find_first_zero_bit(ha->loop_id_map,
3917 LOOPID_MAP_SIZE);
3918 if (dev->loop_id >= LOOPID_MAP_SIZE ||
3919 qla2x00_is_reserved_id(vha, dev->loop_id)) {
3920 dev->loop_id = FC_NO_LOOP_ID;
3921 rval = QLA_FUNCTION_FAILED;
3922 } else
3923 set_bit(dev->loop_id, ha->loop_id_map);
3924
3925 spin_unlock_irqrestore(&ha->vport_slock, flags);
3926
3927 if (rval == QLA_SUCCESS)
3928 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
3929 "Assigning new loopid=%x, portid=%x.\n",
3930 dev->loop_id, dev->d_id.b24);
3931 else
3932 ql_log(ql_log_warn, dev->vha, 0x2087,
3933 "No loop_id's available, portid=%x.\n",
3934 dev->d_id.b24);
3935
3936 return (rval);
3937 }
3938
3939 /*
3940 * qla2x00_fabric_dev_login
3941 * Login fabric target device and update FC port database.
3942 *
3943 * Input:
3944 * ha: adapter state pointer.
3945 * fcport: port structure list pointer.
3946 * next_loopid: contains value of a new loop ID that can be used
3947 * by the next login attempt.
3948 *
3949 * Returns:
3950 * qla2x00 local function return status code.
3951 *
3952 * Context:
3953 * Kernel context.
3954 */
3955 static int
qla2x00_fabric_dev_login(scsi_qla_host_t * vha,fc_port_t * fcport,uint16_t * next_loopid)3956 qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
3957 uint16_t *next_loopid)
3958 {
3959 int rval;
3960 uint8_t opts;
3961 struct qla_hw_data *ha = vha->hw;
3962
3963 rval = QLA_SUCCESS;
3964
3965 if (IS_ALOGIO_CAPABLE(ha)) {
3966 if (fcport->flags & FCF_ASYNC_SENT)
3967 return rval;
3968 fcport->flags |= FCF_ASYNC_SENT;
3969 rval = qla2x00_post_async_login_work(vha, fcport, NULL);
3970 if (!rval)
3971 return rval;
3972 }
3973
3974 fcport->flags &= ~FCF_ASYNC_SENT;
3975 rval = qla2x00_fabric_login(vha, fcport, next_loopid);
3976 if (rval == QLA_SUCCESS) {
3977 /* Send an ADISC to FCP2 devices.*/
3978 opts = 0;
3979 if (fcport->flags & FCF_FCP2_DEVICE)
3980 opts |= BIT_1;
3981 rval = qla2x00_get_port_database(vha, fcport, opts);
3982 if (rval != QLA_SUCCESS) {
3983 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3984 fcport->d_id.b.domain, fcport->d_id.b.area,
3985 fcport->d_id.b.al_pa);
3986 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3987 } else {
3988 qla2x00_update_fcport(vha, fcport);
3989 }
3990 } else {
3991 /* Retry Login. */
3992 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3993 }
3994
3995 return (rval);
3996 }
3997
3998 /*
3999 * qla2x00_fabric_login
4000 * Issue fabric login command.
4001 *
4002 * Input:
4003 * ha = adapter block pointer.
4004 * device = pointer to FC device type structure.
4005 *
4006 * Returns:
4007 * 0 - Login successfully
4008 * 1 - Login failed
4009 * 2 - Initiator device
4010 * 3 - Fatal error
4011 */
4012 int
qla2x00_fabric_login(scsi_qla_host_t * vha,fc_port_t * fcport,uint16_t * next_loopid)4013 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
4014 uint16_t *next_loopid)
4015 {
4016 int rval;
4017 int retry;
4018 uint16_t tmp_loopid;
4019 uint16_t mb[MAILBOX_REGISTER_COUNT];
4020 struct qla_hw_data *ha = vha->hw;
4021
4022 retry = 0;
4023 tmp_loopid = 0;
4024
4025 for (;;) {
4026 ql_dbg(ql_dbg_disc, vha, 0x2000,
4027 "Trying Fabric Login w/loop id 0x%04x for port "
4028 "%02x%02x%02x.\n",
4029 fcport->loop_id, fcport->d_id.b.domain,
4030 fcport->d_id.b.area, fcport->d_id.b.al_pa);
4031
4032 /* Login fcport on switch. */
4033 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
4034 fcport->d_id.b.domain, fcport->d_id.b.area,
4035 fcport->d_id.b.al_pa, mb, BIT_0);
4036 if (rval != QLA_SUCCESS) {
4037 return rval;
4038 }
4039 if (mb[0] == MBS_PORT_ID_USED) {
4040 /*
4041 * Device has another loop ID. The firmware team
4042 * recommends the driver perform an implicit login with
4043 * the specified ID again. The ID we just used is save
4044 * here so we return with an ID that can be tried by
4045 * the next login.
4046 */
4047 retry++;
4048 tmp_loopid = fcport->loop_id;
4049 fcport->loop_id = mb[1];
4050
4051 ql_dbg(ql_dbg_disc, vha, 0x2001,
4052 "Fabric Login: port in use - next loop "
4053 "id=0x%04x, port id= %02x%02x%02x.\n",
4054 fcport->loop_id, fcport->d_id.b.domain,
4055 fcport->d_id.b.area, fcport->d_id.b.al_pa);
4056
4057 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
4058 /*
4059 * Login succeeded.
4060 */
4061 if (retry) {
4062 /* A retry occurred before. */
4063 *next_loopid = tmp_loopid;
4064 } else {
4065 /*
4066 * No retry occurred before. Just increment the
4067 * ID value for next login.
4068 */
4069 *next_loopid = (fcport->loop_id + 1);
4070 }
4071
4072 if (mb[1] & BIT_0) {
4073 fcport->port_type = FCT_INITIATOR;
4074 } else {
4075 fcport->port_type = FCT_TARGET;
4076 if (mb[1] & BIT_1) {
4077 fcport->flags |= FCF_FCP2_DEVICE;
4078 }
4079 }
4080
4081 if (mb[10] & BIT_0)
4082 fcport->supported_classes |= FC_COS_CLASS2;
4083 if (mb[10] & BIT_1)
4084 fcport->supported_classes |= FC_COS_CLASS3;
4085
4086 if (IS_FWI2_CAPABLE(ha)) {
4087 if (mb[10] & BIT_7)
4088 fcport->flags |=
4089 FCF_CONF_COMP_SUPPORTED;
4090 }
4091
4092 rval = QLA_SUCCESS;
4093 break;
4094 } else if (mb[0] == MBS_LOOP_ID_USED) {
4095 /*
4096 * Loop ID already used, try next loop ID.
4097 */
4098 fcport->loop_id++;
4099 rval = qla2x00_find_new_loop_id(vha, fcport);
4100 if (rval != QLA_SUCCESS) {
4101 /* Ran out of loop IDs to use */
4102 break;
4103 }
4104 } else if (mb[0] == MBS_COMMAND_ERROR) {
4105 /*
4106 * Firmware possibly timed out during login. If NO
4107 * retries are left to do then the device is declared
4108 * dead.
4109 */
4110 *next_loopid = fcport->loop_id;
4111 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
4112 fcport->d_id.b.domain, fcport->d_id.b.area,
4113 fcport->d_id.b.al_pa);
4114 qla2x00_mark_device_lost(vha, fcport, 1, 0);
4115
4116 rval = 1;
4117 break;
4118 } else {
4119 /*
4120 * unrecoverable / not handled error
4121 */
4122 ql_dbg(ql_dbg_disc, vha, 0x2002,
4123 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
4124 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
4125 fcport->d_id.b.area, fcport->d_id.b.al_pa,
4126 fcport->loop_id, jiffies);
4127
4128 *next_loopid = fcport->loop_id;
4129 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
4130 fcport->d_id.b.domain, fcport->d_id.b.area,
4131 fcport->d_id.b.al_pa);
4132 qla2x00_clear_loop_id(fcport);
4133 fcport->login_retry = 0;
4134
4135 rval = 3;
4136 break;
4137 }
4138 }
4139
4140 return (rval);
4141 }
4142
4143 /*
4144 * qla2x00_local_device_login
4145 * Issue local device login command.
4146 *
4147 * Input:
4148 * ha = adapter block pointer.
4149 * loop_id = loop id of device to login to.
4150 *
4151 * Returns (Where's the #define!!!!):
4152 * 0 - Login successfully
4153 * 1 - Login failed
4154 * 3 - Fatal error
4155 */
4156 int
qla2x00_local_device_login(scsi_qla_host_t * vha,fc_port_t * fcport)4157 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
4158 {
4159 int rval;
4160 uint16_t mb[MAILBOX_REGISTER_COUNT];
4161
4162 memset(mb, 0, sizeof(mb));
4163 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
4164 if (rval == QLA_SUCCESS) {
4165 /* Interrogate mailbox registers for any errors */
4166 if (mb[0] == MBS_COMMAND_ERROR)
4167 rval = 1;
4168 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
4169 /* device not in PCB table */
4170 rval = 3;
4171 }
4172
4173 return (rval);
4174 }
4175
4176 /*
4177 * qla2x00_loop_resync
4178 * Resync with fibre channel devices.
4179 *
4180 * Input:
4181 * ha = adapter block pointer.
4182 *
4183 * Returns:
4184 * 0 = success
4185 */
4186 int
qla2x00_loop_resync(scsi_qla_host_t * vha)4187 qla2x00_loop_resync(scsi_qla_host_t *vha)
4188 {
4189 int rval = QLA_SUCCESS;
4190 uint32_t wait_time;
4191 struct req_que *req;
4192 struct rsp_que *rsp;
4193
4194 if (vha->hw->flags.cpu_affinity_enabled)
4195 req = vha->hw->req_q_map[0];
4196 else
4197 req = vha->req;
4198 rsp = req->rsp;
4199
4200 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4201 if (vha->flags.online) {
4202 if (!(rval = qla2x00_fw_ready(vha))) {
4203 /* Wait at most MAX_TARGET RSCNs for a stable link. */
4204 wait_time = 256;
4205 do {
4206 if (!IS_QLAFX00(vha->hw)) {
4207 /*
4208 * Issue a marker after FW becomes
4209 * ready.
4210 */
4211 qla2x00_marker(vha, req, rsp, 0, 0,
4212 MK_SYNC_ALL);
4213 vha->marker_needed = 0;
4214 }
4215
4216 /* Remap devices on Loop. */
4217 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4218
4219 if (IS_QLAFX00(vha->hw))
4220 qlafx00_configure_devices(vha);
4221 else
4222 qla2x00_configure_loop(vha);
4223
4224 wait_time--;
4225 } while (!atomic_read(&vha->loop_down_timer) &&
4226 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4227 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
4228 &vha->dpc_flags)));
4229 }
4230 }
4231
4232 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4233 return (QLA_FUNCTION_FAILED);
4234
4235 if (rval)
4236 ql_dbg(ql_dbg_disc, vha, 0x206c,
4237 "%s *** FAILED ***.\n", __func__);
4238
4239 return (rval);
4240 }
4241
4242 /*
4243 * qla2x00_perform_loop_resync
4244 * Description: This function will set the appropriate flags and call
4245 * qla2x00_loop_resync. If successful loop will be resynced
4246 * Arguments : scsi_qla_host_t pointer
4247 * returm : Success or Failure
4248 */
4249
qla2x00_perform_loop_resync(scsi_qla_host_t * ha)4250 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
4251 {
4252 int32_t rval = 0;
4253
4254 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
4255 /*Configure the flags so that resync happens properly*/
4256 atomic_set(&ha->loop_down_timer, 0);
4257 if (!(ha->device_flags & DFLG_NO_CABLE)) {
4258 atomic_set(&ha->loop_state, LOOP_UP);
4259 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
4260 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
4261 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
4262
4263 rval = qla2x00_loop_resync(ha);
4264 } else
4265 atomic_set(&ha->loop_state, LOOP_DEAD);
4266
4267 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
4268 }
4269
4270 return rval;
4271 }
4272
4273 void
qla2x00_update_fcports(scsi_qla_host_t * base_vha)4274 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
4275 {
4276 fc_port_t *fcport;
4277 struct scsi_qla_host *vha;
4278 struct qla_hw_data *ha = base_vha->hw;
4279 unsigned long flags;
4280
4281 spin_lock_irqsave(&ha->vport_slock, flags);
4282 /* Go with deferred removal of rport references. */
4283 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
4284 atomic_inc(&vha->vref_count);
4285 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4286 if (fcport->drport &&
4287 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
4288 spin_unlock_irqrestore(&ha->vport_slock, flags);
4289 qla2x00_rport_del(fcport);
4290
4291 /*
4292 * Release the target mode FC NEXUS in
4293 * qla_target.c, if target mod is enabled.
4294 */
4295 qlt_fc_port_deleted(vha, fcport,
4296 base_vha->total_fcport_update_gen);
4297
4298 spin_lock_irqsave(&ha->vport_slock, flags);
4299 }
4300 }
4301 atomic_dec(&vha->vref_count);
4302 }
4303 spin_unlock_irqrestore(&ha->vport_slock, flags);
4304 }
4305
4306 /* Assumes idc_lock always held on entry */
4307 void
qla83xx_reset_ownership(scsi_qla_host_t * vha)4308 qla83xx_reset_ownership(scsi_qla_host_t *vha)
4309 {
4310 struct qla_hw_data *ha = vha->hw;
4311 uint32_t drv_presence, drv_presence_mask;
4312 uint32_t dev_part_info1, dev_part_info2, class_type;
4313 uint32_t class_type_mask = 0x3;
4314 uint16_t fcoe_other_function = 0xffff, i;
4315
4316 if (IS_QLA8044(ha)) {
4317 drv_presence = qla8044_rd_direct(vha,
4318 QLA8044_CRB_DRV_ACTIVE_INDEX);
4319 dev_part_info1 = qla8044_rd_direct(vha,
4320 QLA8044_CRB_DEV_PART_INFO_INDEX);
4321 dev_part_info2 = qla8044_rd_direct(vha,
4322 QLA8044_CRB_DEV_PART_INFO2);
4323 } else {
4324 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4325 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
4326 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
4327 }
4328 for (i = 0; i < 8; i++) {
4329 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
4330 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
4331 (i != ha->portnum)) {
4332 fcoe_other_function = i;
4333 break;
4334 }
4335 }
4336 if (fcoe_other_function == 0xffff) {
4337 for (i = 0; i < 8; i++) {
4338 class_type = ((dev_part_info2 >> (i * 4)) &
4339 class_type_mask);
4340 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
4341 ((i + 8) != ha->portnum)) {
4342 fcoe_other_function = i + 8;
4343 break;
4344 }
4345 }
4346 }
4347 /*
4348 * Prepare drv-presence mask based on fcoe functions present.
4349 * However consider only valid physical fcoe function numbers (0-15).
4350 */
4351 drv_presence_mask = ~((1 << (ha->portnum)) |
4352 ((fcoe_other_function == 0xffff) ?
4353 0 : (1 << (fcoe_other_function))));
4354
4355 /* We are the reset owner iff:
4356 * - No other protocol drivers present.
4357 * - This is the lowest among fcoe functions. */
4358 if (!(drv_presence & drv_presence_mask) &&
4359 (ha->portnum < fcoe_other_function)) {
4360 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
4361 "This host is Reset owner.\n");
4362 ha->flags.nic_core_reset_owner = 1;
4363 }
4364 }
4365
4366 static int
__qla83xx_set_drv_ack(scsi_qla_host_t * vha)4367 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
4368 {
4369 int rval = QLA_SUCCESS;
4370 struct qla_hw_data *ha = vha->hw;
4371 uint32_t drv_ack;
4372
4373 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4374 if (rval == QLA_SUCCESS) {
4375 drv_ack |= (1 << ha->portnum);
4376 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
4377 }
4378
4379 return rval;
4380 }
4381
4382 static int
__qla83xx_clear_drv_ack(scsi_qla_host_t * vha)4383 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
4384 {
4385 int rval = QLA_SUCCESS;
4386 struct qla_hw_data *ha = vha->hw;
4387 uint32_t drv_ack;
4388
4389 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4390 if (rval == QLA_SUCCESS) {
4391 drv_ack &= ~(1 << ha->portnum);
4392 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
4393 }
4394
4395 return rval;
4396 }
4397
4398 static const char *
qla83xx_dev_state_to_string(uint32_t dev_state)4399 qla83xx_dev_state_to_string(uint32_t dev_state)
4400 {
4401 switch (dev_state) {
4402 case QLA8XXX_DEV_COLD:
4403 return "COLD/RE-INIT";
4404 case QLA8XXX_DEV_INITIALIZING:
4405 return "INITIALIZING";
4406 case QLA8XXX_DEV_READY:
4407 return "READY";
4408 case QLA8XXX_DEV_NEED_RESET:
4409 return "NEED RESET";
4410 case QLA8XXX_DEV_NEED_QUIESCENT:
4411 return "NEED QUIESCENT";
4412 case QLA8XXX_DEV_FAILED:
4413 return "FAILED";
4414 case QLA8XXX_DEV_QUIESCENT:
4415 return "QUIESCENT";
4416 default:
4417 return "Unknown";
4418 }
4419 }
4420
4421 /* Assumes idc-lock always held on entry */
4422 void
qla83xx_idc_audit(scsi_qla_host_t * vha,int audit_type)4423 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
4424 {
4425 struct qla_hw_data *ha = vha->hw;
4426 uint32_t idc_audit_reg = 0, duration_secs = 0;
4427
4428 switch (audit_type) {
4429 case IDC_AUDIT_TIMESTAMP:
4430 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
4431 idc_audit_reg = (ha->portnum) |
4432 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
4433 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
4434 break;
4435
4436 case IDC_AUDIT_COMPLETION:
4437 duration_secs = ((jiffies_to_msecs(jiffies) -
4438 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
4439 idc_audit_reg = (ha->portnum) |
4440 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
4441 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
4442 break;
4443
4444 default:
4445 ql_log(ql_log_warn, vha, 0xb078,
4446 "Invalid audit type specified.\n");
4447 break;
4448 }
4449 }
4450
4451 /* Assumes idc_lock always held on entry */
4452 static int
qla83xx_initiating_reset(scsi_qla_host_t * vha)4453 qla83xx_initiating_reset(scsi_qla_host_t *vha)
4454 {
4455 struct qla_hw_data *ha = vha->hw;
4456 uint32_t idc_control, dev_state;
4457
4458 __qla83xx_get_idc_control(vha, &idc_control);
4459 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
4460 ql_log(ql_log_info, vha, 0xb080,
4461 "NIC Core reset has been disabled. idc-control=0x%x\n",
4462 idc_control);
4463 return QLA_FUNCTION_FAILED;
4464 }
4465
4466 /* Set NEED-RESET iff in READY state and we are the reset-owner */
4467 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4468 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
4469 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
4470 QLA8XXX_DEV_NEED_RESET);
4471 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
4472 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
4473 } else {
4474 const char *state = qla83xx_dev_state_to_string(dev_state);
4475 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
4476
4477 /* SV: XXX: Is timeout required here? */
4478 /* Wait for IDC state change READY -> NEED_RESET */
4479 while (dev_state == QLA8XXX_DEV_READY) {
4480 qla83xx_idc_unlock(vha, 0);
4481 msleep(200);
4482 qla83xx_idc_lock(vha, 0);
4483 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4484 }
4485 }
4486
4487 /* Send IDC ack by writing to drv-ack register */
4488 __qla83xx_set_drv_ack(vha);
4489
4490 return QLA_SUCCESS;
4491 }
4492
4493 int
__qla83xx_set_idc_control(scsi_qla_host_t * vha,uint32_t idc_control)4494 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
4495 {
4496 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
4497 }
4498
4499 int
__qla83xx_get_idc_control(scsi_qla_host_t * vha,uint32_t * idc_control)4500 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
4501 {
4502 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
4503 }
4504
4505 static int
qla83xx_check_driver_presence(scsi_qla_host_t * vha)4506 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
4507 {
4508 uint32_t drv_presence = 0;
4509 struct qla_hw_data *ha = vha->hw;
4510
4511 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4512 if (drv_presence & (1 << ha->portnum))
4513 return QLA_SUCCESS;
4514 else
4515 return QLA_TEST_FAILED;
4516 }
4517
4518 int
qla83xx_nic_core_reset(scsi_qla_host_t * vha)4519 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
4520 {
4521 int rval = QLA_SUCCESS;
4522 struct qla_hw_data *ha = vha->hw;
4523
4524 ql_dbg(ql_dbg_p3p, vha, 0xb058,
4525 "Entered %s().\n", __func__);
4526
4527 if (vha->device_flags & DFLG_DEV_FAILED) {
4528 ql_log(ql_log_warn, vha, 0xb059,
4529 "Device in unrecoverable FAILED state.\n");
4530 return QLA_FUNCTION_FAILED;
4531 }
4532
4533 qla83xx_idc_lock(vha, 0);
4534
4535 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
4536 ql_log(ql_log_warn, vha, 0xb05a,
4537 "Function=0x%x has been removed from IDC participation.\n",
4538 ha->portnum);
4539 rval = QLA_FUNCTION_FAILED;
4540 goto exit;
4541 }
4542
4543 qla83xx_reset_ownership(vha);
4544
4545 rval = qla83xx_initiating_reset(vha);
4546
4547 /*
4548 * Perform reset if we are the reset-owner,
4549 * else wait till IDC state changes to READY/FAILED.
4550 */
4551 if (rval == QLA_SUCCESS) {
4552 rval = qla83xx_idc_state_handler(vha);
4553
4554 if (rval == QLA_SUCCESS)
4555 ha->flags.nic_core_hung = 0;
4556 __qla83xx_clear_drv_ack(vha);
4557 }
4558
4559 exit:
4560 qla83xx_idc_unlock(vha, 0);
4561
4562 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
4563
4564 return rval;
4565 }
4566
4567 int
qla2xxx_mctp_dump(scsi_qla_host_t * vha)4568 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
4569 {
4570 struct qla_hw_data *ha = vha->hw;
4571 int rval = QLA_FUNCTION_FAILED;
4572
4573 if (!IS_MCTP_CAPABLE(ha)) {
4574 /* This message can be removed from the final version */
4575 ql_log(ql_log_info, vha, 0x506d,
4576 "This board is not MCTP capable\n");
4577 return rval;
4578 }
4579
4580 if (!ha->mctp_dump) {
4581 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
4582 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
4583
4584 if (!ha->mctp_dump) {
4585 ql_log(ql_log_warn, vha, 0x506e,
4586 "Failed to allocate memory for mctp dump\n");
4587 return rval;
4588 }
4589 }
4590
4591 #define MCTP_DUMP_STR_ADDR 0x00000000
4592 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
4593 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
4594 if (rval != QLA_SUCCESS) {
4595 ql_log(ql_log_warn, vha, 0x506f,
4596 "Failed to capture mctp dump\n");
4597 } else {
4598 ql_log(ql_log_info, vha, 0x5070,
4599 "Mctp dump capture for host (%ld/%p).\n",
4600 vha->host_no, ha->mctp_dump);
4601 ha->mctp_dumped = 1;
4602 }
4603
4604 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
4605 ha->flags.nic_core_reset_hdlr_active = 1;
4606 rval = qla83xx_restart_nic_firmware(vha);
4607 if (rval)
4608 /* NIC Core reset failed. */
4609 ql_log(ql_log_warn, vha, 0x5071,
4610 "Failed to restart nic firmware\n");
4611 else
4612 ql_dbg(ql_dbg_p3p, vha, 0xb084,
4613 "Restarted NIC firmware successfully.\n");
4614 ha->flags.nic_core_reset_hdlr_active = 0;
4615 }
4616
4617 return rval;
4618
4619 }
4620
4621 /*
4622 * qla2x00_quiesce_io
4623 * Description: This function will block the new I/Os
4624 * Its not aborting any I/Os as context
4625 * is not destroyed during quiescence
4626 * Arguments: scsi_qla_host_t
4627 * return : void
4628 */
4629 void
qla2x00_quiesce_io(scsi_qla_host_t * vha)4630 qla2x00_quiesce_io(scsi_qla_host_t *vha)
4631 {
4632 struct qla_hw_data *ha = vha->hw;
4633 struct scsi_qla_host *vp;
4634
4635 ql_dbg(ql_dbg_dpc, vha, 0x401d,
4636 "Quiescing I/O - ha=%p.\n", ha);
4637
4638 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
4639 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
4640 atomic_set(&vha->loop_state, LOOP_DOWN);
4641 qla2x00_mark_all_devices_lost(vha, 0);
4642 list_for_each_entry(vp, &ha->vp_list, list)
4643 qla2x00_mark_all_devices_lost(vp, 0);
4644 } else {
4645 if (!atomic_read(&vha->loop_down_timer))
4646 atomic_set(&vha->loop_down_timer,
4647 LOOP_DOWN_TIME);
4648 }
4649 /* Wait for pending cmds to complete */
4650 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
4651 }
4652
4653 void
qla2x00_abort_isp_cleanup(scsi_qla_host_t * vha)4654 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
4655 {
4656 struct qla_hw_data *ha = vha->hw;
4657 struct scsi_qla_host *vp;
4658 unsigned long flags;
4659 fc_port_t *fcport;
4660
4661 /* For ISP82XX, driver waits for completion of the commands.
4662 * online flag should be set.
4663 */
4664 if (!(IS_P3P_TYPE(ha)))
4665 vha->flags.online = 0;
4666 ha->flags.chip_reset_done = 0;
4667 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4668 vha->qla_stats.total_isp_aborts++;
4669
4670 ql_log(ql_log_info, vha, 0x00af,
4671 "Performing ISP error recovery - ha=%p.\n", ha);
4672
4673 /* For ISP82XX, reset_chip is just disabling interrupts.
4674 * Driver waits for the completion of the commands.
4675 * the interrupts need to be enabled.
4676 */
4677 if (!(IS_P3P_TYPE(ha)))
4678 ha->isp_ops->reset_chip(vha);
4679
4680 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
4681 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
4682 atomic_set(&vha->loop_state, LOOP_DOWN);
4683 qla2x00_mark_all_devices_lost(vha, 0);
4684
4685 spin_lock_irqsave(&ha->vport_slock, flags);
4686 list_for_each_entry(vp, &ha->vp_list, list) {
4687 atomic_inc(&vp->vref_count);
4688 spin_unlock_irqrestore(&ha->vport_slock, flags);
4689
4690 qla2x00_mark_all_devices_lost(vp, 0);
4691
4692 spin_lock_irqsave(&ha->vport_slock, flags);
4693 atomic_dec(&vp->vref_count);
4694 }
4695 spin_unlock_irqrestore(&ha->vport_slock, flags);
4696 } else {
4697 if (!atomic_read(&vha->loop_down_timer))
4698 atomic_set(&vha->loop_down_timer,
4699 LOOP_DOWN_TIME);
4700 }
4701
4702 /* Clear all async request states across all VPs. */
4703 list_for_each_entry(fcport, &vha->vp_fcports, list)
4704 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4705 spin_lock_irqsave(&ha->vport_slock, flags);
4706 list_for_each_entry(vp, &ha->vp_list, list) {
4707 atomic_inc(&vp->vref_count);
4708 spin_unlock_irqrestore(&ha->vport_slock, flags);
4709
4710 list_for_each_entry(fcport, &vp->vp_fcports, list)
4711 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4712
4713 spin_lock_irqsave(&ha->vport_slock, flags);
4714 atomic_dec(&vp->vref_count);
4715 }
4716 spin_unlock_irqrestore(&ha->vport_slock, flags);
4717
4718 if (!ha->flags.eeh_busy) {
4719 /* Make sure for ISP 82XX IO DMA is complete */
4720 if (IS_P3P_TYPE(ha)) {
4721 qla82xx_chip_reset_cleanup(vha);
4722 ql_log(ql_log_info, vha, 0x00b4,
4723 "Done chip reset cleanup.\n");
4724
4725 /* Done waiting for pending commands.
4726 * Reset the online flag.
4727 */
4728 vha->flags.online = 0;
4729 }
4730
4731 /* Requeue all commands in outstanding command list. */
4732 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4733 }
4734
4735 ha->chip_reset++;
4736 /* memory barrier */
4737 wmb();
4738 }
4739
4740 /*
4741 * qla2x00_abort_isp
4742 * Resets ISP and aborts all outstanding commands.
4743 *
4744 * Input:
4745 * ha = adapter block pointer.
4746 *
4747 * Returns:
4748 * 0 = success
4749 */
4750 int
qla2x00_abort_isp(scsi_qla_host_t * vha)4751 qla2x00_abort_isp(scsi_qla_host_t *vha)
4752 {
4753 int rval;
4754 uint8_t status = 0;
4755 struct qla_hw_data *ha = vha->hw;
4756 struct scsi_qla_host *vp;
4757 struct req_que *req = ha->req_q_map[0];
4758 unsigned long flags;
4759
4760 if (vha->flags.online) {
4761 qla2x00_abort_isp_cleanup(vha);
4762
4763 if (IS_QLA8031(ha)) {
4764 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
4765 "Clearing fcoe driver presence.\n");
4766 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
4767 ql_dbg(ql_dbg_p3p, vha, 0xb073,
4768 "Error while clearing DRV-Presence.\n");
4769 }
4770
4771 if (unlikely(pci_channel_offline(ha->pdev) &&
4772 ha->flags.pci_channel_io_perm_failure)) {
4773 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4774 status = 0;
4775 return status;
4776 }
4777
4778 ha->isp_ops->get_flash_version(vha, req->ring);
4779
4780 ha->isp_ops->nvram_config(vha);
4781
4782 if (!qla2x00_restart_isp(vha)) {
4783 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4784
4785 if (!atomic_read(&vha->loop_down_timer)) {
4786 /*
4787 * Issue marker command only when we are going
4788 * to start the I/O .
4789 */
4790 vha->marker_needed = 1;
4791 }
4792
4793 vha->flags.online = 1;
4794
4795 ha->isp_ops->enable_intrs(ha);
4796
4797 ha->isp_abort_cnt = 0;
4798 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4799
4800 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
4801 qla2x00_get_fw_version(vha);
4802 if (ha->fce) {
4803 ha->flags.fce_enabled = 1;
4804 memset(ha->fce, 0,
4805 fce_calc_size(ha->fce_bufs));
4806 rval = qla2x00_enable_fce_trace(vha,
4807 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
4808 &ha->fce_bufs);
4809 if (rval) {
4810 ql_log(ql_log_warn, vha, 0x8033,
4811 "Unable to reinitialize FCE "
4812 "(%d).\n", rval);
4813 ha->flags.fce_enabled = 0;
4814 }
4815 }
4816
4817 if (ha->eft) {
4818 memset(ha->eft, 0, EFT_SIZE);
4819 rval = qla2x00_enable_eft_trace(vha,
4820 ha->eft_dma, EFT_NUM_BUFFERS);
4821 if (rval) {
4822 ql_log(ql_log_warn, vha, 0x8034,
4823 "Unable to reinitialize EFT "
4824 "(%d).\n", rval);
4825 }
4826 }
4827 } else { /* failed the ISP abort */
4828 vha->flags.online = 1;
4829 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
4830 if (ha->isp_abort_cnt == 0) {
4831 ql_log(ql_log_fatal, vha, 0x8035,
4832 "ISP error recover failed - "
4833 "board disabled.\n");
4834 /*
4835 * The next call disables the board
4836 * completely.
4837 */
4838 ha->isp_ops->reset_adapter(vha);
4839 vha->flags.online = 0;
4840 clear_bit(ISP_ABORT_RETRY,
4841 &vha->dpc_flags);
4842 status = 0;
4843 } else { /* schedule another ISP abort */
4844 ha->isp_abort_cnt--;
4845 ql_dbg(ql_dbg_taskm, vha, 0x8020,
4846 "ISP abort - retry remaining %d.\n",
4847 ha->isp_abort_cnt);
4848 status = 1;
4849 }
4850 } else {
4851 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
4852 ql_dbg(ql_dbg_taskm, vha, 0x8021,
4853 "ISP error recovery - retrying (%d) "
4854 "more times.\n", ha->isp_abort_cnt);
4855 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4856 status = 1;
4857 }
4858 }
4859
4860 }
4861
4862 if (!status) {
4863 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
4864
4865 spin_lock_irqsave(&ha->vport_slock, flags);
4866 list_for_each_entry(vp, &ha->vp_list, list) {
4867 if (vp->vp_idx) {
4868 atomic_inc(&vp->vref_count);
4869 spin_unlock_irqrestore(&ha->vport_slock, flags);
4870
4871 qla2x00_vp_abort_isp(vp);
4872
4873 spin_lock_irqsave(&ha->vport_slock, flags);
4874 atomic_dec(&vp->vref_count);
4875 }
4876 }
4877 spin_unlock_irqrestore(&ha->vport_slock, flags);
4878
4879 if (IS_QLA8031(ha)) {
4880 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
4881 "Setting back fcoe driver presence.\n");
4882 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
4883 ql_dbg(ql_dbg_p3p, vha, 0xb074,
4884 "Error while setting DRV-Presence.\n");
4885 }
4886 } else {
4887 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
4888 __func__);
4889 }
4890
4891 return(status);
4892 }
4893
4894 /*
4895 * qla2x00_restart_isp
4896 * restarts the ISP after a reset
4897 *
4898 * Input:
4899 * ha = adapter block pointer.
4900 *
4901 * Returns:
4902 * 0 = success
4903 */
4904 static int
qla2x00_restart_isp(scsi_qla_host_t * vha)4905 qla2x00_restart_isp(scsi_qla_host_t *vha)
4906 {
4907 int status = 0;
4908 struct qla_hw_data *ha = vha->hw;
4909 struct req_que *req = ha->req_q_map[0];
4910 struct rsp_que *rsp = ha->rsp_q_map[0];
4911 unsigned long flags;
4912
4913 /* If firmware needs to be loaded */
4914 if (qla2x00_isp_firmware(vha)) {
4915 vha->flags.online = 0;
4916 status = ha->isp_ops->chip_diag(vha);
4917 if (!status)
4918 status = qla2x00_setup_chip(vha);
4919 }
4920
4921 if (!status && !(status = qla2x00_init_rings(vha))) {
4922 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4923 ha->flags.chip_reset_done = 1;
4924
4925 /* Initialize the queues in use */
4926 qla25xx_init_queues(ha);
4927
4928 status = qla2x00_fw_ready(vha);
4929 if (!status) {
4930 /* Issue a marker after FW becomes ready. */
4931 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
4932
4933 vha->flags.online = 1;
4934
4935 /*
4936 * Process any ATIO queue entries that came in
4937 * while we weren't online.
4938 */
4939 spin_lock_irqsave(&ha->hardware_lock, flags);
4940 if (qla_tgt_mode_enabled(vha))
4941 qlt_24xx_process_atio_queue(vha);
4942 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4943
4944 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4945 }
4946
4947 /* if no cable then assume it's good */
4948 if ((vha->device_flags & DFLG_NO_CABLE))
4949 status = 0;
4950 }
4951 return (status);
4952 }
4953
4954 static int
qla25xx_init_queues(struct qla_hw_data * ha)4955 qla25xx_init_queues(struct qla_hw_data *ha)
4956 {
4957 struct rsp_que *rsp = NULL;
4958 struct req_que *req = NULL;
4959 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4960 int ret = -1;
4961 int i;
4962
4963 for (i = 1; i < ha->max_rsp_queues; i++) {
4964 rsp = ha->rsp_q_map[i];
4965 if (rsp && test_bit(i, ha->rsp_qid_map)) {
4966 rsp->options &= ~BIT_0;
4967 ret = qla25xx_init_rsp_que(base_vha, rsp);
4968 if (ret != QLA_SUCCESS)
4969 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
4970 "%s Rsp que: %d init failed.\n",
4971 __func__, rsp->id);
4972 else
4973 ql_dbg(ql_dbg_init, base_vha, 0x0100,
4974 "%s Rsp que: %d inited.\n",
4975 __func__, rsp->id);
4976 }
4977 }
4978 for (i = 1; i < ha->max_req_queues; i++) {
4979 req = ha->req_q_map[i];
4980 if (req && test_bit(i, ha->req_qid_map)) {
4981 /* Clear outstanding commands array. */
4982 req->options &= ~BIT_0;
4983 ret = qla25xx_init_req_que(base_vha, req);
4984 if (ret != QLA_SUCCESS)
4985 ql_dbg(ql_dbg_init, base_vha, 0x0101,
4986 "%s Req que: %d init failed.\n",
4987 __func__, req->id);
4988 else
4989 ql_dbg(ql_dbg_init, base_vha, 0x0102,
4990 "%s Req que: %d inited.\n",
4991 __func__, req->id);
4992 }
4993 }
4994 return ret;
4995 }
4996
4997 /*
4998 * qla2x00_reset_adapter
4999 * Reset adapter.
5000 *
5001 * Input:
5002 * ha = adapter block pointer.
5003 */
5004 void
qla2x00_reset_adapter(scsi_qla_host_t * vha)5005 qla2x00_reset_adapter(scsi_qla_host_t *vha)
5006 {
5007 unsigned long flags = 0;
5008 struct qla_hw_data *ha = vha->hw;
5009 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5010
5011 vha->flags.online = 0;
5012 ha->isp_ops->disable_intrs(ha);
5013
5014 spin_lock_irqsave(&ha->hardware_lock, flags);
5015 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
5016 RD_REG_WORD(®->hccr); /* PCI Posting. */
5017 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
5018 RD_REG_WORD(®->hccr); /* PCI Posting. */
5019 spin_unlock_irqrestore(&ha->hardware_lock, flags);
5020 }
5021
5022 void
qla24xx_reset_adapter(scsi_qla_host_t * vha)5023 qla24xx_reset_adapter(scsi_qla_host_t *vha)
5024 {
5025 unsigned long flags = 0;
5026 struct qla_hw_data *ha = vha->hw;
5027 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
5028
5029 if (IS_P3P_TYPE(ha))
5030 return;
5031
5032 vha->flags.online = 0;
5033 ha->isp_ops->disable_intrs(ha);
5034
5035 spin_lock_irqsave(&ha->hardware_lock, flags);
5036 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET);
5037 RD_REG_DWORD(®->hccr);
5038 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE);
5039 RD_REG_DWORD(®->hccr);
5040 spin_unlock_irqrestore(&ha->hardware_lock, flags);
5041
5042 if (IS_NOPOLLING_TYPE(ha))
5043 ha->isp_ops->enable_intrs(ha);
5044 }
5045
5046 /* On sparc systems, obtain port and node WWN from firmware
5047 * properties.
5048 */
qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,struct nvram_24xx * nv)5049 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
5050 struct nvram_24xx *nv)
5051 {
5052 #ifdef CONFIG_SPARC
5053 struct qla_hw_data *ha = vha->hw;
5054 struct pci_dev *pdev = ha->pdev;
5055 struct device_node *dp = pci_device_to_OF_node(pdev);
5056 const u8 *val;
5057 int len;
5058
5059 val = of_get_property(dp, "port-wwn", &len);
5060 if (val && len >= WWN_SIZE)
5061 memcpy(nv->port_name, val, WWN_SIZE);
5062
5063 val = of_get_property(dp, "node-wwn", &len);
5064 if (val && len >= WWN_SIZE)
5065 memcpy(nv->node_name, val, WWN_SIZE);
5066 #endif
5067 }
5068
5069 int
qla24xx_nvram_config(scsi_qla_host_t * vha)5070 qla24xx_nvram_config(scsi_qla_host_t *vha)
5071 {
5072 int rval;
5073 struct init_cb_24xx *icb;
5074 struct nvram_24xx *nv;
5075 uint32_t *dptr;
5076 uint8_t *dptr1, *dptr2;
5077 uint32_t chksum;
5078 uint16_t cnt;
5079 struct qla_hw_data *ha = vha->hw;
5080
5081 rval = QLA_SUCCESS;
5082 icb = (struct init_cb_24xx *)ha->init_cb;
5083 nv = ha->nvram;
5084
5085 /* Determine NVRAM starting address. */
5086 if (ha->port_no == 0) {
5087 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
5088 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
5089 } else {
5090 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
5091 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
5092 }
5093
5094 ha->nvram_size = sizeof(struct nvram_24xx);
5095 ha->vpd_size = FA_NVRAM_VPD_SIZE;
5096
5097 /* Get VPD data into cache */
5098 ha->vpd = ha->nvram + VPD_OFFSET;
5099 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
5100 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
5101
5102 /* Get NVRAM data into cache and calculate checksum. */
5103 dptr = (uint32_t *)nv;
5104 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
5105 ha->nvram_size);
5106 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
5107 chksum += le32_to_cpu(*dptr++);
5108
5109 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
5110 "Contents of NVRAM\n");
5111 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
5112 (uint8_t *)nv, ha->nvram_size);
5113
5114 /* Bad NVRAM data, set defaults parameters. */
5115 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
5116 || nv->id[3] != ' ' ||
5117 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
5118 /* Reset NVRAM data. */
5119 ql_log(ql_log_warn, vha, 0x006b,
5120 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
5121 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
5122 ql_log(ql_log_warn, vha, 0x006c,
5123 "Falling back to functioning (yet invalid -- WWPN) "
5124 "defaults.\n");
5125
5126 /*
5127 * Set default initialization control block.
5128 */
5129 memset(nv, 0, ha->nvram_size);
5130 nv->nvram_version = cpu_to_le16(ICB_VERSION);
5131 nv->version = cpu_to_le16(ICB_VERSION);
5132 nv->frame_payload_size = 2048;
5133 nv->execution_throttle = cpu_to_le16(0xFFFF);
5134 nv->exchange_count = cpu_to_le16(0);
5135 nv->hard_address = cpu_to_le16(124);
5136 nv->port_name[0] = 0x21;
5137 nv->port_name[1] = 0x00 + ha->port_no + 1;
5138 nv->port_name[2] = 0x00;
5139 nv->port_name[3] = 0xe0;
5140 nv->port_name[4] = 0x8b;
5141 nv->port_name[5] = 0x1c;
5142 nv->port_name[6] = 0x55;
5143 nv->port_name[7] = 0x86;
5144 nv->node_name[0] = 0x20;
5145 nv->node_name[1] = 0x00;
5146 nv->node_name[2] = 0x00;
5147 nv->node_name[3] = 0xe0;
5148 nv->node_name[4] = 0x8b;
5149 nv->node_name[5] = 0x1c;
5150 nv->node_name[6] = 0x55;
5151 nv->node_name[7] = 0x86;
5152 qla24xx_nvram_wwn_from_ofw(vha, nv);
5153 nv->login_retry_count = cpu_to_le16(8);
5154 nv->interrupt_delay_timer = cpu_to_le16(0);
5155 nv->login_timeout = cpu_to_le16(0);
5156 nv->firmware_options_1 =
5157 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
5158 nv->firmware_options_2 = cpu_to_le32(2 << 4);
5159 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
5160 nv->firmware_options_3 = cpu_to_le32(2 << 13);
5161 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
5162 nv->efi_parameters = cpu_to_le32(0);
5163 nv->reset_delay = 5;
5164 nv->max_luns_per_target = cpu_to_le16(128);
5165 nv->port_down_retry_count = cpu_to_le16(30);
5166 nv->link_down_timeout = cpu_to_le16(30);
5167
5168 rval = 1;
5169 }
5170
5171 if (!qla_ini_mode_enabled(vha)) {
5172 /* Don't enable full login after initial LIP */
5173 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
5174 /* Don't enable LIP full login for initiator */
5175 nv->host_p &= cpu_to_le32(~BIT_10);
5176 }
5177
5178 qlt_24xx_config_nvram_stage1(vha, nv);
5179
5180 /* Reset Initialization control block */
5181 memset(icb, 0, ha->init_cb_size);
5182
5183 /* Copy 1st segment. */
5184 dptr1 = (uint8_t *)icb;
5185 dptr2 = (uint8_t *)&nv->version;
5186 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
5187 while (cnt--)
5188 *dptr1++ = *dptr2++;
5189
5190 icb->login_retry_count = nv->login_retry_count;
5191 icb->link_down_on_nos = nv->link_down_on_nos;
5192
5193 /* Copy 2nd segment. */
5194 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
5195 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
5196 cnt = (uint8_t *)&icb->reserved_3 -
5197 (uint8_t *)&icb->interrupt_delay_timer;
5198 while (cnt--)
5199 *dptr1++ = *dptr2++;
5200
5201 /*
5202 * Setup driver NVRAM options.
5203 */
5204 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
5205 "QLA2462");
5206
5207 qlt_24xx_config_nvram_stage2(vha, icb);
5208
5209 if (nv->host_p & cpu_to_le32(BIT_15)) {
5210 /* Use alternate WWN? */
5211 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5212 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5213 }
5214
5215 /* Prepare nodename */
5216 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
5217 /*
5218 * Firmware will apply the following mask if the nodename was
5219 * not provided.
5220 */
5221 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5222 icb->node_name[0] &= 0xF0;
5223 }
5224
5225 /* Set host adapter parameters. */
5226 ha->flags.disable_risc_code_load = 0;
5227 ha->flags.enable_lip_reset = 0;
5228 ha->flags.enable_lip_full_login =
5229 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
5230 ha->flags.enable_target_reset =
5231 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
5232 ha->flags.enable_led_scheme = 0;
5233 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
5234
5235 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
5236 (BIT_6 | BIT_5 | BIT_4)) >> 4;
5237
5238 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
5239 sizeof(ha->fw_seriallink_options24));
5240
5241 /* save HBA serial number */
5242 ha->serial0 = icb->port_name[5];
5243 ha->serial1 = icb->port_name[6];
5244 ha->serial2 = icb->port_name[7];
5245 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5246 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5247
5248 icb->execution_throttle = cpu_to_le16(0xFFFF);
5249
5250 ha->retry_count = le16_to_cpu(nv->login_retry_count);
5251
5252 /* Set minimum login_timeout to 4 seconds. */
5253 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
5254 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
5255 if (le16_to_cpu(nv->login_timeout) < 4)
5256 nv->login_timeout = cpu_to_le16(4);
5257 ha->login_timeout = le16_to_cpu(nv->login_timeout);
5258 icb->login_timeout = nv->login_timeout;
5259
5260 /* Set minimum RATOV to 100 tenths of a second. */
5261 ha->r_a_tov = 100;
5262
5263 ha->loop_reset_delay = nv->reset_delay;
5264
5265 /* Link Down Timeout = 0:
5266 *
5267 * When Port Down timer expires we will start returning
5268 * I/O's to OS with "DID_NO_CONNECT".
5269 *
5270 * Link Down Timeout != 0:
5271 *
5272 * The driver waits for the link to come up after link down
5273 * before returning I/Os to OS with "DID_NO_CONNECT".
5274 */
5275 if (le16_to_cpu(nv->link_down_timeout) == 0) {
5276 ha->loop_down_abort_time =
5277 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5278 } else {
5279 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
5280 ha->loop_down_abort_time =
5281 (LOOP_DOWN_TIME - ha->link_down_timeout);
5282 }
5283
5284 /* Need enough time to try and get the port back. */
5285 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
5286 if (qlport_down_retry)
5287 ha->port_down_retry_count = qlport_down_retry;
5288
5289 /* Set login_retry_count */
5290 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
5291 if (ha->port_down_retry_count ==
5292 le16_to_cpu(nv->port_down_retry_count) &&
5293 ha->port_down_retry_count > 3)
5294 ha->login_retry_count = ha->port_down_retry_count;
5295 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5296 ha->login_retry_count = ha->port_down_retry_count;
5297 if (ql2xloginretrycount)
5298 ha->login_retry_count = ql2xloginretrycount;
5299
5300 /* Enable ZIO. */
5301 if (!vha->flags.init_done) {
5302 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5303 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5304 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5305 le16_to_cpu(icb->interrupt_delay_timer): 2;
5306 }
5307 icb->firmware_options_2 &= cpu_to_le32(
5308 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
5309 vha->flags.process_response_queue = 0;
5310 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5311 ha->zio_mode = QLA_ZIO_MODE_6;
5312
5313 ql_log(ql_log_info, vha, 0x006f,
5314 "ZIO mode %d enabled; timer delay (%d us).\n",
5315 ha->zio_mode, ha->zio_timer * 100);
5316
5317 icb->firmware_options_2 |= cpu_to_le32(
5318 (uint32_t)ha->zio_mode);
5319 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
5320 vha->flags.process_response_queue = 1;
5321 }
5322
5323 if (rval) {
5324 ql_log(ql_log_warn, vha, 0x0070,
5325 "NVRAM configuration failed.\n");
5326 }
5327 return (rval);
5328 }
5329
5330 static int
qla24xx_load_risc_flash(scsi_qla_host_t * vha,uint32_t * srisc_addr,uint32_t faddr)5331 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
5332 uint32_t faddr)
5333 {
5334 int rval = QLA_SUCCESS;
5335 int segments, fragment;
5336 uint32_t *dcode, dlen;
5337 uint32_t risc_addr;
5338 uint32_t risc_size;
5339 uint32_t i;
5340 struct qla_hw_data *ha = vha->hw;
5341 struct req_que *req = ha->req_q_map[0];
5342
5343 ql_dbg(ql_dbg_init, vha, 0x008b,
5344 "FW: Loading firmware from flash (%x).\n", faddr);
5345
5346 rval = QLA_SUCCESS;
5347
5348 segments = FA_RISC_CODE_SEGMENTS;
5349 dcode = (uint32_t *)req->ring;
5350 *srisc_addr = 0;
5351
5352 /* Validate firmware image by checking version. */
5353 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
5354 for (i = 0; i < 4; i++)
5355 dcode[i] = be32_to_cpu(dcode[i]);
5356 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
5357 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
5358 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
5359 dcode[3] == 0)) {
5360 ql_log(ql_log_fatal, vha, 0x008c,
5361 "Unable to verify the integrity of flash firmware "
5362 "image.\n");
5363 ql_log(ql_log_fatal, vha, 0x008d,
5364 "Firmware data: %08x %08x %08x %08x.\n",
5365 dcode[0], dcode[1], dcode[2], dcode[3]);
5366
5367 return QLA_FUNCTION_FAILED;
5368 }
5369
5370 while (segments && rval == QLA_SUCCESS) {
5371 /* Read segment's load information. */
5372 qla24xx_read_flash_data(vha, dcode, faddr, 4);
5373
5374 risc_addr = be32_to_cpu(dcode[2]);
5375 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
5376 risc_size = be32_to_cpu(dcode[3]);
5377
5378 fragment = 0;
5379 while (risc_size > 0 && rval == QLA_SUCCESS) {
5380 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
5381 if (dlen > risc_size)
5382 dlen = risc_size;
5383
5384 ql_dbg(ql_dbg_init, vha, 0x008e,
5385 "Loading risc segment@ risc addr %x "
5386 "number of dwords 0x%x offset 0x%x.\n",
5387 risc_addr, dlen, faddr);
5388
5389 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
5390 for (i = 0; i < dlen; i++)
5391 dcode[i] = swab32(dcode[i]);
5392
5393 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5394 dlen);
5395 if (rval) {
5396 ql_log(ql_log_fatal, vha, 0x008f,
5397 "Failed to load segment %d of firmware.\n",
5398 fragment);
5399 return QLA_FUNCTION_FAILED;
5400 }
5401
5402 faddr += dlen;
5403 risc_addr += dlen;
5404 risc_size -= dlen;
5405 fragment++;
5406 }
5407
5408 /* Next segment. */
5409 segments--;
5410 }
5411
5412 if (!IS_QLA27XX(ha))
5413 return rval;
5414
5415 if (ha->fw_dump_template)
5416 vfree(ha->fw_dump_template);
5417 ha->fw_dump_template = NULL;
5418 ha->fw_dump_template_len = 0;
5419
5420 ql_dbg(ql_dbg_init, vha, 0x0161,
5421 "Loading fwdump template from %x\n", faddr);
5422 qla24xx_read_flash_data(vha, dcode, faddr, 7);
5423 risc_size = be32_to_cpu(dcode[2]);
5424 ql_dbg(ql_dbg_init, vha, 0x0162,
5425 "-> array size %x dwords\n", risc_size);
5426 if (risc_size == 0 || risc_size == ~0)
5427 goto default_template;
5428
5429 dlen = (risc_size - 8) * sizeof(*dcode);
5430 ql_dbg(ql_dbg_init, vha, 0x0163,
5431 "-> template allocating %x bytes...\n", dlen);
5432 ha->fw_dump_template = vmalloc(dlen);
5433 if (!ha->fw_dump_template) {
5434 ql_log(ql_log_warn, vha, 0x0164,
5435 "Failed fwdump template allocate %x bytes.\n", risc_size);
5436 goto default_template;
5437 }
5438
5439 faddr += 7;
5440 risc_size -= 8;
5441 dcode = ha->fw_dump_template;
5442 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
5443 for (i = 0; i < risc_size; i++)
5444 dcode[i] = le32_to_cpu(dcode[i]);
5445
5446 if (!qla27xx_fwdt_template_valid(dcode)) {
5447 ql_log(ql_log_warn, vha, 0x0165,
5448 "Failed fwdump template validate\n");
5449 goto default_template;
5450 }
5451
5452 dlen = qla27xx_fwdt_template_size(dcode);
5453 ql_dbg(ql_dbg_init, vha, 0x0166,
5454 "-> template size %x bytes\n", dlen);
5455 if (dlen > risc_size * sizeof(*dcode)) {
5456 ql_log(ql_log_warn, vha, 0x0167,
5457 "Failed fwdump template exceeds array by %x bytes\n",
5458 (uint32_t)(dlen - risc_size * sizeof(*dcode)));
5459 goto default_template;
5460 }
5461 ha->fw_dump_template_len = dlen;
5462 return rval;
5463
5464 default_template:
5465 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n");
5466 if (ha->fw_dump_template)
5467 vfree(ha->fw_dump_template);
5468 ha->fw_dump_template = NULL;
5469 ha->fw_dump_template_len = 0;
5470
5471 dlen = qla27xx_fwdt_template_default_size();
5472 ql_dbg(ql_dbg_init, vha, 0x0169,
5473 "-> template allocating %x bytes...\n", dlen);
5474 ha->fw_dump_template = vmalloc(dlen);
5475 if (!ha->fw_dump_template) {
5476 ql_log(ql_log_warn, vha, 0x016a,
5477 "Failed fwdump template allocate %x bytes.\n", risc_size);
5478 goto failed_template;
5479 }
5480
5481 dcode = ha->fw_dump_template;
5482 risc_size = dlen / sizeof(*dcode);
5483 memcpy(dcode, qla27xx_fwdt_template_default(), dlen);
5484 for (i = 0; i < risc_size; i++)
5485 dcode[i] = be32_to_cpu(dcode[i]);
5486
5487 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
5488 ql_log(ql_log_warn, vha, 0x016b,
5489 "Failed fwdump template validate\n");
5490 goto failed_template;
5491 }
5492
5493 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
5494 ql_dbg(ql_dbg_init, vha, 0x016c,
5495 "-> template size %x bytes\n", dlen);
5496 ha->fw_dump_template_len = dlen;
5497 return rval;
5498
5499 failed_template:
5500 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n");
5501 if (ha->fw_dump_template)
5502 vfree(ha->fw_dump_template);
5503 ha->fw_dump_template = NULL;
5504 ha->fw_dump_template_len = 0;
5505 return rval;
5506 }
5507
5508 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
5509
5510 int
qla2x00_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)5511 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5512 {
5513 int rval;
5514 int i, fragment;
5515 uint16_t *wcode, *fwcode;
5516 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
5517 struct fw_blob *blob;
5518 struct qla_hw_data *ha = vha->hw;
5519 struct req_que *req = ha->req_q_map[0];
5520
5521 /* Load firmware blob. */
5522 blob = qla2x00_request_firmware(vha);
5523 if (!blob) {
5524 ql_log(ql_log_info, vha, 0x0083,
5525 "Firmware image unavailable.\n");
5526 ql_log(ql_log_info, vha, 0x0084,
5527 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5528 return QLA_FUNCTION_FAILED;
5529 }
5530
5531 rval = QLA_SUCCESS;
5532
5533 wcode = (uint16_t *)req->ring;
5534 *srisc_addr = 0;
5535 fwcode = (uint16_t *)blob->fw->data;
5536 fwclen = 0;
5537
5538 /* Validate firmware image by checking version. */
5539 if (blob->fw->size < 8 * sizeof(uint16_t)) {
5540 ql_log(ql_log_fatal, vha, 0x0085,
5541 "Unable to verify integrity of firmware image (%Zd).\n",
5542 blob->fw->size);
5543 goto fail_fw_integrity;
5544 }
5545 for (i = 0; i < 4; i++)
5546 wcode[i] = be16_to_cpu(fwcode[i + 4]);
5547 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
5548 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
5549 wcode[2] == 0 && wcode[3] == 0)) {
5550 ql_log(ql_log_fatal, vha, 0x0086,
5551 "Unable to verify integrity of firmware image.\n");
5552 ql_log(ql_log_fatal, vha, 0x0087,
5553 "Firmware data: %04x %04x %04x %04x.\n",
5554 wcode[0], wcode[1], wcode[2], wcode[3]);
5555 goto fail_fw_integrity;
5556 }
5557
5558 seg = blob->segs;
5559 while (*seg && rval == QLA_SUCCESS) {
5560 risc_addr = *seg;
5561 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
5562 risc_size = be16_to_cpu(fwcode[3]);
5563
5564 /* Validate firmware image size. */
5565 fwclen += risc_size * sizeof(uint16_t);
5566 if (blob->fw->size < fwclen) {
5567 ql_log(ql_log_fatal, vha, 0x0088,
5568 "Unable to verify integrity of firmware image "
5569 "(%Zd).\n", blob->fw->size);
5570 goto fail_fw_integrity;
5571 }
5572
5573 fragment = 0;
5574 while (risc_size > 0 && rval == QLA_SUCCESS) {
5575 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
5576 if (wlen > risc_size)
5577 wlen = risc_size;
5578 ql_dbg(ql_dbg_init, vha, 0x0089,
5579 "Loading risc segment@ risc addr %x number of "
5580 "words 0x%x.\n", risc_addr, wlen);
5581
5582 for (i = 0; i < wlen; i++)
5583 wcode[i] = swab16(fwcode[i]);
5584
5585 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5586 wlen);
5587 if (rval) {
5588 ql_log(ql_log_fatal, vha, 0x008a,
5589 "Failed to load segment %d of firmware.\n",
5590 fragment);
5591 break;
5592 }
5593
5594 fwcode += wlen;
5595 risc_addr += wlen;
5596 risc_size -= wlen;
5597 fragment++;
5598 }
5599
5600 /* Next segment. */
5601 seg++;
5602 }
5603 return rval;
5604
5605 fail_fw_integrity:
5606 return QLA_FUNCTION_FAILED;
5607 }
5608
5609 static int
qla24xx_load_risc_blob(scsi_qla_host_t * vha,uint32_t * srisc_addr)5610 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5611 {
5612 int rval;
5613 int segments, fragment;
5614 uint32_t *dcode, dlen;
5615 uint32_t risc_addr;
5616 uint32_t risc_size;
5617 uint32_t i;
5618 struct fw_blob *blob;
5619 const uint32_t *fwcode;
5620 uint32_t fwclen;
5621 struct qla_hw_data *ha = vha->hw;
5622 struct req_que *req = ha->req_q_map[0];
5623
5624 /* Load firmware blob. */
5625 blob = qla2x00_request_firmware(vha);
5626 if (!blob) {
5627 ql_log(ql_log_warn, vha, 0x0090,
5628 "Firmware image unavailable.\n");
5629 ql_log(ql_log_warn, vha, 0x0091,
5630 "Firmware images can be retrieved from: "
5631 QLA_FW_URL ".\n");
5632
5633 return QLA_FUNCTION_FAILED;
5634 }
5635
5636 ql_dbg(ql_dbg_init, vha, 0x0092,
5637 "FW: Loading via request-firmware.\n");
5638
5639 rval = QLA_SUCCESS;
5640
5641 segments = FA_RISC_CODE_SEGMENTS;
5642 dcode = (uint32_t *)req->ring;
5643 *srisc_addr = 0;
5644 fwcode = (uint32_t *)blob->fw->data;
5645 fwclen = 0;
5646
5647 /* Validate firmware image by checking version. */
5648 if (blob->fw->size < 8 * sizeof(uint32_t)) {
5649 ql_log(ql_log_fatal, vha, 0x0093,
5650 "Unable to verify integrity of firmware image (%Zd).\n",
5651 blob->fw->size);
5652 return QLA_FUNCTION_FAILED;
5653 }
5654 for (i = 0; i < 4; i++)
5655 dcode[i] = be32_to_cpu(fwcode[i + 4]);
5656 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
5657 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
5658 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
5659 dcode[3] == 0)) {
5660 ql_log(ql_log_fatal, vha, 0x0094,
5661 "Unable to verify integrity of firmware image (%Zd).\n",
5662 blob->fw->size);
5663 ql_log(ql_log_fatal, vha, 0x0095,
5664 "Firmware data: %08x %08x %08x %08x.\n",
5665 dcode[0], dcode[1], dcode[2], dcode[3]);
5666 return QLA_FUNCTION_FAILED;
5667 }
5668
5669 while (segments && rval == QLA_SUCCESS) {
5670 risc_addr = be32_to_cpu(fwcode[2]);
5671 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
5672 risc_size = be32_to_cpu(fwcode[3]);
5673
5674 /* Validate firmware image size. */
5675 fwclen += risc_size * sizeof(uint32_t);
5676 if (blob->fw->size < fwclen) {
5677 ql_log(ql_log_fatal, vha, 0x0096,
5678 "Unable to verify integrity of firmware image "
5679 "(%Zd).\n", blob->fw->size);
5680 return QLA_FUNCTION_FAILED;
5681 }
5682
5683 fragment = 0;
5684 while (risc_size > 0 && rval == QLA_SUCCESS) {
5685 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
5686 if (dlen > risc_size)
5687 dlen = risc_size;
5688
5689 ql_dbg(ql_dbg_init, vha, 0x0097,
5690 "Loading risc segment@ risc addr %x "
5691 "number of dwords 0x%x.\n", risc_addr, dlen);
5692
5693 for (i = 0; i < dlen; i++)
5694 dcode[i] = swab32(fwcode[i]);
5695
5696 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5697 dlen);
5698 if (rval) {
5699 ql_log(ql_log_fatal, vha, 0x0098,
5700 "Failed to load segment %d of firmware.\n",
5701 fragment);
5702 return QLA_FUNCTION_FAILED;
5703 }
5704
5705 fwcode += dlen;
5706 risc_addr += dlen;
5707 risc_size -= dlen;
5708 fragment++;
5709 }
5710
5711 /* Next segment. */
5712 segments--;
5713 }
5714
5715 if (!IS_QLA27XX(ha))
5716 return rval;
5717
5718 if (ha->fw_dump_template)
5719 vfree(ha->fw_dump_template);
5720 ha->fw_dump_template = NULL;
5721 ha->fw_dump_template_len = 0;
5722
5723 ql_dbg(ql_dbg_init, vha, 0x171,
5724 "Loading fwdump template from %x\n",
5725 (uint32_t)((void *)fwcode - (void *)blob->fw->data));
5726 risc_size = be32_to_cpu(fwcode[2]);
5727 ql_dbg(ql_dbg_init, vha, 0x172,
5728 "-> array size %x dwords\n", risc_size);
5729 if (risc_size == 0 || risc_size == ~0)
5730 goto default_template;
5731
5732 dlen = (risc_size - 8) * sizeof(*fwcode);
5733 ql_dbg(ql_dbg_init, vha, 0x0173,
5734 "-> template allocating %x bytes...\n", dlen);
5735 ha->fw_dump_template = vmalloc(dlen);
5736 if (!ha->fw_dump_template) {
5737 ql_log(ql_log_warn, vha, 0x0174,
5738 "Failed fwdump template allocate %x bytes.\n", risc_size);
5739 goto default_template;
5740 }
5741
5742 fwcode += 7;
5743 risc_size -= 8;
5744 dcode = ha->fw_dump_template;
5745 for (i = 0; i < risc_size; i++)
5746 dcode[i] = le32_to_cpu(fwcode[i]);
5747
5748 if (!qla27xx_fwdt_template_valid(dcode)) {
5749 ql_log(ql_log_warn, vha, 0x0175,
5750 "Failed fwdump template validate\n");
5751 goto default_template;
5752 }
5753
5754 dlen = qla27xx_fwdt_template_size(dcode);
5755 ql_dbg(ql_dbg_init, vha, 0x0176,
5756 "-> template size %x bytes\n", dlen);
5757 if (dlen > risc_size * sizeof(*fwcode)) {
5758 ql_log(ql_log_warn, vha, 0x0177,
5759 "Failed fwdump template exceeds array by %x bytes\n",
5760 (uint32_t)(dlen - risc_size * sizeof(*fwcode)));
5761 goto default_template;
5762 }
5763 ha->fw_dump_template_len = dlen;
5764 return rval;
5765
5766 default_template:
5767 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n");
5768 if (ha->fw_dump_template)
5769 vfree(ha->fw_dump_template);
5770 ha->fw_dump_template = NULL;
5771 ha->fw_dump_template_len = 0;
5772
5773 dlen = qla27xx_fwdt_template_default_size();
5774 ql_dbg(ql_dbg_init, vha, 0x0179,
5775 "-> template allocating %x bytes...\n", dlen);
5776 ha->fw_dump_template = vmalloc(dlen);
5777 if (!ha->fw_dump_template) {
5778 ql_log(ql_log_warn, vha, 0x017a,
5779 "Failed fwdump template allocate %x bytes.\n", risc_size);
5780 goto failed_template;
5781 }
5782
5783 dcode = ha->fw_dump_template;
5784 risc_size = dlen / sizeof(*fwcode);
5785 fwcode = qla27xx_fwdt_template_default();
5786 for (i = 0; i < risc_size; i++)
5787 dcode[i] = be32_to_cpu(fwcode[i]);
5788
5789 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
5790 ql_log(ql_log_warn, vha, 0x017b,
5791 "Failed fwdump template validate\n");
5792 goto failed_template;
5793 }
5794
5795 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
5796 ql_dbg(ql_dbg_init, vha, 0x017c,
5797 "-> template size %x bytes\n", dlen);
5798 ha->fw_dump_template_len = dlen;
5799 return rval;
5800
5801 failed_template:
5802 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n");
5803 if (ha->fw_dump_template)
5804 vfree(ha->fw_dump_template);
5805 ha->fw_dump_template = NULL;
5806 ha->fw_dump_template_len = 0;
5807 return rval;
5808 }
5809
5810 int
qla24xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)5811 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5812 {
5813 int rval;
5814
5815 if (ql2xfwloadbin == 1)
5816 return qla81xx_load_risc(vha, srisc_addr);
5817
5818 /*
5819 * FW Load priority:
5820 * 1) Firmware via request-firmware interface (.bin file).
5821 * 2) Firmware residing in flash.
5822 */
5823 rval = qla24xx_load_risc_blob(vha, srisc_addr);
5824 if (rval == QLA_SUCCESS)
5825 return rval;
5826
5827 return qla24xx_load_risc_flash(vha, srisc_addr,
5828 vha->hw->flt_region_fw);
5829 }
5830
5831 int
qla81xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)5832 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5833 {
5834 int rval;
5835 struct qla_hw_data *ha = vha->hw;
5836
5837 if (ql2xfwloadbin == 2)
5838 goto try_blob_fw;
5839
5840 /*
5841 * FW Load priority:
5842 * 1) Firmware residing in flash.
5843 * 2) Firmware via request-firmware interface (.bin file).
5844 * 3) Golden-Firmware residing in flash -- limited operation.
5845 */
5846 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
5847 if (rval == QLA_SUCCESS)
5848 return rval;
5849
5850 try_blob_fw:
5851 rval = qla24xx_load_risc_blob(vha, srisc_addr);
5852 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
5853 return rval;
5854
5855 ql_log(ql_log_info, vha, 0x0099,
5856 "Attempting to fallback to golden firmware.\n");
5857 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
5858 if (rval != QLA_SUCCESS)
5859 return rval;
5860
5861 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
5862 ha->flags.running_gold_fw = 1;
5863 return rval;
5864 }
5865
5866 void
qla2x00_try_to_stop_firmware(scsi_qla_host_t * vha)5867 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
5868 {
5869 int ret, retries;
5870 struct qla_hw_data *ha = vha->hw;
5871
5872 if (ha->flags.pci_channel_io_perm_failure)
5873 return;
5874 if (!IS_FWI2_CAPABLE(ha))
5875 return;
5876 if (!ha->fw_major_version)
5877 return;
5878
5879 ret = qla2x00_stop_firmware(vha);
5880 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
5881 ret != QLA_INVALID_COMMAND && retries ; retries--) {
5882 ha->isp_ops->reset_chip(vha);
5883 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
5884 continue;
5885 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
5886 continue;
5887 ql_log(ql_log_info, vha, 0x8015,
5888 "Attempting retry of stop-firmware command.\n");
5889 ret = qla2x00_stop_firmware(vha);
5890 }
5891 }
5892
5893 int
qla24xx_configure_vhba(scsi_qla_host_t * vha)5894 qla24xx_configure_vhba(scsi_qla_host_t *vha)
5895 {
5896 int rval = QLA_SUCCESS;
5897 int rval2;
5898 uint16_t mb[MAILBOX_REGISTER_COUNT];
5899 struct qla_hw_data *ha = vha->hw;
5900 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5901 struct req_que *req;
5902 struct rsp_que *rsp;
5903
5904 if (!vha->vp_idx)
5905 return -EINVAL;
5906
5907 rval = qla2x00_fw_ready(base_vha);
5908 if (ha->flags.cpu_affinity_enabled)
5909 req = ha->req_q_map[0];
5910 else
5911 req = vha->req;
5912 rsp = req->rsp;
5913
5914 if (rval == QLA_SUCCESS) {
5915 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5916 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5917 }
5918
5919 vha->flags.management_server_logged_in = 0;
5920
5921 /* Login to SNS first */
5922 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
5923 BIT_1);
5924 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5925 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
5926 ql_dbg(ql_dbg_init, vha, 0x0120,
5927 "Failed SNS login: loop_id=%x, rval2=%d\n",
5928 NPH_SNS, rval2);
5929 else
5930 ql_dbg(ql_dbg_init, vha, 0x0103,
5931 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
5932 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
5933 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
5934 return (QLA_FUNCTION_FAILED);
5935 }
5936
5937 atomic_set(&vha->loop_down_timer, 0);
5938 atomic_set(&vha->loop_state, LOOP_UP);
5939 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5940 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5941 rval = qla2x00_loop_resync(base_vha);
5942
5943 return rval;
5944 }
5945
5946 /* 84XX Support **************************************************************/
5947
5948 static LIST_HEAD(qla_cs84xx_list);
5949 static DEFINE_MUTEX(qla_cs84xx_mutex);
5950
5951 static struct qla_chip_state_84xx *
qla84xx_get_chip(struct scsi_qla_host * vha)5952 qla84xx_get_chip(struct scsi_qla_host *vha)
5953 {
5954 struct qla_chip_state_84xx *cs84xx;
5955 struct qla_hw_data *ha = vha->hw;
5956
5957 mutex_lock(&qla_cs84xx_mutex);
5958
5959 /* Find any shared 84xx chip. */
5960 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
5961 if (cs84xx->bus == ha->pdev->bus) {
5962 kref_get(&cs84xx->kref);
5963 goto done;
5964 }
5965 }
5966
5967 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
5968 if (!cs84xx)
5969 goto done;
5970
5971 kref_init(&cs84xx->kref);
5972 spin_lock_init(&cs84xx->access_lock);
5973 mutex_init(&cs84xx->fw_update_mutex);
5974 cs84xx->bus = ha->pdev->bus;
5975
5976 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
5977 done:
5978 mutex_unlock(&qla_cs84xx_mutex);
5979 return cs84xx;
5980 }
5981
5982 static void
__qla84xx_chip_release(struct kref * kref)5983 __qla84xx_chip_release(struct kref *kref)
5984 {
5985 struct qla_chip_state_84xx *cs84xx =
5986 container_of(kref, struct qla_chip_state_84xx, kref);
5987
5988 mutex_lock(&qla_cs84xx_mutex);
5989 list_del(&cs84xx->list);
5990 mutex_unlock(&qla_cs84xx_mutex);
5991 kfree(cs84xx);
5992 }
5993
5994 void
qla84xx_put_chip(struct scsi_qla_host * vha)5995 qla84xx_put_chip(struct scsi_qla_host *vha)
5996 {
5997 struct qla_hw_data *ha = vha->hw;
5998 if (ha->cs84xx)
5999 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
6000 }
6001
6002 static int
qla84xx_init_chip(scsi_qla_host_t * vha)6003 qla84xx_init_chip(scsi_qla_host_t *vha)
6004 {
6005 int rval;
6006 uint16_t status[2];
6007 struct qla_hw_data *ha = vha->hw;
6008
6009 mutex_lock(&ha->cs84xx->fw_update_mutex);
6010
6011 rval = qla84xx_verify_chip(vha, status);
6012
6013 mutex_unlock(&ha->cs84xx->fw_update_mutex);
6014
6015 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
6016 QLA_SUCCESS;
6017 }
6018
6019 /* 81XX Support **************************************************************/
6020
6021 int
qla81xx_nvram_config(scsi_qla_host_t * vha)6022 qla81xx_nvram_config(scsi_qla_host_t *vha)
6023 {
6024 int rval;
6025 struct init_cb_81xx *icb;
6026 struct nvram_81xx *nv;
6027 uint32_t *dptr;
6028 uint8_t *dptr1, *dptr2;
6029 uint32_t chksum;
6030 uint16_t cnt;
6031 struct qla_hw_data *ha = vha->hw;
6032
6033 rval = QLA_SUCCESS;
6034 icb = (struct init_cb_81xx *)ha->init_cb;
6035 nv = ha->nvram;
6036
6037 /* Determine NVRAM starting address. */
6038 ha->nvram_size = sizeof(struct nvram_81xx);
6039 ha->vpd_size = FA_NVRAM_VPD_SIZE;
6040 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
6041 ha->vpd_size = FA_VPD_SIZE_82XX;
6042
6043 /* Get VPD data into cache */
6044 ha->vpd = ha->nvram + VPD_OFFSET;
6045 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
6046 ha->vpd_size);
6047
6048 /* Get NVRAM data into cache and calculate checksum. */
6049 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
6050 ha->nvram_size);
6051 dptr = (uint32_t *)nv;
6052 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
6053 chksum += le32_to_cpu(*dptr++);
6054
6055 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
6056 "Contents of NVRAM:\n");
6057 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
6058 (uint8_t *)nv, ha->nvram_size);
6059
6060 /* Bad NVRAM data, set defaults parameters. */
6061 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
6062 || nv->id[3] != ' ' ||
6063 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
6064 /* Reset NVRAM data. */
6065 ql_log(ql_log_info, vha, 0x0073,
6066 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
6067 "version=0x%x.\n", chksum, nv->id[0],
6068 le16_to_cpu(nv->nvram_version));
6069 ql_log(ql_log_info, vha, 0x0074,
6070 "Falling back to functioning (yet invalid -- WWPN) "
6071 "defaults.\n");
6072
6073 /*
6074 * Set default initialization control block.
6075 */
6076 memset(nv, 0, ha->nvram_size);
6077 nv->nvram_version = cpu_to_le16(ICB_VERSION);
6078 nv->version = cpu_to_le16(ICB_VERSION);
6079 nv->frame_payload_size = 2048;
6080 nv->execution_throttle = cpu_to_le16(0xFFFF);
6081 nv->exchange_count = cpu_to_le16(0);
6082 nv->port_name[0] = 0x21;
6083 nv->port_name[1] = 0x00 + ha->port_no + 1;
6084 nv->port_name[2] = 0x00;
6085 nv->port_name[3] = 0xe0;
6086 nv->port_name[4] = 0x8b;
6087 nv->port_name[5] = 0x1c;
6088 nv->port_name[6] = 0x55;
6089 nv->port_name[7] = 0x86;
6090 nv->node_name[0] = 0x20;
6091 nv->node_name[1] = 0x00;
6092 nv->node_name[2] = 0x00;
6093 nv->node_name[3] = 0xe0;
6094 nv->node_name[4] = 0x8b;
6095 nv->node_name[5] = 0x1c;
6096 nv->node_name[6] = 0x55;
6097 nv->node_name[7] = 0x86;
6098 nv->login_retry_count = cpu_to_le16(8);
6099 nv->interrupt_delay_timer = cpu_to_le16(0);
6100 nv->login_timeout = cpu_to_le16(0);
6101 nv->firmware_options_1 =
6102 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
6103 nv->firmware_options_2 = cpu_to_le32(2 << 4);
6104 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
6105 nv->firmware_options_3 = cpu_to_le32(2 << 13);
6106 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
6107 nv->efi_parameters = cpu_to_le32(0);
6108 nv->reset_delay = 5;
6109 nv->max_luns_per_target = cpu_to_le16(128);
6110 nv->port_down_retry_count = cpu_to_le16(30);
6111 nv->link_down_timeout = cpu_to_le16(180);
6112 nv->enode_mac[0] = 0x00;
6113 nv->enode_mac[1] = 0xC0;
6114 nv->enode_mac[2] = 0xDD;
6115 nv->enode_mac[3] = 0x04;
6116 nv->enode_mac[4] = 0x05;
6117 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
6118
6119 rval = 1;
6120 }
6121
6122 if (IS_T10_PI_CAPABLE(ha))
6123 nv->frame_payload_size &= ~7;
6124
6125 qlt_81xx_config_nvram_stage1(vha, nv);
6126
6127 /* Reset Initialization control block */
6128 memset(icb, 0, ha->init_cb_size);
6129
6130 /* Copy 1st segment. */
6131 dptr1 = (uint8_t *)icb;
6132 dptr2 = (uint8_t *)&nv->version;
6133 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
6134 while (cnt--)
6135 *dptr1++ = *dptr2++;
6136
6137 icb->login_retry_count = nv->login_retry_count;
6138
6139 /* Copy 2nd segment. */
6140 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
6141 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
6142 cnt = (uint8_t *)&icb->reserved_5 -
6143 (uint8_t *)&icb->interrupt_delay_timer;
6144 while (cnt--)
6145 *dptr1++ = *dptr2++;
6146
6147 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
6148 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
6149 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
6150 icb->enode_mac[0] = 0x00;
6151 icb->enode_mac[1] = 0xC0;
6152 icb->enode_mac[2] = 0xDD;
6153 icb->enode_mac[3] = 0x04;
6154 icb->enode_mac[4] = 0x05;
6155 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
6156 }
6157
6158 /* Use extended-initialization control block. */
6159 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
6160
6161 /*
6162 * Setup driver NVRAM options.
6163 */
6164 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
6165 "QLE8XXX");
6166
6167 qlt_81xx_config_nvram_stage2(vha, icb);
6168
6169 /* Use alternate WWN? */
6170 if (nv->host_p & cpu_to_le32(BIT_15)) {
6171 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
6172 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
6173 }
6174
6175 /* Prepare nodename */
6176 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
6177 /*
6178 * Firmware will apply the following mask if the nodename was
6179 * not provided.
6180 */
6181 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
6182 icb->node_name[0] &= 0xF0;
6183 }
6184
6185 /* Set host adapter parameters. */
6186 ha->flags.disable_risc_code_load = 0;
6187 ha->flags.enable_lip_reset = 0;
6188 ha->flags.enable_lip_full_login =
6189 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
6190 ha->flags.enable_target_reset =
6191 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
6192 ha->flags.enable_led_scheme = 0;
6193 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
6194
6195 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
6196 (BIT_6 | BIT_5 | BIT_4)) >> 4;
6197
6198 /* save HBA serial number */
6199 ha->serial0 = icb->port_name[5];
6200 ha->serial1 = icb->port_name[6];
6201 ha->serial2 = icb->port_name[7];
6202 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
6203 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
6204
6205 icb->execution_throttle = cpu_to_le16(0xFFFF);
6206
6207 ha->retry_count = le16_to_cpu(nv->login_retry_count);
6208
6209 /* Set minimum login_timeout to 4 seconds. */
6210 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
6211 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
6212 if (le16_to_cpu(nv->login_timeout) < 4)
6213 nv->login_timeout = cpu_to_le16(4);
6214 ha->login_timeout = le16_to_cpu(nv->login_timeout);
6215 icb->login_timeout = nv->login_timeout;
6216
6217 /* Set minimum RATOV to 100 tenths of a second. */
6218 ha->r_a_tov = 100;
6219
6220 ha->loop_reset_delay = nv->reset_delay;
6221
6222 /* Link Down Timeout = 0:
6223 *
6224 * When Port Down timer expires we will start returning
6225 * I/O's to OS with "DID_NO_CONNECT".
6226 *
6227 * Link Down Timeout != 0:
6228 *
6229 * The driver waits for the link to come up after link down
6230 * before returning I/Os to OS with "DID_NO_CONNECT".
6231 */
6232 if (le16_to_cpu(nv->link_down_timeout) == 0) {
6233 ha->loop_down_abort_time =
6234 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
6235 } else {
6236 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
6237 ha->loop_down_abort_time =
6238 (LOOP_DOWN_TIME - ha->link_down_timeout);
6239 }
6240
6241 /* Need enough time to try and get the port back. */
6242 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
6243 if (qlport_down_retry)
6244 ha->port_down_retry_count = qlport_down_retry;
6245
6246 /* Set login_retry_count */
6247 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
6248 if (ha->port_down_retry_count ==
6249 le16_to_cpu(nv->port_down_retry_count) &&
6250 ha->port_down_retry_count > 3)
6251 ha->login_retry_count = ha->port_down_retry_count;
6252 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
6253 ha->login_retry_count = ha->port_down_retry_count;
6254 if (ql2xloginretrycount)
6255 ha->login_retry_count = ql2xloginretrycount;
6256
6257 /* if not running MSI-X we need handshaking on interrupts */
6258 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha)))
6259 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
6260
6261 /* Enable ZIO. */
6262 if (!vha->flags.init_done) {
6263 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
6264 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
6265 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
6266 le16_to_cpu(icb->interrupt_delay_timer): 2;
6267 }
6268 icb->firmware_options_2 &= cpu_to_le32(
6269 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
6270 vha->flags.process_response_queue = 0;
6271 if (ha->zio_mode != QLA_ZIO_DISABLED) {
6272 ha->zio_mode = QLA_ZIO_MODE_6;
6273
6274 ql_log(ql_log_info, vha, 0x0075,
6275 "ZIO mode %d enabled; timer delay (%d us).\n",
6276 ha->zio_mode,
6277 ha->zio_timer * 100);
6278
6279 icb->firmware_options_2 |= cpu_to_le32(
6280 (uint32_t)ha->zio_mode);
6281 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
6282 vha->flags.process_response_queue = 1;
6283 }
6284
6285 if (rval) {
6286 ql_log(ql_log_warn, vha, 0x0076,
6287 "NVRAM configuration failed.\n");
6288 }
6289 return (rval);
6290 }
6291
6292 int
qla82xx_restart_isp(scsi_qla_host_t * vha)6293 qla82xx_restart_isp(scsi_qla_host_t *vha)
6294 {
6295 int status, rval;
6296 struct qla_hw_data *ha = vha->hw;
6297 struct req_que *req = ha->req_q_map[0];
6298 struct rsp_que *rsp = ha->rsp_q_map[0];
6299 struct scsi_qla_host *vp;
6300 unsigned long flags;
6301
6302 status = qla2x00_init_rings(vha);
6303 if (!status) {
6304 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6305 ha->flags.chip_reset_done = 1;
6306
6307 status = qla2x00_fw_ready(vha);
6308 if (!status) {
6309 /* Issue a marker after FW becomes ready. */
6310 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
6311 vha->flags.online = 1;
6312 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6313 }
6314
6315 /* if no cable then assume it's good */
6316 if ((vha->device_flags & DFLG_NO_CABLE))
6317 status = 0;
6318 }
6319
6320 if (!status) {
6321 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6322
6323 if (!atomic_read(&vha->loop_down_timer)) {
6324 /*
6325 * Issue marker command only when we are going
6326 * to start the I/O .
6327 */
6328 vha->marker_needed = 1;
6329 }
6330
6331 ha->isp_ops->enable_intrs(ha);
6332
6333 ha->isp_abort_cnt = 0;
6334 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6335
6336 /* Update the firmware version */
6337 status = qla82xx_check_md_needed(vha);
6338
6339 if (ha->fce) {
6340 ha->flags.fce_enabled = 1;
6341 memset(ha->fce, 0,
6342 fce_calc_size(ha->fce_bufs));
6343 rval = qla2x00_enable_fce_trace(vha,
6344 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6345 &ha->fce_bufs);
6346 if (rval) {
6347 ql_log(ql_log_warn, vha, 0x8001,
6348 "Unable to reinitialize FCE (%d).\n",
6349 rval);
6350 ha->flags.fce_enabled = 0;
6351 }
6352 }
6353
6354 if (ha->eft) {
6355 memset(ha->eft, 0, EFT_SIZE);
6356 rval = qla2x00_enable_eft_trace(vha,
6357 ha->eft_dma, EFT_NUM_BUFFERS);
6358 if (rval) {
6359 ql_log(ql_log_warn, vha, 0x8010,
6360 "Unable to reinitialize EFT (%d).\n",
6361 rval);
6362 }
6363 }
6364 }
6365
6366 if (!status) {
6367 ql_dbg(ql_dbg_taskm, vha, 0x8011,
6368 "qla82xx_restart_isp succeeded.\n");
6369
6370 spin_lock_irqsave(&ha->vport_slock, flags);
6371 list_for_each_entry(vp, &ha->vp_list, list) {
6372 if (vp->vp_idx) {
6373 atomic_inc(&vp->vref_count);
6374 spin_unlock_irqrestore(&ha->vport_slock, flags);
6375
6376 qla2x00_vp_abort_isp(vp);
6377
6378 spin_lock_irqsave(&ha->vport_slock, flags);
6379 atomic_dec(&vp->vref_count);
6380 }
6381 }
6382 spin_unlock_irqrestore(&ha->vport_slock, flags);
6383
6384 } else {
6385 ql_log(ql_log_warn, vha, 0x8016,
6386 "qla82xx_restart_isp **** FAILED ****.\n");
6387 }
6388
6389 return status;
6390 }
6391
6392 void
qla81xx_update_fw_options(scsi_qla_host_t * vha)6393 qla81xx_update_fw_options(scsi_qla_host_t *vha)
6394 {
6395 struct qla_hw_data *ha = vha->hw;
6396
6397 if (!ql2xetsenable)
6398 return;
6399
6400 /* Enable ETS Burst. */
6401 memset(ha->fw_options, 0, sizeof(ha->fw_options));
6402 ha->fw_options[2] |= BIT_9;
6403 qla2x00_set_fw_options(vha, ha->fw_options);
6404 }
6405
6406 /*
6407 * qla24xx_get_fcp_prio
6408 * Gets the fcp cmd priority value for the logged in port.
6409 * Looks for a match of the port descriptors within
6410 * each of the fcp prio config entries. If a match is found,
6411 * the tag (priority) value is returned.
6412 *
6413 * Input:
6414 * vha = scsi host structure pointer.
6415 * fcport = port structure pointer.
6416 *
6417 * Return:
6418 * non-zero (if found)
6419 * -1 (if not found)
6420 *
6421 * Context:
6422 * Kernel context
6423 */
6424 static int
qla24xx_get_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)6425 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
6426 {
6427 int i, entries;
6428 uint8_t pid_match, wwn_match;
6429 int priority;
6430 uint32_t pid1, pid2;
6431 uint64_t wwn1, wwn2;
6432 struct qla_fcp_prio_entry *pri_entry;
6433 struct qla_hw_data *ha = vha->hw;
6434
6435 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
6436 return -1;
6437
6438 priority = -1;
6439 entries = ha->fcp_prio_cfg->num_entries;
6440 pri_entry = &ha->fcp_prio_cfg->entry[0];
6441
6442 for (i = 0; i < entries; i++) {
6443 pid_match = wwn_match = 0;
6444
6445 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
6446 pri_entry++;
6447 continue;
6448 }
6449
6450 /* check source pid for a match */
6451 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
6452 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
6453 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
6454 if (pid1 == INVALID_PORT_ID)
6455 pid_match++;
6456 else if (pid1 == pid2)
6457 pid_match++;
6458 }
6459
6460 /* check destination pid for a match */
6461 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
6462 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
6463 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
6464 if (pid1 == INVALID_PORT_ID)
6465 pid_match++;
6466 else if (pid1 == pid2)
6467 pid_match++;
6468 }
6469
6470 /* check source WWN for a match */
6471 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
6472 wwn1 = wwn_to_u64(vha->port_name);
6473 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
6474 if (wwn2 == (uint64_t)-1)
6475 wwn_match++;
6476 else if (wwn1 == wwn2)
6477 wwn_match++;
6478 }
6479
6480 /* check destination WWN for a match */
6481 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
6482 wwn1 = wwn_to_u64(fcport->port_name);
6483 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
6484 if (wwn2 == (uint64_t)-1)
6485 wwn_match++;
6486 else if (wwn1 == wwn2)
6487 wwn_match++;
6488 }
6489
6490 if (pid_match == 2 || wwn_match == 2) {
6491 /* Found a matching entry */
6492 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
6493 priority = pri_entry->tag;
6494 break;
6495 }
6496
6497 pri_entry++;
6498 }
6499
6500 return priority;
6501 }
6502
6503 /*
6504 * qla24xx_update_fcport_fcp_prio
6505 * Activates fcp priority for the logged in fc port
6506 *
6507 * Input:
6508 * vha = scsi host structure pointer.
6509 * fcp = port structure pointer.
6510 *
6511 * Return:
6512 * QLA_SUCCESS or QLA_FUNCTION_FAILED
6513 *
6514 * Context:
6515 * Kernel context.
6516 */
6517 int
qla24xx_update_fcport_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)6518 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
6519 {
6520 int ret;
6521 int priority;
6522 uint16_t mb[5];
6523
6524 if (fcport->port_type != FCT_TARGET ||
6525 fcport->loop_id == FC_NO_LOOP_ID)
6526 return QLA_FUNCTION_FAILED;
6527
6528 priority = qla24xx_get_fcp_prio(vha, fcport);
6529 if (priority < 0)
6530 return QLA_FUNCTION_FAILED;
6531
6532 if (IS_P3P_TYPE(vha->hw)) {
6533 fcport->fcp_prio = priority & 0xf;
6534 return QLA_SUCCESS;
6535 }
6536
6537 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
6538 if (ret == QLA_SUCCESS) {
6539 if (fcport->fcp_prio != priority)
6540 ql_dbg(ql_dbg_user, vha, 0x709e,
6541 "Updated FCP_CMND priority - value=%d loop_id=%d "
6542 "port_id=%02x%02x%02x.\n", priority,
6543 fcport->loop_id, fcport->d_id.b.domain,
6544 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6545 fcport->fcp_prio = priority & 0xf;
6546 } else
6547 ql_dbg(ql_dbg_user, vha, 0x704f,
6548 "Unable to update FCP_CMND priority - ret=0x%x for "
6549 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
6550 fcport->d_id.b.domain, fcport->d_id.b.area,
6551 fcport->d_id.b.al_pa);
6552 return ret;
6553 }
6554
6555 /*
6556 * qla24xx_update_all_fcp_prio
6557 * Activates fcp priority for all the logged in ports
6558 *
6559 * Input:
6560 * ha = adapter block pointer.
6561 *
6562 * Return:
6563 * QLA_SUCCESS or QLA_FUNCTION_FAILED
6564 *
6565 * Context:
6566 * Kernel context.
6567 */
6568 int
qla24xx_update_all_fcp_prio(scsi_qla_host_t * vha)6569 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
6570 {
6571 int ret;
6572 fc_port_t *fcport;
6573
6574 ret = QLA_FUNCTION_FAILED;
6575 /* We need to set priority for all logged in ports */
6576 list_for_each_entry(fcport, &vha->vp_fcports, list)
6577 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
6578
6579 return ret;
6580 }
6581