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/arch/powerpc/lib/
Dldstfp.S31 reg = 0 define
36 reg = reg + 1 define
47 reg = 1 define
51 reg = reg + 1 define
66 reg = 1 define
70 reg = reg + 1 define
194 reg = 1 define
198 reg = reg + 1 define
213 reg = 1 define
217 reg = reg + 1 define
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/arch/mips/include/asm/
Dasm-eva.h18 #define kernel_ll(reg, addr) "ll " reg ", " addr "\n" argument
19 #define kernel_sc(reg, addr) "sc " reg ", " addr "\n" argument
20 #define kernel_lw(reg, addr) "lw " reg ", " addr "\n" argument
21 #define kernel_lwl(reg, addr) "lwl " reg ", " addr "\n" argument
22 #define kernel_lwr(reg, addr) "lwr " reg ", " addr "\n" argument
23 #define kernel_lh(reg, addr) "lh " reg ", " addr "\n" argument
24 #define kernel_lb(reg, addr) "lb " reg ", " addr "\n" argument
25 #define kernel_lbu(reg, addr) "lbu " reg ", " addr "\n" argument
26 #define kernel_sw(reg, addr) "sw " reg ", " addr "\n" argument
27 #define kernel_swl(reg, addr) "swl " reg ", " addr "\n" argument
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/arch/m32r/kernel/
Dentry.S84 #define R4(reg) @reg argument
85 #define R5(reg) @(0x04,reg) argument
86 #define R6(reg) @(0x08,reg) argument
87 #define PTREGS(reg) @(0x0C,reg) argument
88 #define R0(reg) @(0x10,reg) argument
89 #define R1(reg) @(0x14,reg) argument
90 #define R2(reg) @(0x18,reg) argument
91 #define R3(reg) @(0x1C,reg) argument
92 #define R7(reg) @(0x20,reg) argument
93 #define R8(reg) @(0x24,reg) argument
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/arch/alpha/lib/
Dfpreg.c11 #define STT(reg,val) asm volatile ("ftoit $f"#reg",%0" : "=r"(val)); argument
13 #define STT(reg,val) asm volatile ("stt $f"#reg",%0" : "=m"(val)); argument
17 alpha_read_fp_reg (unsigned long reg) in alpha_read_fp_reg()
61 #define LDT(reg,val) asm volatile ("itoft %0,$f"#reg : : "r"(val)); argument
63 #define LDT(reg,val) asm volatile ("ldt $f"#reg",%0" : : "m"(val)); argument
67 alpha_write_fp_reg (unsigned long reg, unsigned long val) in alpha_write_fp_reg()
107 #define STS(reg,val) asm volatile ("ftois $f"#reg",%0" : "=r"(val)); argument
109 #define STS(reg,val) asm volatile ("sts $f"#reg",%0" : "=m"(val)); argument
113 alpha_read_fp_reg_s (unsigned long reg) in alpha_read_fp_reg_s()
157 #define LDS(reg,val) asm volatile ("itofs %0,$f"#reg : : "r"(val)); argument
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/arch/ia64/include/asm/native/
Dinst.h25 #define MOV_FROM_IFA(reg) \ argument
28 #define MOV_FROM_ITIR(reg) \ argument
31 #define MOV_FROM_ISR(reg) \ argument
34 #define MOV_FROM_IHA(reg) \ argument
37 #define MOV_FROM_IPSR(pred, reg) \ argument
40 #define MOV_FROM_IIM(reg) \ argument
43 #define MOV_FROM_IIP(reg) \ argument
46 #define MOV_FROM_IVR(reg, clob) \ argument
49 #define MOV_FROM_PSR(pred, reg, clob) \ argument
52 #define MOV_FROM_ITC(pred, pred_clob, reg, clob) \ argument
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/arch/mips/include/asm/octeon/
Dcvmx-fau.h129 static inline uint64_t __cvmx_fau_store_address(uint64_t noadd, uint64_t reg) in __cvmx_fau_store_address()
152 static inline uint64_t __cvmx_fau_atomic_address(uint64_t tagwait, uint64_t reg, in __cvmx_fau_atomic_address()
170 static inline int64_t cvmx_fau_fetch_and_add64(cvmx_fau_reg_64_t reg, in cvmx_fau_fetch_and_add64()
185 static inline int32_t cvmx_fau_fetch_and_add32(cvmx_fau_reg_32_t reg, in cvmx_fau_fetch_and_add32()
200 static inline int16_t cvmx_fau_fetch_and_add16(cvmx_fau_reg_16_t reg, in cvmx_fau_fetch_and_add16()
214 static inline int8_t cvmx_fau_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value) in cvmx_fau_fetch_and_add8()
233 cvmx_fau_tagwait_fetch_and_add64(cvmx_fau_reg_64_t reg, int64_t value) in cvmx_fau_tagwait_fetch_and_add64()
257 cvmx_fau_tagwait_fetch_and_add32(cvmx_fau_reg_32_t reg, int32_t value) in cvmx_fau_tagwait_fetch_and_add32()
281 cvmx_fau_tagwait_fetch_and_add16(cvmx_fau_reg_16_t reg, int16_t value) in cvmx_fau_tagwait_fetch_and_add16()
304 cvmx_fau_tagwait_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value) in cvmx_fau_tagwait_fetch_and_add8()
[all …]
/arch/x86/include/asm/
Dprocessor-cyrix.h20 static inline u8 getCx86(u8 reg) in getCx86()
26 static inline void setCx86(u8 reg, u8 data) in setCx86()
32 #define getCx86_old(reg) ({ outb((reg), 0x22); inb(0x23); }) argument
34 #define setCx86_old(reg, data) do { \ argument
Dmc146818rtc.h41 static inline void lock_cmos(unsigned char reg) in lock_cmos()
70 #define lock_cmos_prefix(reg) \ argument
76 #define lock_cmos_suffix(reg) \ argument
81 #define lock_cmos_prefix(reg) do {} while (0) argument
82 #define lock_cmos_suffix(reg) do {} while (0) argument
83 #define lock_cmos(reg) do { } while (0) argument
/arch/mips/include/asm/netlogic/
Dhaldefs.h46 nlm_read_reg(uint64_t base, uint32_t reg) in nlm_read_reg()
54 nlm_write_reg(uint64_t base, uint32_t reg, uint32_t val) in nlm_write_reg()
71 nlm_read_reg64(uint64_t base, uint32_t reg) in nlm_read_reg64()
98 nlm_write_reg64(uint64_t base, uint32_t reg, uint64_t val) in nlm_write_reg64()
129 nlm_read_reg_xkphys(uint64_t base, uint32_t reg) in nlm_read_reg_xkphys()
135 nlm_write_reg_xkphys(uint64_t base, uint32_t reg, uint32_t val) in nlm_write_reg_xkphys()
141 nlm_read_reg64_xkphys(uint64_t base, uint32_t reg) in nlm_read_reg64_xkphys()
147 nlm_write_reg64_xkphys(uint64_t base, uint32_t reg, uint64_t val) in nlm_write_reg64_xkphys()
/arch/arm/mach-cns3xxx/
Dpm.c20 u32 reg = __raw_readl(PM_CLK_GATE_REG); in cns3xxx_pwr_clk_en() local
29 u32 reg = __raw_readl(PM_CLK_GATE_REG); in cns3xxx_pwr_clk_dis() local
38 u32 reg = __raw_readl(PM_PLL_HM_PD_CTRL_REG); in cns3xxx_pwr_power_up() local
50 u32 reg = __raw_readl(PM_PLL_HM_PD_CTRL_REG); in cns3xxx_pwr_power_down() local
60 u32 reg = __raw_readl(PM_SOFT_RST_REG); in cns3xxx_pwr_soft_rst_force() local
108 u32 reg = __raw_readl(PM_CLK_CTRL_REG); in cns3xxx_cpu_clock() local
/arch/arm64/kernel/
Dentry-ftrace.S63 .macro mcount_get_parent_fp reg argument
69 .macro mcount_get_pc0 reg argument
73 .macro mcount_get_pc reg argument
78 .macro mcount_get_lr reg argument
83 .macro mcount_get_lr_addr reg argument
/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/
Diop_version_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/arch/cris/include/arch-v32/arch/hwregs/iop/
Diop_version_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/arch/frv/kernel/
Dasm-offsets.c17 #define DEF_PTREG(sym, reg) \ argument
21 #define DEF_IREG(sym, reg) \ argument
25 #define DEF_FREG(sym, reg) \ argument
29 #define DEF_0REG(sym, reg) \ argument
/arch/cris/include/arch-v32/arch/hwregs/
Dirq_nmi_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dstrcop_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/arch/x86/pci/
Dce4100.c47 int reg; member
68 static void reg_init(struct sim_dev_reg *reg) in reg_init()
74 static void reg_read(struct sim_dev_reg *reg, u32 *value) in reg_read()
83 static void reg_write(struct sim_dev_reg *reg, u32 value) in reg_write()
93 static void sata_reg_init(struct sim_dev_reg *reg) in sata_reg_init()
100 static void ehci_reg_read(struct sim_dev_reg *reg, u32 *value) in ehci_reg_read()
107 void sata_revid_init(struct sim_dev_reg *reg) in sata_revid_init()
113 static void sata_revid_read(struct sim_dev_reg *reg, u32 *value) in sata_revid_read()
118 static void reg_noirq_read(struct sim_dev_reg *reg, u32 *value) in reg_noirq_read()
191 static inline void extract_bytes(u32 *value, int reg, int len) in extract_bytes()
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/arch/arm/mach-omap2/
Dsdrc.h27 #define OMAP_SDRC_REGADDR(reg) (omap2_sdrc_base + (reg)) argument
28 #define OMAP_SMS_REGADDR(reg) (omap2_sms_base + (reg)) argument
32 static inline void sdrc_write_reg(u32 val, u16 reg) in sdrc_write_reg()
37 static inline u32 sdrc_read_reg(u16 reg) in sdrc_read_reg()
44 static inline void sms_write_reg(u32 val, u16 reg) in sms_write_reg()
49 static inline u32 sms_read_reg(u16 reg) in sms_read_reg()
108 #define OMAP242X_SDRC_REGADDR(reg) \ argument
110 #define OMAP243X_SDRC_REGADDR(reg) \ argument
112 #define OMAP34XX_SDRC_REGADDR(reg) \ argument
199 #define OMAP242X_SMS_REGADDR(reg) \ argument
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/arch/x86/lib/
Dretpoline.S11 .macro THUNK reg argument
29 #define EXPORT_THUNK(reg) __EXPORT_THUNK(__x86_indirect_thunk_ ## reg) argument
30 #define GENERATE_THUNK(reg) THUNK reg ; EXPORT_THUNK(reg) argument
/arch/mips/include/asm/mach-lantiq/
Dlantiq.h16 #define ltq_r32(reg) __raw_readl(reg) argument
17 #define ltq_w32(val, reg) __raw_writel(val, reg) argument
18 #define ltq_w32_mask(clear, set, reg) \ argument
20 #define ltq_r8(reg) __raw_readb(reg) argument
21 #define ltq_w8(val, reg) __raw_writeb(val, reg) argument
/arch/metag/include/asm/
Dcore_reg.h14 #define __core_reg_get(reg) ({ \ argument
21 #define __core_reg_set(reg, value) do { \ argument
28 #define __core_reg_swap(reg, value) do { \ argument
/arch/mips/pci/
Dops-sni.c24 static int set_config_address(unsigned int busno, unsigned int devfn, int reg) in set_config_address()
40 static int pcimt_read(struct pci_bus *bus, unsigned int devfn, int reg, in pcimt_read()
63 static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int reg, in pcimt_write()
91 static int pcit_set_config_address(unsigned int busno, unsigned int devfn, int reg) in pcit_set_config_address()
100 static int pcit_read(struct pci_bus *bus, unsigned int devfn, int reg, in pcit_read()
137 static int pcit_write(struct pci_bus *bus, unsigned int devfn, int reg, in pcit_write()
/arch/powerpc/kernel/
Dudbg_16550.c169 static u8 udbg_uart_in_pio(unsigned int reg) in udbg_uart_in_pio()
174 static void udbg_uart_out_pio(unsigned int reg, u8 data) in udbg_uart_out_pio()
190 static u8 udbg_uart_in_mmio(unsigned int reg) in udbg_uart_in_mmio()
195 static void udbg_uart_out_mmio(unsigned int reg, u8 data) in udbg_uart_out_mmio()
216 static u8 udbg_uart_in_maple(unsigned int reg) in udbg_uart_in_maple()
221 static void udbg_uart_out_maple(unsigned int reg, u8 val) in udbg_uart_out_maple()
239 static u8 udbg_uart_in_pas(unsigned int reg) in udbg_uart_in_pas()
244 static void udbg_uart_out_pas(unsigned int reg, u8 val) in udbg_uart_out_pas()
262 static u8 udbg_uart_in_44x_as1(unsigned int reg) in udbg_uart_in_44x_as1()
267 static void udbg_uart_out_44x_as1(unsigned int reg, u8 val) in udbg_uart_out_44x_as1()
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/arch/cris/include/uapi/arch-v10/arch/
Dsv_addr_ag.h28 #define IO_MASK(reg, field) IO_MASK_ (reg##_, field##_) argument
34 #define IO_STATE(reg, field, state) IO_STATE_ (reg##_, field##_, _##state) argument
40 #define IO_EXTRACT(reg, field, val) IO_EXTRACT_ (reg##_, field##_, val) argument
46 #define IO_STATE_VALUE(reg, field, state) \ argument
52 #define IO_FIELD(reg, field, val) IO_FIELD_ (reg##_, field##_, val) argument
57 #define IO_BITNR(reg, field) IO_BITNR_ (reg##_, field##_) argument
61 #define IO_WIDTH(reg, field) IO_WIDTH_ (reg##_, field##_) argument
67 #define IO_RD(reg) (*(volatile u32*)(reg)) argument
68 #define IO_RD_B(reg) (*(volatile u8*)(reg)) argument
69 #define IO_RD_W(reg) (*(volatile u16*)(reg)) argument
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/arch/sparc/include/asm/
Dbackoff.h48 #define BACKOFF_SETUP(reg) \ argument
54 #define BACKOFF_SPIN(reg, tmp, label) \ argument
76 #define BACKOFF_SETUP(reg) argument
81 #define BACKOFF_SPIN(reg, tmp, label) argument

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