1 /*
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2015 Intel Corporation.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * BSD LICENSE
20 *
21 * Copyright(c) 2015 Intel Corporation.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 *
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
32 * distribution.
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 *
49 */
50
51 #ifndef HFI1_VERBS_H
52 #define HFI1_VERBS_H
53
54 #include <linux/types.h>
55 #include <linux/seqlock.h>
56 #include <linux/kernel.h>
57 #include <linux/interrupt.h>
58 #include <linux/kref.h>
59 #include <linux/workqueue.h>
60 #include <linux/kthread.h>
61 #include <linux/completion.h>
62 #include <rdma/ib_pack.h>
63 #include <rdma/ib_user_verbs.h>
64 #include <rdma/ib_mad.h>
65
66 struct hfi1_ctxtdata;
67 struct hfi1_pportdata;
68 struct hfi1_devdata;
69 struct hfi1_packet;
70
71 #include "iowait.h"
72
73 #define HFI1_MAX_RDMA_ATOMIC 16
74 #define HFI1_GUIDS_PER_PORT 5
75
76 /*
77 * Increment this value if any changes that break userspace ABI
78 * compatibility are made.
79 */
80 #define HFI1_UVERBS_ABI_VERSION 2
81
82 /*
83 * Define an ib_cq_notify value that is not valid so we know when CQ
84 * notifications are armed.
85 */
86 #define IB_CQ_NONE (IB_CQ_NEXT_COMP + 1)
87
88 #define IB_SEQ_NAK (3 << 29)
89
90 /* AETH NAK opcode values */
91 #define IB_RNR_NAK 0x20
92 #define IB_NAK_PSN_ERROR 0x60
93 #define IB_NAK_INVALID_REQUEST 0x61
94 #define IB_NAK_REMOTE_ACCESS_ERROR 0x62
95 #define IB_NAK_REMOTE_OPERATIONAL_ERROR 0x63
96 #define IB_NAK_INVALID_RD_REQUEST 0x64
97
98 /* Flags for checking QP state (see ib_hfi1_state_ops[]) */
99 #define HFI1_POST_SEND_OK 0x01
100 #define HFI1_POST_RECV_OK 0x02
101 #define HFI1_PROCESS_RECV_OK 0x04
102 #define HFI1_PROCESS_SEND_OK 0x08
103 #define HFI1_PROCESS_NEXT_SEND_OK 0x10
104 #define HFI1_FLUSH_SEND 0x20
105 #define HFI1_FLUSH_RECV 0x40
106 #define HFI1_PROCESS_OR_FLUSH_SEND \
107 (HFI1_PROCESS_SEND_OK | HFI1_FLUSH_SEND)
108
109 /* IB Performance Manager status values */
110 #define IB_PMA_SAMPLE_STATUS_DONE 0x00
111 #define IB_PMA_SAMPLE_STATUS_STARTED 0x01
112 #define IB_PMA_SAMPLE_STATUS_RUNNING 0x02
113
114 /* Mandatory IB performance counter select values. */
115 #define IB_PMA_PORT_XMIT_DATA cpu_to_be16(0x0001)
116 #define IB_PMA_PORT_RCV_DATA cpu_to_be16(0x0002)
117 #define IB_PMA_PORT_XMIT_PKTS cpu_to_be16(0x0003)
118 #define IB_PMA_PORT_RCV_PKTS cpu_to_be16(0x0004)
119 #define IB_PMA_PORT_XMIT_WAIT cpu_to_be16(0x0005)
120
121 #define HFI1_VENDOR_IPG cpu_to_be16(0xFFA0)
122
123 #define IB_BTH_REQ_ACK (1 << 31)
124 #define IB_BTH_SOLICITED (1 << 23)
125 #define IB_BTH_MIG_REQ (1 << 22)
126
127 #define IB_GRH_VERSION 6
128 #define IB_GRH_VERSION_MASK 0xF
129 #define IB_GRH_VERSION_SHIFT 28
130 #define IB_GRH_TCLASS_MASK 0xFF
131 #define IB_GRH_TCLASS_SHIFT 20
132 #define IB_GRH_FLOW_MASK 0xFFFFF
133 #define IB_GRH_FLOW_SHIFT 0
134 #define IB_GRH_NEXT_HDR 0x1B
135
136 #define IB_DEFAULT_GID_PREFIX cpu_to_be64(0xfe80000000000000ULL)
137
138 /* flags passed by hfi1_ib_rcv() */
139 enum {
140 HFI1_HAS_GRH = (1 << 0),
141 };
142
143 struct ib_reth {
144 __be64 vaddr;
145 __be32 rkey;
146 __be32 length;
147 } __packed;
148
149 struct ib_atomic_eth {
150 __be32 vaddr[2]; /* unaligned so access as 2 32-bit words */
151 __be32 rkey;
152 __be64 swap_data;
153 __be64 compare_data;
154 } __packed;
155
156 union ib_ehdrs {
157 struct {
158 __be32 deth[2];
159 __be32 imm_data;
160 } ud;
161 struct {
162 struct ib_reth reth;
163 __be32 imm_data;
164 } rc;
165 struct {
166 __be32 aeth;
167 __be32 atomic_ack_eth[2];
168 } at;
169 __be32 imm_data;
170 __be32 aeth;
171 struct ib_atomic_eth atomic_eth;
172 } __packed;
173
174 struct hfi1_other_headers {
175 __be32 bth[3];
176 union ib_ehdrs u;
177 } __packed;
178
179 /*
180 * Note that UD packets with a GRH header are 8+40+12+8 = 68 bytes
181 * long (72 w/ imm_data). Only the first 56 bytes of the IB header
182 * will be in the eager header buffer. The remaining 12 or 16 bytes
183 * are in the data buffer.
184 */
185 struct hfi1_ib_header {
186 __be16 lrh[4];
187 union {
188 struct {
189 struct ib_grh grh;
190 struct hfi1_other_headers oth;
191 } l;
192 struct hfi1_other_headers oth;
193 } u;
194 } __packed;
195
196 struct ahg_ib_header {
197 struct sdma_engine *sde;
198 u32 ahgdesc[2];
199 u16 tx_flags;
200 u8 ahgcount;
201 u8 ahgidx;
202 struct hfi1_ib_header ibh;
203 };
204
205 struct hfi1_pio_header {
206 __le64 pbc;
207 struct hfi1_ib_header hdr;
208 } __packed;
209
210 /*
211 * used for force cacheline alignment for AHG
212 */
213 struct tx_pio_header {
214 struct hfi1_pio_header phdr;
215 } ____cacheline_aligned;
216
217 /*
218 * There is one struct hfi1_mcast for each multicast GID.
219 * All attached QPs are then stored as a list of
220 * struct hfi1_mcast_qp.
221 */
222 struct hfi1_mcast_qp {
223 struct list_head list;
224 struct hfi1_qp *qp;
225 };
226
227 struct hfi1_mcast {
228 struct rb_node rb_node;
229 union ib_gid mgid;
230 struct list_head qp_list;
231 wait_queue_head_t wait;
232 atomic_t refcount;
233 int n_attached;
234 };
235
236 /* Protection domain */
237 struct hfi1_pd {
238 struct ib_pd ibpd;
239 int user; /* non-zero if created from user space */
240 };
241
242 /* Address Handle */
243 struct hfi1_ah {
244 struct ib_ah ibah;
245 struct ib_ah_attr attr;
246 atomic_t refcount;
247 };
248
249 /*
250 * This structure is used by hfi1_mmap() to validate an offset
251 * when an mmap() request is made. The vm_area_struct then uses
252 * this as its vm_private_data.
253 */
254 struct hfi1_mmap_info {
255 struct list_head pending_mmaps;
256 struct ib_ucontext *context;
257 void *obj;
258 __u64 offset;
259 struct kref ref;
260 unsigned size;
261 };
262
263 /*
264 * This structure is used to contain the head pointer, tail pointer,
265 * and completion queue entries as a single memory allocation so
266 * it can be mmap'ed into user space.
267 */
268 struct hfi1_cq_wc {
269 u32 head; /* index of next entry to fill */
270 u32 tail; /* index of next ib_poll_cq() entry */
271 union {
272 /* these are actually size ibcq.cqe + 1 */
273 struct ib_uverbs_wc uqueue[0];
274 struct ib_wc kqueue[0];
275 };
276 };
277
278 /*
279 * The completion queue structure.
280 */
281 struct hfi1_cq {
282 struct ib_cq ibcq;
283 struct kthread_work comptask;
284 struct hfi1_devdata *dd;
285 spinlock_t lock; /* protect changes in this struct */
286 u8 notify;
287 u8 triggered;
288 struct hfi1_cq_wc *queue;
289 struct hfi1_mmap_info *ip;
290 };
291
292 /*
293 * A segment is a linear region of low physical memory.
294 * Used by the verbs layer.
295 */
296 struct hfi1_seg {
297 void *vaddr;
298 size_t length;
299 };
300
301 /* The number of hfi1_segs that fit in a page. */
302 #define HFI1_SEGSZ (PAGE_SIZE / sizeof(struct hfi1_seg))
303
304 struct hfi1_segarray {
305 struct hfi1_seg segs[HFI1_SEGSZ];
306 };
307
308 struct hfi1_mregion {
309 struct ib_pd *pd; /* shares refcnt of ibmr.pd */
310 u64 user_base; /* User's address for this region */
311 u64 iova; /* IB start address of this region */
312 size_t length;
313 u32 lkey;
314 u32 offset; /* offset (bytes) to start of region */
315 int access_flags;
316 u32 max_segs; /* number of hfi1_segs in all the arrays */
317 u32 mapsz; /* size of the map array */
318 u8 page_shift; /* 0 - non unform/non powerof2 sizes */
319 u8 lkey_published; /* in global table */
320 struct completion comp; /* complete when refcount goes to zero */
321 atomic_t refcount;
322 struct hfi1_segarray *map[0]; /* the segments */
323 };
324
325 /*
326 * These keep track of the copy progress within a memory region.
327 * Used by the verbs layer.
328 */
329 struct hfi1_sge {
330 struct hfi1_mregion *mr;
331 void *vaddr; /* kernel virtual address of segment */
332 u32 sge_length; /* length of the SGE */
333 u32 length; /* remaining length of the segment */
334 u16 m; /* current index: mr->map[m] */
335 u16 n; /* current index: mr->map[m]->segs[n] */
336 };
337
338 /* Memory region */
339 struct hfi1_mr {
340 struct ib_mr ibmr;
341 struct ib_umem *umem;
342 struct hfi1_mregion mr; /* must be last */
343 };
344
345 /*
346 * Send work request queue entry.
347 * The size of the sg_list is determined when the QP is created and stored
348 * in qp->s_max_sge.
349 */
350 struct hfi1_swqe {
351 union {
352 struct ib_send_wr wr; /* don't use wr.sg_list */
353 struct ib_rdma_wr rdma_wr;
354 struct ib_atomic_wr atomic_wr;
355 struct ib_ud_wr ud_wr;
356 };
357 u32 psn; /* first packet sequence number */
358 u32 lpsn; /* last packet sequence number */
359 u32 ssn; /* send sequence number */
360 u32 length; /* total length of data in sg_list */
361 struct hfi1_sge sg_list[0];
362 };
363
364 /*
365 * Receive work request queue entry.
366 * The size of the sg_list is determined when the QP (or SRQ) is created
367 * and stored in qp->r_rq.max_sge (or srq->rq.max_sge).
368 */
369 struct hfi1_rwqe {
370 u64 wr_id;
371 u8 num_sge;
372 struct ib_sge sg_list[0];
373 };
374
375 /*
376 * This structure is used to contain the head pointer, tail pointer,
377 * and receive work queue entries as a single memory allocation so
378 * it can be mmap'ed into user space.
379 * Note that the wq array elements are variable size so you can't
380 * just index into the array to get the N'th element;
381 * use get_rwqe_ptr() instead.
382 */
383 struct hfi1_rwq {
384 u32 head; /* new work requests posted to the head */
385 u32 tail; /* receives pull requests from here. */
386 struct hfi1_rwqe wq[0];
387 };
388
389 struct hfi1_rq {
390 struct hfi1_rwq *wq;
391 u32 size; /* size of RWQE array */
392 u8 max_sge;
393 /* protect changes in this struct */
394 spinlock_t lock ____cacheline_aligned_in_smp;
395 };
396
397 struct hfi1_srq {
398 struct ib_srq ibsrq;
399 struct hfi1_rq rq;
400 struct hfi1_mmap_info *ip;
401 /* send signal when number of RWQEs < limit */
402 u32 limit;
403 };
404
405 struct hfi1_sge_state {
406 struct hfi1_sge *sg_list; /* next SGE to be used if any */
407 struct hfi1_sge sge; /* progress state for the current SGE */
408 u32 total_len;
409 u8 num_sge;
410 };
411
412 /*
413 * This structure holds the information that the send tasklet needs
414 * to send a RDMA read response or atomic operation.
415 */
416 struct hfi1_ack_entry {
417 u8 opcode;
418 u8 sent;
419 u32 psn;
420 u32 lpsn;
421 union {
422 struct hfi1_sge rdma_sge;
423 u64 atomic_data;
424 };
425 };
426
427 /*
428 * Variables prefixed with s_ are for the requester (sender).
429 * Variables prefixed with r_ are for the responder (receiver).
430 * Variables prefixed with ack_ are for responder replies.
431 *
432 * Common variables are protected by both r_rq.lock and s_lock in that order
433 * which only happens in modify_qp() or changing the QP 'state'.
434 */
435 struct hfi1_qp {
436 struct ib_qp ibqp;
437 /* read mostly fields above and below */
438 struct ib_ah_attr remote_ah_attr;
439 struct ib_ah_attr alt_ah_attr;
440 struct hfi1_qp __rcu *next; /* link list for QPN hash table */
441 struct hfi1_swqe *s_wq; /* send work queue */
442 struct hfi1_mmap_info *ip;
443 struct ahg_ib_header *s_hdr; /* next packet header to send */
444 u8 s_sc; /* SC[0..4] for next packet */
445 unsigned long timeout_jiffies; /* computed from timeout */
446
447 enum ib_mtu path_mtu;
448 int srate_mbps; /* s_srate (below) converted to Mbit/s */
449 u32 remote_qpn;
450 u32 pmtu; /* decoded from path_mtu */
451 u32 qkey; /* QKEY for this QP (for UD or RD) */
452 u32 s_size; /* send work queue size */
453 u32 s_rnr_timeout; /* number of milliseconds for RNR timeout */
454 u32 s_ahgpsn; /* set to the psn in the copy of the header */
455
456 u8 state; /* QP state */
457 u8 allowed_ops; /* high order bits of allowed opcodes */
458 u8 qp_access_flags;
459 u8 alt_timeout; /* Alternate path timeout for this QP */
460 u8 timeout; /* Timeout for this QP */
461 u8 s_srate;
462 u8 s_mig_state;
463 u8 port_num;
464 u8 s_pkey_index; /* PKEY index to use */
465 u8 s_alt_pkey_index; /* Alternate path PKEY index to use */
466 u8 r_max_rd_atomic; /* max number of RDMA read/atomic to receive */
467 u8 s_max_rd_atomic; /* max number of RDMA read/atomic to send */
468 u8 s_retry_cnt; /* number of times to retry */
469 u8 s_rnr_retry_cnt;
470 u8 r_min_rnr_timer; /* retry timeout value for RNR NAKs */
471 u8 s_max_sge; /* size of s_wq->sg_list */
472 u8 s_draining;
473
474 /* start of read/write fields */
475 atomic_t refcount ____cacheline_aligned_in_smp;
476 wait_queue_head_t wait;
477
478
479 struct hfi1_ack_entry s_ack_queue[HFI1_MAX_RDMA_ATOMIC + 1]
480 ____cacheline_aligned_in_smp;
481 struct hfi1_sge_state s_rdma_read_sge;
482
483 spinlock_t r_lock ____cacheline_aligned_in_smp; /* used for APM */
484 unsigned long r_aflags;
485 u64 r_wr_id; /* ID for current receive WQE */
486 u32 r_ack_psn; /* PSN for next ACK or atomic ACK */
487 u32 r_len; /* total length of r_sge */
488 u32 r_rcv_len; /* receive data len processed */
489 u32 r_psn; /* expected rcv packet sequence number */
490 u32 r_msn; /* message sequence number */
491
492 u8 r_state; /* opcode of last packet received */
493 u8 r_flags;
494 u8 r_head_ack_queue; /* index into s_ack_queue[] */
495
496 struct list_head rspwait; /* link for waiting to respond */
497
498 struct hfi1_sge_state r_sge; /* current receive data */
499 struct hfi1_rq r_rq; /* receive work queue */
500
501 spinlock_t s_lock ____cacheline_aligned_in_smp;
502 struct hfi1_sge_state *s_cur_sge;
503 u32 s_flags;
504 struct hfi1_swqe *s_wqe;
505 struct hfi1_sge_state s_sge; /* current send request data */
506 struct hfi1_mregion *s_rdma_mr;
507 struct sdma_engine *s_sde; /* current sde */
508 u32 s_cur_size; /* size of send packet in bytes */
509 u32 s_len; /* total length of s_sge */
510 u32 s_rdma_read_len; /* total length of s_rdma_read_sge */
511 u32 s_next_psn; /* PSN for next request */
512 u32 s_last_psn; /* last response PSN processed */
513 u32 s_sending_psn; /* lowest PSN that is being sent */
514 u32 s_sending_hpsn; /* highest PSN that is being sent */
515 u32 s_psn; /* current packet sequence number */
516 u32 s_ack_rdma_psn; /* PSN for sending RDMA read responses */
517 u32 s_ack_psn; /* PSN for acking sends and RDMA writes */
518 u32 s_head; /* new entries added here */
519 u32 s_tail; /* next entry to process */
520 u32 s_cur; /* current work queue entry */
521 u32 s_acked; /* last un-ACK'ed entry */
522 u32 s_last; /* last completed entry */
523 u32 s_ssn; /* SSN of tail entry */
524 u32 s_lsn; /* limit sequence number (credit) */
525 u16 s_hdrwords; /* size of s_hdr in 32 bit words */
526 u16 s_rdma_ack_cnt;
527 s8 s_ahgidx;
528 u8 s_state; /* opcode of last packet sent */
529 u8 s_ack_state; /* opcode of packet to ACK */
530 u8 s_nak_state; /* non-zero if NAK is pending */
531 u8 r_nak_state; /* non-zero if NAK is pending */
532 u8 s_retry; /* requester retry counter */
533 u8 s_rnr_retry; /* requester RNR retry counter */
534 u8 s_num_rd_atomic; /* number of RDMA read/atomic pending */
535 u8 s_tail_ack_queue; /* index into s_ack_queue[] */
536
537 struct hfi1_sge_state s_ack_rdma_sge;
538 struct timer_list s_timer;
539
540 struct iowait s_iowait;
541
542 struct hfi1_sge r_sg_list[0] /* verified SGEs */
543 ____cacheline_aligned_in_smp;
544 };
545
546 /*
547 * Atomic bit definitions for r_aflags.
548 */
549 #define HFI1_R_WRID_VALID 0
550 #define HFI1_R_REWIND_SGE 1
551
552 /*
553 * Bit definitions for r_flags.
554 */
555 #define HFI1_R_REUSE_SGE 0x01
556 #define HFI1_R_RDMAR_SEQ 0x02
557 #define HFI1_R_RSP_NAK 0x04
558 #define HFI1_R_RSP_SEND 0x08
559 #define HFI1_R_COMM_EST 0x10
560
561 /*
562 * Bit definitions for s_flags.
563 *
564 * HFI1_S_SIGNAL_REQ_WR - set if QP send WRs contain completion signaled
565 * HFI1_S_BUSY - send tasklet is processing the QP
566 * HFI1_S_TIMER - the RC retry timer is active
567 * HFI1_S_ACK_PENDING - an ACK is waiting to be sent after RDMA read/atomics
568 * HFI1_S_WAIT_FENCE - waiting for all prior RDMA read or atomic SWQEs
569 * before processing the next SWQE
570 * HFI1_S_WAIT_RDMAR - waiting for a RDMA read or atomic SWQE to complete
571 * before processing the next SWQE
572 * HFI1_S_WAIT_RNR - waiting for RNR timeout
573 * HFI1_S_WAIT_SSN_CREDIT - waiting for RC credits to process next SWQE
574 * HFI1_S_WAIT_DMA - waiting for send DMA queue to drain before generating
575 * next send completion entry not via send DMA
576 * HFI1_S_WAIT_PIO - waiting for a send buffer to be available
577 * HFI1_S_WAIT_TX - waiting for a struct verbs_txreq to be available
578 * HFI1_S_WAIT_DMA_DESC - waiting for DMA descriptors to be available
579 * HFI1_S_WAIT_KMEM - waiting for kernel memory to be available
580 * HFI1_S_WAIT_PSN - waiting for a packet to exit the send DMA queue
581 * HFI1_S_WAIT_ACK - waiting for an ACK packet before sending more requests
582 * HFI1_S_SEND_ONE - send one packet, request ACK, then wait for ACK
583 * HFI1_S_ECN - a BECN was queued to the send engine
584 */
585 #define HFI1_S_SIGNAL_REQ_WR 0x0001
586 #define HFI1_S_BUSY 0x0002
587 #define HFI1_S_TIMER 0x0004
588 #define HFI1_S_RESP_PENDING 0x0008
589 #define HFI1_S_ACK_PENDING 0x0010
590 #define HFI1_S_WAIT_FENCE 0x0020
591 #define HFI1_S_WAIT_RDMAR 0x0040
592 #define HFI1_S_WAIT_RNR 0x0080
593 #define HFI1_S_WAIT_SSN_CREDIT 0x0100
594 #define HFI1_S_WAIT_DMA 0x0200
595 #define HFI1_S_WAIT_PIO 0x0400
596 #define HFI1_S_WAIT_TX 0x0800
597 #define HFI1_S_WAIT_DMA_DESC 0x1000
598 #define HFI1_S_WAIT_KMEM 0x2000
599 #define HFI1_S_WAIT_PSN 0x4000
600 #define HFI1_S_WAIT_ACK 0x8000
601 #define HFI1_S_SEND_ONE 0x10000
602 #define HFI1_S_UNLIMITED_CREDIT 0x20000
603 #define HFI1_S_AHG_VALID 0x40000
604 #define HFI1_S_AHG_CLEAR 0x80000
605 #define HFI1_S_ECN 0x100000
606
607 /*
608 * Wait flags that would prevent any packet type from being sent.
609 */
610 #define HFI1_S_ANY_WAIT_IO (HFI1_S_WAIT_PIO | HFI1_S_WAIT_TX | \
611 HFI1_S_WAIT_DMA_DESC | HFI1_S_WAIT_KMEM)
612
613 /*
614 * Wait flags that would prevent send work requests from making progress.
615 */
616 #define HFI1_S_ANY_WAIT_SEND (HFI1_S_WAIT_FENCE | HFI1_S_WAIT_RDMAR | \
617 HFI1_S_WAIT_RNR | HFI1_S_WAIT_SSN_CREDIT | HFI1_S_WAIT_DMA | \
618 HFI1_S_WAIT_PSN | HFI1_S_WAIT_ACK)
619
620 #define HFI1_S_ANY_WAIT (HFI1_S_ANY_WAIT_IO | HFI1_S_ANY_WAIT_SEND)
621
622 #define HFI1_PSN_CREDIT 16
623
624 /*
625 * Since struct hfi1_swqe is not a fixed size, we can't simply index into
626 * struct hfi1_qp.s_wq. This function does the array index computation.
627 */
get_swqe_ptr(struct hfi1_qp * qp,unsigned n)628 static inline struct hfi1_swqe *get_swqe_ptr(struct hfi1_qp *qp,
629 unsigned n)
630 {
631 return (struct hfi1_swqe *)((char *)qp->s_wq +
632 (sizeof(struct hfi1_swqe) +
633 qp->s_max_sge *
634 sizeof(struct hfi1_sge)) * n);
635 }
636
637 /*
638 * Since struct hfi1_rwqe is not a fixed size, we can't simply index into
639 * struct hfi1_rwq.wq. This function does the array index computation.
640 */
get_rwqe_ptr(struct hfi1_rq * rq,unsigned n)641 static inline struct hfi1_rwqe *get_rwqe_ptr(struct hfi1_rq *rq, unsigned n)
642 {
643 return (struct hfi1_rwqe *)
644 ((char *) rq->wq->wq +
645 (sizeof(struct hfi1_rwqe) +
646 rq->max_sge * sizeof(struct ib_sge)) * n);
647 }
648
649 #define MAX_LKEY_TABLE_BITS 23
650
651 struct hfi1_lkey_table {
652 spinlock_t lock; /* protect changes in this struct */
653 u32 next; /* next unused index (speeds search) */
654 u32 gen; /* generation count */
655 u32 max; /* size of the table */
656 struct hfi1_mregion __rcu **table;
657 };
658
659 struct hfi1_opcode_stats {
660 u64 n_packets; /* number of packets */
661 u64 n_bytes; /* total number of bytes */
662 };
663
664 struct hfi1_opcode_stats_perctx {
665 struct hfi1_opcode_stats stats[256];
666 };
667
inc_opstats(u32 tlen,struct hfi1_opcode_stats * stats)668 static inline void inc_opstats(
669 u32 tlen,
670 struct hfi1_opcode_stats *stats)
671 {
672 #ifdef CONFIG_DEBUG_FS
673 stats->n_bytes += tlen;
674 stats->n_packets++;
675 #endif
676 }
677
678 struct hfi1_ibport {
679 struct hfi1_qp __rcu *qp[2];
680 struct ib_mad_agent *send_agent; /* agent for SMI (traps) */
681 struct hfi1_ah *sm_ah;
682 struct hfi1_ah *smi_ah;
683 struct rb_root mcast_tree;
684 spinlock_t lock; /* protect changes in this struct */
685
686 /* non-zero when timer is set */
687 unsigned long mkey_lease_timeout;
688 unsigned long trap_timeout;
689 __be64 gid_prefix; /* in network order */
690 __be64 mkey;
691 __be64 guids[HFI1_GUIDS_PER_PORT - 1]; /* writable GUIDs */
692 u64 tid; /* TID for traps */
693 u64 n_rc_resends;
694 u64 n_seq_naks;
695 u64 n_rdma_seq;
696 u64 n_rnr_naks;
697 u64 n_other_naks;
698 u64 n_loop_pkts;
699 u64 n_pkt_drops;
700 u64 n_vl15_dropped;
701 u64 n_rc_timeouts;
702 u64 n_dmawait;
703 u64 n_unaligned;
704 u64 n_rc_dupreq;
705 u64 n_rc_seqnak;
706
707 /* Hot-path per CPU counters to avoid cacheline trading to update */
708 u64 z_rc_acks;
709 u64 z_rc_qacks;
710 u64 z_rc_delayed_comp;
711 u64 __percpu *rc_acks;
712 u64 __percpu *rc_qacks;
713 u64 __percpu *rc_delayed_comp;
714
715 u32 port_cap_flags;
716 u32 pma_sample_start;
717 u32 pma_sample_interval;
718 __be16 pma_counter_select[5];
719 u16 pma_tag;
720 u16 pkey_violations;
721 u16 qkey_violations;
722 u16 mkey_violations;
723 u16 mkey_lease_period;
724 u16 sm_lid;
725 u16 repress_traps;
726 u8 sm_sl;
727 u8 mkeyprot;
728 u8 subnet_timeout;
729 u8 vl_high_limit;
730 /* the first 16 entries are sl_to_vl for !OPA */
731 u8 sl_to_sc[32];
732 u8 sc_to_sl[32];
733 };
734
735
736 struct hfi1_qp_ibdev;
737 struct hfi1_ibdev {
738 struct ib_device ibdev;
739 struct list_head pending_mmaps;
740 spinlock_t mmap_offset_lock; /* protect mmap_offset */
741 u32 mmap_offset;
742 struct hfi1_mregion __rcu *dma_mr;
743
744 struct hfi1_qp_ibdev *qp_dev;
745
746 /* QP numbers are shared by all IB ports */
747 struct hfi1_lkey_table lk_table;
748 /* protect wait lists */
749 seqlock_t iowait_lock;
750 struct list_head txwait; /* list for wait verbs_txreq */
751 struct list_head memwait; /* list for wait kernel memory */
752 struct list_head txreq_free;
753 struct kmem_cache *verbs_txreq_cache;
754 struct timer_list mem_timer;
755
756 /* other waiters */
757 spinlock_t pending_lock;
758
759 u64 n_piowait;
760 u64 n_txwait;
761 u64 n_kmem_wait;
762 u64 n_send_schedule;
763
764 u32 n_pds_allocated; /* number of PDs allocated for device */
765 spinlock_t n_pds_lock;
766 u32 n_ahs_allocated; /* number of AHs allocated for device */
767 spinlock_t n_ahs_lock;
768 u32 n_cqs_allocated; /* number of CQs allocated for device */
769 spinlock_t n_cqs_lock;
770 u32 n_qps_allocated; /* number of QPs allocated for device */
771 spinlock_t n_qps_lock;
772 u32 n_srqs_allocated; /* number of SRQs allocated for device */
773 spinlock_t n_srqs_lock;
774 u32 n_mcast_grps_allocated; /* number of mcast groups allocated */
775 spinlock_t n_mcast_grps_lock;
776 #ifdef CONFIG_DEBUG_FS
777 /* per HFI debugfs */
778 struct dentry *hfi1_ibdev_dbg;
779 /* per HFI symlinks to above */
780 struct dentry *hfi1_ibdev_link;
781 #endif
782 };
783
784 struct hfi1_verbs_counters {
785 u64 symbol_error_counter;
786 u64 link_error_recovery_counter;
787 u64 link_downed_counter;
788 u64 port_rcv_errors;
789 u64 port_rcv_remphys_errors;
790 u64 port_xmit_discards;
791 u64 port_xmit_data;
792 u64 port_rcv_data;
793 u64 port_xmit_packets;
794 u64 port_rcv_packets;
795 u32 local_link_integrity_errors;
796 u32 excessive_buffer_overrun_errors;
797 u32 vl15_dropped;
798 };
799
to_imr(struct ib_mr * ibmr)800 static inline struct hfi1_mr *to_imr(struct ib_mr *ibmr)
801 {
802 return container_of(ibmr, struct hfi1_mr, ibmr);
803 }
804
to_ipd(struct ib_pd * ibpd)805 static inline struct hfi1_pd *to_ipd(struct ib_pd *ibpd)
806 {
807 return container_of(ibpd, struct hfi1_pd, ibpd);
808 }
809
to_iah(struct ib_ah * ibah)810 static inline struct hfi1_ah *to_iah(struct ib_ah *ibah)
811 {
812 return container_of(ibah, struct hfi1_ah, ibah);
813 }
814
to_icq(struct ib_cq * ibcq)815 static inline struct hfi1_cq *to_icq(struct ib_cq *ibcq)
816 {
817 return container_of(ibcq, struct hfi1_cq, ibcq);
818 }
819
to_isrq(struct ib_srq * ibsrq)820 static inline struct hfi1_srq *to_isrq(struct ib_srq *ibsrq)
821 {
822 return container_of(ibsrq, struct hfi1_srq, ibsrq);
823 }
824
to_iqp(struct ib_qp * ibqp)825 static inline struct hfi1_qp *to_iqp(struct ib_qp *ibqp)
826 {
827 return container_of(ibqp, struct hfi1_qp, ibqp);
828 }
829
to_idev(struct ib_device * ibdev)830 static inline struct hfi1_ibdev *to_idev(struct ib_device *ibdev)
831 {
832 return container_of(ibdev, struct hfi1_ibdev, ibdev);
833 }
834
835 /*
836 * Send if not busy or waiting for I/O and either
837 * a RC response is pending or we can process send work requests.
838 */
hfi1_send_ok(struct hfi1_qp * qp)839 static inline int hfi1_send_ok(struct hfi1_qp *qp)
840 {
841 return !(qp->s_flags & (HFI1_S_BUSY | HFI1_S_ANY_WAIT_IO)) &&
842 (qp->s_hdrwords || (qp->s_flags & HFI1_S_RESP_PENDING) ||
843 !(qp->s_flags & HFI1_S_ANY_WAIT_SEND));
844 }
845
846 /*
847 * This must be called with s_lock held.
848 */
849 void hfi1_schedule_send(struct hfi1_qp *qp);
850 void hfi1_bad_pqkey(struct hfi1_ibport *ibp, __be16 trap_num, u32 key, u32 sl,
851 u32 qp1, u32 qp2, __be16 lid1, __be16 lid2);
852 void hfi1_cap_mask_chg(struct hfi1_ibport *ibp);
853 void hfi1_sys_guid_chg(struct hfi1_ibport *ibp);
854 void hfi1_node_desc_chg(struct hfi1_ibport *ibp);
855 int hfi1_process_mad(struct ib_device *ibdev, int mad_flags, u8 port,
856 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
857 const struct ib_mad_hdr *in_mad, size_t in_mad_size,
858 struct ib_mad_hdr *out_mad, size_t *out_mad_size,
859 u16 *out_mad_pkey_index);
860 int hfi1_create_agents(struct hfi1_ibdev *dev);
861 void hfi1_free_agents(struct hfi1_ibdev *dev);
862
863 /*
864 * The PSN_MASK and PSN_SHIFT allow for
865 * 1) comparing two PSNs
866 * 2) returning the PSN with any upper bits masked
867 * 3) returning the difference between to PSNs
868 *
869 * The number of significant bits in the PSN must
870 * necessarily be at least one bit less than
871 * the container holding the PSN.
872 */
873 #ifndef CONFIG_HFI1_VERBS_31BIT_PSN
874 #define PSN_MASK 0xFFFFFF
875 #define PSN_SHIFT 8
876 #else
877 #define PSN_MASK 0x7FFFFFFF
878 #define PSN_SHIFT 1
879 #endif
880 #define PSN_MODIFY_MASK 0xFFFFFF
881
882 /* Number of bits to pay attention to in the opcode for checking qp type */
883 #define OPCODE_QP_MASK 0xE0
884
885 /*
886 * Compare the lower 24 bits of the msn values.
887 * Returns an integer <, ==, or > than zero.
888 */
cmp_msn(u32 a,u32 b)889 static inline int cmp_msn(u32 a, u32 b)
890 {
891 return (((int) a) - ((int) b)) << 8;
892 }
893
894 /*
895 * Compare two PSNs
896 * Returns an integer <, ==, or > than zero.
897 */
cmp_psn(u32 a,u32 b)898 static inline int cmp_psn(u32 a, u32 b)
899 {
900 return (((int) a) - ((int) b)) << PSN_SHIFT;
901 }
902
903 /*
904 * Return masked PSN
905 */
mask_psn(u32 a)906 static inline u32 mask_psn(u32 a)
907 {
908 return a & PSN_MASK;
909 }
910
911 /*
912 * Return delta between two PSNs
913 */
delta_psn(u32 a,u32 b)914 static inline u32 delta_psn(u32 a, u32 b)
915 {
916 return (((int)a - (int)b) << PSN_SHIFT) >> PSN_SHIFT;
917 }
918
919 struct hfi1_mcast *hfi1_mcast_find(struct hfi1_ibport *ibp, union ib_gid *mgid);
920
921 int hfi1_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
922
923 int hfi1_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
924
925 int hfi1_mcast_tree_empty(struct hfi1_ibport *ibp);
926
927 struct verbs_txreq;
928 void hfi1_put_txreq(struct verbs_txreq *tx);
929
930 int hfi1_verbs_send(struct hfi1_qp *qp, struct ahg_ib_header *ahdr,
931 u32 hdrwords, struct hfi1_sge_state *ss, u32 len);
932
933 void hfi1_copy_sge(struct hfi1_sge_state *ss, void *data, u32 length,
934 int release);
935
936 void hfi1_skip_sge(struct hfi1_sge_state *ss, u32 length, int release);
937
938 void hfi1_cnp_rcv(struct hfi1_packet *packet);
939
940 void hfi1_uc_rcv(struct hfi1_packet *packet);
941
942 void hfi1_rc_rcv(struct hfi1_packet *packet);
943
944 void hfi1_rc_hdrerr(
945 struct hfi1_ctxtdata *rcd,
946 struct hfi1_ib_header *hdr,
947 u32 rcv_flags,
948 struct hfi1_qp *qp);
949
950 u8 ah_to_sc(struct ib_device *ibdev, struct ib_ah_attr *ah_attr);
951
952 int hfi1_check_ah(struct ib_device *ibdev, struct ib_ah_attr *ah_attr);
953
954 struct ib_ah *hfi1_create_qp0_ah(struct hfi1_ibport *ibp, u16 dlid);
955
956 void hfi1_rc_rnr_retry(unsigned long arg);
957
958 void hfi1_rc_send_complete(struct hfi1_qp *qp, struct hfi1_ib_header *hdr);
959
960 void hfi1_rc_error(struct hfi1_qp *qp, enum ib_wc_status err);
961
962 void hfi1_ud_rcv(struct hfi1_packet *packet);
963
964 int hfi1_lookup_pkey_idx(struct hfi1_ibport *ibp, u16 pkey);
965
966 int hfi1_alloc_lkey(struct hfi1_mregion *mr, int dma_region);
967
968 void hfi1_free_lkey(struct hfi1_mregion *mr);
969
970 int hfi1_lkey_ok(struct hfi1_lkey_table *rkt, struct hfi1_pd *pd,
971 struct hfi1_sge *isge, struct ib_sge *sge, int acc);
972
973 int hfi1_rkey_ok(struct hfi1_qp *qp, struct hfi1_sge *sge,
974 u32 len, u64 vaddr, u32 rkey, int acc);
975
976 int hfi1_post_srq_receive(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
977 struct ib_recv_wr **bad_wr);
978
979 struct ib_srq *hfi1_create_srq(struct ib_pd *ibpd,
980 struct ib_srq_init_attr *srq_init_attr,
981 struct ib_udata *udata);
982
983 int hfi1_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
984 enum ib_srq_attr_mask attr_mask,
985 struct ib_udata *udata);
986
987 int hfi1_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr);
988
989 int hfi1_destroy_srq(struct ib_srq *ibsrq);
990
991 int hfi1_cq_init(struct hfi1_devdata *dd);
992
993 void hfi1_cq_exit(struct hfi1_devdata *dd);
994
995 void hfi1_cq_enter(struct hfi1_cq *cq, struct ib_wc *entry, int sig);
996
997 int hfi1_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *entry);
998
999 struct ib_cq *hfi1_create_cq(
1000 struct ib_device *ibdev,
1001 const struct ib_cq_init_attr *attr,
1002 struct ib_ucontext *context,
1003 struct ib_udata *udata);
1004
1005 int hfi1_destroy_cq(struct ib_cq *ibcq);
1006
1007 int hfi1_req_notify_cq(
1008 struct ib_cq *ibcq,
1009 enum ib_cq_notify_flags notify_flags);
1010
1011 int hfi1_resize_cq(struct ib_cq *ibcq, int cqe, struct ib_udata *udata);
1012
1013 struct ib_mr *hfi1_get_dma_mr(struct ib_pd *pd, int acc);
1014
1015 struct ib_mr *hfi1_reg_phys_mr(struct ib_pd *pd,
1016 struct ib_phys_buf *buffer_list,
1017 int num_phys_buf, int acc, u64 *iova_start);
1018
1019 struct ib_mr *hfi1_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
1020 u64 virt_addr, int mr_access_flags,
1021 struct ib_udata *udata);
1022
1023 int hfi1_dereg_mr(struct ib_mr *ibmr);
1024
1025 struct ib_mr *hfi1_alloc_mr(struct ib_pd *pd,
1026 enum ib_mr_type mr_type,
1027 u32 max_entries);
1028
1029 struct ib_fmr *hfi1_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
1030 struct ib_fmr_attr *fmr_attr);
1031
1032 int hfi1_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
1033 int list_len, u64 iova);
1034
1035 int hfi1_unmap_fmr(struct list_head *fmr_list);
1036
1037 int hfi1_dealloc_fmr(struct ib_fmr *ibfmr);
1038
hfi1_get_mr(struct hfi1_mregion * mr)1039 static inline void hfi1_get_mr(struct hfi1_mregion *mr)
1040 {
1041 atomic_inc(&mr->refcount);
1042 }
1043
hfi1_put_mr(struct hfi1_mregion * mr)1044 static inline void hfi1_put_mr(struct hfi1_mregion *mr)
1045 {
1046 if (unlikely(atomic_dec_and_test(&mr->refcount)))
1047 complete(&mr->comp);
1048 }
1049
hfi1_put_ss(struct hfi1_sge_state * ss)1050 static inline void hfi1_put_ss(struct hfi1_sge_state *ss)
1051 {
1052 while (ss->num_sge) {
1053 hfi1_put_mr(ss->sge.mr);
1054 if (--ss->num_sge)
1055 ss->sge = *ss->sg_list++;
1056 }
1057 }
1058
1059 void hfi1_release_mmap_info(struct kref *ref);
1060
1061 struct hfi1_mmap_info *hfi1_create_mmap_info(struct hfi1_ibdev *dev, u32 size,
1062 struct ib_ucontext *context,
1063 void *obj);
1064
1065 void hfi1_update_mmap_info(struct hfi1_ibdev *dev, struct hfi1_mmap_info *ip,
1066 u32 size, void *obj);
1067
1068 int hfi1_mmap(struct ib_ucontext *context, struct vm_area_struct *vma);
1069
1070 int hfi1_get_rwqe(struct hfi1_qp *qp, int wr_id_only);
1071
1072 void hfi1_migrate_qp(struct hfi1_qp *qp);
1073
1074 int hfi1_ruc_check_hdr(struct hfi1_ibport *ibp, struct hfi1_ib_header *hdr,
1075 int has_grh, struct hfi1_qp *qp, u32 bth0);
1076
1077 u32 hfi1_make_grh(struct hfi1_ibport *ibp, struct ib_grh *hdr,
1078 struct ib_global_route *grh, u32 hwords, u32 nwords);
1079
1080 void hfi1_make_ruc_header(struct hfi1_qp *qp, struct hfi1_other_headers *ohdr,
1081 u32 bth0, u32 bth2, int middle);
1082
1083 void hfi1_do_send(struct work_struct *work);
1084
1085 void hfi1_send_complete(struct hfi1_qp *qp, struct hfi1_swqe *wqe,
1086 enum ib_wc_status status);
1087
1088 void hfi1_send_rc_ack(struct hfi1_ctxtdata *, struct hfi1_qp *qp, int is_fecn);
1089
1090 int hfi1_make_rc_req(struct hfi1_qp *qp);
1091
1092 int hfi1_make_uc_req(struct hfi1_qp *qp);
1093
1094 int hfi1_make_ud_req(struct hfi1_qp *qp);
1095
1096 int hfi1_register_ib_device(struct hfi1_devdata *);
1097
1098 void hfi1_unregister_ib_device(struct hfi1_devdata *);
1099
1100 void hfi1_ib_rcv(struct hfi1_packet *packet);
1101
1102 unsigned hfi1_get_npkeys(struct hfi1_devdata *);
1103
1104 int hfi1_verbs_send_dma(struct hfi1_qp *qp, struct ahg_ib_header *hdr,
1105 u32 hdrwords, struct hfi1_sge_state *ss, u32 len,
1106 u32 plen, u32 dwords, u64 pbc);
1107
1108 int hfi1_verbs_send_pio(struct hfi1_qp *qp, struct ahg_ib_header *hdr,
1109 u32 hdrwords, struct hfi1_sge_state *ss, u32 len,
1110 u32 plen, u32 dwords, u64 pbc);
1111
1112 struct send_context *qp_to_send_context(struct hfi1_qp *qp, u8 sc5);
1113
1114 extern const enum ib_wc_opcode ib_hfi1_wc_opcode[];
1115
1116 extern const u8 hdr_len_by_opcode[];
1117
1118 extern const int ib_hfi1_state_ops[];
1119
1120 extern __be64 ib_hfi1_sys_image_guid; /* in network order */
1121
1122 extern unsigned int hfi1_lkey_table_size;
1123
1124 extern unsigned int hfi1_max_cqes;
1125
1126 extern unsigned int hfi1_max_cqs;
1127
1128 extern unsigned int hfi1_max_qp_wrs;
1129
1130 extern unsigned int hfi1_max_qps;
1131
1132 extern unsigned int hfi1_max_sges;
1133
1134 extern unsigned int hfi1_max_mcast_grps;
1135
1136 extern unsigned int hfi1_max_mcast_qp_attached;
1137
1138 extern unsigned int hfi1_max_srqs;
1139
1140 extern unsigned int hfi1_max_srq_sges;
1141
1142 extern unsigned int hfi1_max_srq_wrs;
1143
1144 extern const u32 ib_hfi1_rnr_table[];
1145
1146 extern struct ib_dma_mapping_ops hfi1_dma_mapping_ops;
1147
1148 #endif /* HFI1_VERBS_H */
1149