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1/* winfixup.S: Handle cases where user stack pointer is found to be bogus.
2 *
3 * Copyright (C) 1997, 2006 David S. Miller (davem@davemloft.net)
4 */
5
6#include <asm/asi.h>
7#include <asm/head.h>
8#include <asm/page.h>
9#include <asm/ptrace.h>
10#include <asm/processor.h>
11#include <asm/spitfire.h>
12#include <asm/thread_info.h>
13
14	.text
15
16	/* It used to be the case that these register window fault
17	 * handlers could run via the save and restore instructions
18	 * done by the trap entry and exit code.  They now do the
19	 * window spill/fill by hand, so that case no longer can occur.
20	 */
21
22	.align	32
23fill_fixup:
24	TRAP_LOAD_THREAD_REG(%g6, %g1)
25	rdpr	%tstate, %g1
26	and	%g1, TSTATE_CWP, %g1
27	or	%g4, FAULT_CODE_WINFIXUP, %g4
28	stb	%g4, [%g6 + TI_FAULT_CODE]
29	stx	%g5, [%g6 + TI_FAULT_ADDR]
30	wrpr	%g1, %cwp
31	ba,pt	%xcc, etrap
32	 rd	%pc, %g7
33	call	do_sparc64_fault
34	 add	%sp, PTREGS_OFF, %o0
35	ba,a,pt	%xcc, rtrap
36
37	/* Be very careful about usage of the trap globals here.
38	 * You cannot touch %g5 as that has the fault information.
39	 */
40spill_fixup:
41spill_fixup_mna:
42spill_fixup_dax:
43	TRAP_LOAD_THREAD_REG(%g6, %g1)
44	ldx	[%g6 + TI_FLAGS], %g1
45	andcc	%sp, 0x1, %g0
46	movne	%icc, 0, %g1
47	andcc	%g1, _TIF_32BIT, %g0
48	ldub	[%g6 + TI_WSAVED], %g1
49	sll	%g1, 3, %g3
50	add	%g6, %g3, %g3
51	stx	%sp, [%g3 + TI_RWIN_SPTRS]
52	sll	%g1, 7, %g3
53	bne,pt	%xcc, 1f
54	 add	%g6, %g3, %g3
55	stx	%l0, [%g3 + TI_REG_WINDOW + 0x00]
56	stx	%l1, [%g3 + TI_REG_WINDOW + 0x08]
57	stx	%l2, [%g3 + TI_REG_WINDOW + 0x10]
58	stx	%l3, [%g3 + TI_REG_WINDOW + 0x18]
59	stx	%l4, [%g3 + TI_REG_WINDOW + 0x20]
60	stx	%l5, [%g3 + TI_REG_WINDOW + 0x28]
61	stx	%l6, [%g3 + TI_REG_WINDOW + 0x30]
62	stx	%l7, [%g3 + TI_REG_WINDOW + 0x38]
63	stx	%i0, [%g3 + TI_REG_WINDOW + 0x40]
64	stx	%i1, [%g3 + TI_REG_WINDOW + 0x48]
65	stx	%i2, [%g3 + TI_REG_WINDOW + 0x50]
66	stx	%i3, [%g3 + TI_REG_WINDOW + 0x58]
67	stx	%i4, [%g3 + TI_REG_WINDOW + 0x60]
68	stx	%i5, [%g3 + TI_REG_WINDOW + 0x68]
69	stx	%i6, [%g3 + TI_REG_WINDOW + 0x70]
70	ba,pt	%xcc, 2f
71	 stx	%i7, [%g3 + TI_REG_WINDOW + 0x78]
721:	stw	%l0, [%g3 + TI_REG_WINDOW + 0x00]
73	stw	%l1, [%g3 + TI_REG_WINDOW + 0x04]
74	stw	%l2, [%g3 + TI_REG_WINDOW + 0x08]
75	stw	%l3, [%g3 + TI_REG_WINDOW + 0x0c]
76	stw	%l4, [%g3 + TI_REG_WINDOW + 0x10]
77	stw	%l5, [%g3 + TI_REG_WINDOW + 0x14]
78	stw	%l6, [%g3 + TI_REG_WINDOW + 0x18]
79	stw	%l7, [%g3 + TI_REG_WINDOW + 0x1c]
80	stw	%i0, [%g3 + TI_REG_WINDOW + 0x20]
81	stw	%i1, [%g3 + TI_REG_WINDOW + 0x24]
82	stw	%i2, [%g3 + TI_REG_WINDOW + 0x28]
83	stw	%i3, [%g3 + TI_REG_WINDOW + 0x2c]
84	stw	%i4, [%g3 + TI_REG_WINDOW + 0x30]
85	stw	%i5, [%g3 + TI_REG_WINDOW + 0x34]
86	stw	%i6, [%g3 + TI_REG_WINDOW + 0x38]
87	stw	%i7, [%g3 + TI_REG_WINDOW + 0x3c]
882:	add	%g1, 1, %g1
89	stb	%g1, [%g6 + TI_WSAVED]
90	rdpr	%tstate, %g1
91	andcc	%g1, TSTATE_PRIV, %g0
92	saved
93	be,pn	%xcc, 1f
94	 and	%g1, TSTATE_CWP, %g1
95	retry
961:	mov	FAULT_CODE_WRITE | FAULT_CODE_DTLB | FAULT_CODE_WINFIXUP, %g4
97	stb	%g4, [%g6 + TI_FAULT_CODE]
98	stx	%g5, [%g6 + TI_FAULT_ADDR]
99	wrpr	%g1, %cwp
100	ba,pt	%xcc, etrap
101	 rd	%pc, %g7
102	call	do_sparc64_fault
103	 add	%sp, PTREGS_OFF, %o0
104	ba,a,pt	%xcc, rtrap
105
106winfix_mna:
107	andn	%g3, 0x7f, %g3
108	add	%g3, 0x78, %g3
109	wrpr	%g3, %tnpc
110	done
111
112fill_fixup_mna:
113	rdpr	%tstate, %g1
114	and	%g1, TSTATE_CWP, %g1
115	wrpr	%g1, %cwp
116	ba,pt	%xcc, etrap
117	 rd	%pc, %g7
118	sethi	%hi(tlb_type), %g1
119	lduw	[%g1 + %lo(tlb_type)], %g1
120	cmp	%g1, 3
121	bne,pt	%icc, 1f
122	 add	%sp, PTREGS_OFF, %o0
123	mov	%l4, %o2
124	call	sun4v_do_mna
125	 mov	%l5, %o1
126	ba,a,pt	%xcc, rtrap
1271:	mov	%l4, %o1
128	mov	%l5, %o2
129	call	mem_address_unaligned
130	 nop
131	ba,a,pt	%xcc, rtrap
132
133winfix_dax:
134	andn	%g3, 0x7f, %g3
135	add	%g3, 0x74, %g3
136	wrpr	%g3, %tnpc
137	done
138
139fill_fixup_dax:
140	rdpr	%tstate, %g1
141	and	%g1, TSTATE_CWP, %g1
142	wrpr	%g1, %cwp
143	ba,pt	%xcc, etrap
144	 rd	%pc, %g7
145	sethi	%hi(tlb_type), %g1
146	mov	%l4, %o1
147	lduw	[%g1 + %lo(tlb_type)], %g1
148	mov	%l5, %o2
149	cmp	%g1, 3
150	bne,pt	%icc, 1f
151	 add	%sp, PTREGS_OFF, %o0
152	call	sun4v_data_access_exception
153	 nop
154	ba,a,pt	%xcc, rtrap
1551:	call	spitfire_data_access_exception
156	 nop
157	ba,a,pt	%xcc, rtrap
158