1 #ifndef _ASM_X86_PARAVIRT_TYPES_H 2 #define _ASM_X86_PARAVIRT_TYPES_H 3 4 /* Bitmask of what can be clobbered: usually at least eax. */ 5 #define CLBR_NONE 0 6 #define CLBR_EAX (1 << 0) 7 #define CLBR_ECX (1 << 1) 8 #define CLBR_EDX (1 << 2) 9 #define CLBR_EDI (1 << 3) 10 11 #ifdef CONFIG_X86_32 12 /* CLBR_ANY should match all regs platform has. For i386, that's just it */ 13 #define CLBR_ANY ((1 << 4) - 1) 14 15 #define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX) 16 #define CLBR_RET_REG (CLBR_EAX | CLBR_EDX) 17 #define CLBR_SCRATCH (0) 18 #else 19 #define CLBR_RAX CLBR_EAX 20 #define CLBR_RCX CLBR_ECX 21 #define CLBR_RDX CLBR_EDX 22 #define CLBR_RDI CLBR_EDI 23 #define CLBR_RSI (1 << 4) 24 #define CLBR_R8 (1 << 5) 25 #define CLBR_R9 (1 << 6) 26 #define CLBR_R10 (1 << 7) 27 #define CLBR_R11 (1 << 8) 28 29 #define CLBR_ANY ((1 << 9) - 1) 30 31 #define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \ 32 CLBR_RCX | CLBR_R8 | CLBR_R9) 33 #define CLBR_RET_REG (CLBR_RAX) 34 #define CLBR_SCRATCH (CLBR_R10 | CLBR_R11) 35 36 #endif /* X86_64 */ 37 38 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG) 39 40 #ifndef __ASSEMBLY__ 41 42 #include <asm/desc_defs.h> 43 #include <asm/kmap_types.h> 44 #include <asm/pgtable_types.h> 45 46 struct page; 47 struct thread_struct; 48 struct desc_ptr; 49 struct tss_struct; 50 struct mm_struct; 51 struct desc_struct; 52 struct task_struct; 53 struct cpumask; 54 55 /* 56 * Wrapper type for pointers to code which uses the non-standard 57 * calling convention. See PV_CALL_SAVE_REGS_THUNK below. 58 */ 59 struct paravirt_callee_save { 60 void *func; 61 }; 62 63 /* general info */ 64 struct pv_info { 65 unsigned int kernel_rpl; 66 int shared_kernel_pmd; 67 68 #ifdef CONFIG_X86_64 69 u16 extra_user_64bit_cs; /* __USER_CS if none */ 70 #endif 71 72 int paravirt_enabled; 73 unsigned int features; /* valid only if paravirt_enabled is set */ 74 const char *name; 75 }; 76 77 #define paravirt_has(x) paravirt_has_feature(PV_SUPPORTED_##x) 78 /* Supported features */ 79 #define PV_SUPPORTED_RTC (1<<0) 80 81 struct pv_init_ops { 82 /* 83 * Patch may replace one of the defined code sequences with 84 * arbitrary code, subject to the same register constraints. 85 * This generally means the code is not free to clobber any 86 * registers other than EAX. The patch function should return 87 * the number of bytes of code generated, as we nop pad the 88 * rest in generic code. 89 */ 90 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf, 91 unsigned long addr, unsigned len); 92 }; 93 94 95 struct pv_lazy_ops { 96 /* Set deferred update mode, used for batching operations. */ 97 void (*enter)(void); 98 void (*leave)(void); 99 void (*flush)(void); 100 }; 101 102 struct pv_time_ops { 103 unsigned long long (*sched_clock)(void); 104 unsigned long long (*steal_clock)(int cpu); 105 }; 106 107 struct pv_cpu_ops { 108 /* hooks for various privileged instructions */ 109 unsigned long (*get_debugreg)(int regno); 110 void (*set_debugreg)(int regno, unsigned long value); 111 112 void (*clts)(void); 113 114 unsigned long (*read_cr0)(void); 115 void (*write_cr0)(unsigned long); 116 117 unsigned long (*read_cr4_safe)(void); 118 unsigned long (*read_cr4)(void); 119 void (*write_cr4)(unsigned long); 120 121 #ifdef CONFIG_X86_64 122 unsigned long (*read_cr8)(void); 123 void (*write_cr8)(unsigned long); 124 #endif 125 126 /* Segment descriptor handling */ 127 void (*load_tr_desc)(void); 128 void (*load_gdt)(const struct desc_ptr *); 129 void (*load_idt)(const struct desc_ptr *); 130 /* store_gdt has been removed. */ 131 void (*store_idt)(struct desc_ptr *); 132 void (*set_ldt)(const void *desc, unsigned entries); 133 unsigned long (*store_tr)(void); 134 void (*load_tls)(struct thread_struct *t, unsigned int cpu); 135 #ifdef CONFIG_X86_64 136 void (*load_gs_index)(unsigned int idx); 137 #endif 138 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum, 139 const void *desc); 140 void (*write_gdt_entry)(struct desc_struct *, 141 int entrynum, const void *desc, int size); 142 void (*write_idt_entry)(gate_desc *, 143 int entrynum, const gate_desc *gate); 144 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries); 145 void (*free_ldt)(struct desc_struct *ldt, unsigned entries); 146 147 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t); 148 149 void (*set_iopl_mask)(unsigned mask); 150 151 void (*wbinvd)(void); 152 void (*io_delay)(void); 153 154 /* cpuid emulation, mostly so that caps bits can be disabled */ 155 void (*cpuid)(unsigned int *eax, unsigned int *ebx, 156 unsigned int *ecx, unsigned int *edx); 157 158 /* MSR, PMC and TSR operations. 159 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */ 160 u64 (*read_msr)(unsigned int msr, int *err); 161 int (*write_msr)(unsigned int msr, unsigned low, unsigned high); 162 163 u64 (*read_pmc)(int counter); 164 165 /* 166 * Switch to usermode gs and return to 64-bit usermode using 167 * sysret. Only used in 64-bit kernels to return to 64-bit 168 * processes. Usermode register state, including %rsp, must 169 * already be restored. 170 */ 171 void (*usergs_sysret64)(void); 172 173 /* 174 * Switch to usermode gs and return to 32-bit usermode using 175 * sysret. Used to return to 32-on-64 compat processes. 176 * Other usermode register state, including %esp, must already 177 * be restored. 178 */ 179 void (*usergs_sysret32)(void); 180 181 /* Normal iret. Jump to this with the standard iret stack 182 frame set up. */ 183 void (*iret)(void); 184 185 void (*swapgs)(void); 186 187 void (*start_context_switch)(struct task_struct *prev); 188 void (*end_context_switch)(struct task_struct *next); 189 }; 190 191 struct pv_irq_ops { 192 /* 193 * Get/set interrupt state. save_fl and restore_fl are only 194 * expected to use X86_EFLAGS_IF; all other bits 195 * returned from save_fl are undefined, and may be ignored by 196 * restore_fl. 197 * 198 * NOTE: These functions callers expect the callee to preserve 199 * more registers than the standard C calling convention. 200 */ 201 struct paravirt_callee_save save_fl; 202 struct paravirt_callee_save restore_fl; 203 struct paravirt_callee_save irq_disable; 204 struct paravirt_callee_save irq_enable; 205 206 void (*safe_halt)(void); 207 void (*halt)(void); 208 209 #ifdef CONFIG_X86_64 210 void (*adjust_exception_frame)(void); 211 #endif 212 }; 213 214 struct pv_apic_ops { 215 #ifdef CONFIG_X86_LOCAL_APIC 216 void (*startup_ipi_hook)(int phys_apicid, 217 unsigned long start_eip, 218 unsigned long start_esp); 219 #endif 220 }; 221 222 struct pv_mmu_ops { 223 unsigned long (*read_cr2)(void); 224 void (*write_cr2)(unsigned long); 225 226 unsigned long (*read_cr3)(void); 227 void (*write_cr3)(unsigned long); 228 229 /* 230 * Hooks for intercepting the creation/use/destruction of an 231 * mm_struct. 232 */ 233 void (*activate_mm)(struct mm_struct *prev, 234 struct mm_struct *next); 235 void (*dup_mmap)(struct mm_struct *oldmm, 236 struct mm_struct *mm); 237 void (*exit_mmap)(struct mm_struct *mm); 238 239 240 /* TLB operations */ 241 void (*flush_tlb_user)(void); 242 void (*flush_tlb_kernel)(void); 243 void (*flush_tlb_single)(unsigned long addr); 244 void (*flush_tlb_others)(const struct cpumask *cpus, 245 struct mm_struct *mm, 246 unsigned long start, 247 unsigned long end); 248 249 /* Hooks for allocating and freeing a pagetable top-level */ 250 int (*pgd_alloc)(struct mm_struct *mm); 251 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd); 252 253 /* 254 * Hooks for allocating/releasing pagetable pages when they're 255 * attached to a pagetable 256 */ 257 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn); 258 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn); 259 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn); 260 void (*release_pte)(unsigned long pfn); 261 void (*release_pmd)(unsigned long pfn); 262 void (*release_pud)(unsigned long pfn); 263 264 /* Pagetable manipulation functions */ 265 void (*set_pte)(pte_t *ptep, pte_t pteval); 266 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr, 267 pte_t *ptep, pte_t pteval); 268 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval); 269 void (*set_pmd_at)(struct mm_struct *mm, unsigned long addr, 270 pmd_t *pmdp, pmd_t pmdval); 271 void (*pte_update)(struct mm_struct *mm, unsigned long addr, 272 pte_t *ptep); 273 void (*pte_update_defer)(struct mm_struct *mm, 274 unsigned long addr, pte_t *ptep); 275 void (*pmd_update)(struct mm_struct *mm, unsigned long addr, 276 pmd_t *pmdp); 277 void (*pmd_update_defer)(struct mm_struct *mm, 278 unsigned long addr, pmd_t *pmdp); 279 280 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr, 281 pte_t *ptep); 282 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr, 283 pte_t *ptep, pte_t pte); 284 285 struct paravirt_callee_save pte_val; 286 struct paravirt_callee_save make_pte; 287 288 struct paravirt_callee_save pgd_val; 289 struct paravirt_callee_save make_pgd; 290 291 #if CONFIG_PGTABLE_LEVELS >= 3 292 #ifdef CONFIG_X86_PAE 293 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval); 294 void (*pte_clear)(struct mm_struct *mm, unsigned long addr, 295 pte_t *ptep); 296 void (*pmd_clear)(pmd_t *pmdp); 297 298 #endif /* CONFIG_X86_PAE */ 299 300 void (*set_pud)(pud_t *pudp, pud_t pudval); 301 302 struct paravirt_callee_save pmd_val; 303 struct paravirt_callee_save make_pmd; 304 305 #if CONFIG_PGTABLE_LEVELS == 4 306 struct paravirt_callee_save pud_val; 307 struct paravirt_callee_save make_pud; 308 309 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval); 310 #endif /* CONFIG_PGTABLE_LEVELS == 4 */ 311 #endif /* CONFIG_PGTABLE_LEVELS >= 3 */ 312 313 struct pv_lazy_ops lazy_mode; 314 315 /* dom0 ops */ 316 317 /* Sometimes the physical address is a pfn, and sometimes its 318 an mfn. We can tell which is which from the index. */ 319 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx, 320 phys_addr_t phys, pgprot_t flags); 321 }; 322 323 struct arch_spinlock; 324 #ifdef CONFIG_SMP 325 #include <asm/spinlock_types.h> 326 #else 327 typedef u16 __ticket_t; 328 #endif 329 330 struct qspinlock; 331 332 struct pv_lock_ops { 333 #ifdef CONFIG_QUEUED_SPINLOCKS 334 void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val); 335 struct paravirt_callee_save queued_spin_unlock; 336 337 void (*wait)(u8 *ptr, u8 val); 338 void (*kick)(int cpu); 339 #else /* !CONFIG_QUEUED_SPINLOCKS */ 340 struct paravirt_callee_save lock_spinning; 341 void (*unlock_kick)(struct arch_spinlock *lock, __ticket_t ticket); 342 #endif /* !CONFIG_QUEUED_SPINLOCKS */ 343 }; 344 345 /* This contains all the paravirt structures: we get a convenient 346 * number for each function using the offset which we use to indicate 347 * what to patch. */ 348 struct paravirt_patch_template { 349 struct pv_init_ops pv_init_ops; 350 struct pv_time_ops pv_time_ops; 351 struct pv_cpu_ops pv_cpu_ops; 352 struct pv_irq_ops pv_irq_ops; 353 struct pv_apic_ops pv_apic_ops; 354 struct pv_mmu_ops pv_mmu_ops; 355 struct pv_lock_ops pv_lock_ops; 356 }; 357 358 extern struct pv_info pv_info; 359 extern struct pv_init_ops pv_init_ops; 360 extern struct pv_time_ops pv_time_ops; 361 extern struct pv_cpu_ops pv_cpu_ops; 362 extern struct pv_irq_ops pv_irq_ops; 363 extern struct pv_apic_ops pv_apic_ops; 364 extern struct pv_mmu_ops pv_mmu_ops; 365 extern struct pv_lock_ops pv_lock_ops; 366 367 #define PARAVIRT_PATCH(x) \ 368 (offsetof(struct paravirt_patch_template, x) / sizeof(void *)) 369 370 #define paravirt_type(op) \ 371 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \ 372 [paravirt_opptr] "i" (&(op)) 373 #define paravirt_clobber(clobber) \ 374 [paravirt_clobber] "i" (clobber) 375 376 /* 377 * Generate some code, and mark it as patchable by the 378 * apply_paravirt() alternate instruction patcher. 379 */ 380 #define _paravirt_alt(insn_string, type, clobber) \ 381 "771:\n\t" insn_string "\n" "772:\n" \ 382 ".pushsection .parainstructions,\"a\"\n" \ 383 _ASM_ALIGN "\n" \ 384 _ASM_PTR " 771b\n" \ 385 " .byte " type "\n" \ 386 " .byte 772b-771b\n" \ 387 " .short " clobber "\n" \ 388 ".popsection\n" 389 390 /* Generate patchable code, with the default asm parameters. */ 391 #define paravirt_alt(insn_string) \ 392 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]") 393 394 /* Simple instruction patching code. */ 395 #define NATIVE_LABEL(a,x,b) "\n\t.globl " a #x "_" #b "\n" a #x "_" #b ":\n\t" 396 397 #define DEF_NATIVE(ops, name, code) \ 398 __visible extern const char start_##ops##_##name[], end_##ops##_##name[]; \ 399 asm(NATIVE_LABEL("start_", ops, name) code NATIVE_LABEL("end_", ops, name)) 400 401 unsigned paravirt_patch_nop(void); 402 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len); 403 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len); 404 unsigned paravirt_patch_ignore(unsigned len); 405 unsigned paravirt_patch_call(void *insnbuf, 406 const void *target, u16 tgt_clobbers, 407 unsigned long addr, u16 site_clobbers, 408 unsigned len); 409 unsigned paravirt_patch_jmp(void *insnbuf, const void *target, 410 unsigned long addr, unsigned len); 411 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf, 412 unsigned long addr, unsigned len); 413 414 unsigned paravirt_patch_insns(void *insnbuf, unsigned len, 415 const char *start, const char *end); 416 417 unsigned native_patch(u8 type, u16 clobbers, void *ibuf, 418 unsigned long addr, unsigned len); 419 420 int paravirt_disable_iospace(void); 421 422 /* 423 * This generates an indirect call based on the operation type number. 424 * The type number, computed in PARAVIRT_PATCH, is derived from the 425 * offset into the paravirt_patch_template structure, and can therefore be 426 * freely converted back into a structure offset. 427 */ 428 #define PARAVIRT_CALL "call *%c[paravirt_opptr];" 429 430 /* 431 * These macros are intended to wrap calls through one of the paravirt 432 * ops structs, so that they can be later identified and patched at 433 * runtime. 434 * 435 * Normally, a call to a pv_op function is a simple indirect call: 436 * (pv_op_struct.operations)(args...). 437 * 438 * Unfortunately, this is a relatively slow operation for modern CPUs, 439 * because it cannot necessarily determine what the destination 440 * address is. In this case, the address is a runtime constant, so at 441 * the very least we can patch the call to e a simple direct call, or 442 * ideally, patch an inline implementation into the callsite. (Direct 443 * calls are essentially free, because the call and return addresses 444 * are completely predictable.) 445 * 446 * For i386, these macros rely on the standard gcc "regparm(3)" calling 447 * convention, in which the first three arguments are placed in %eax, 448 * %edx, %ecx (in that order), and the remaining arguments are placed 449 * on the stack. All caller-save registers (eax,edx,ecx) are expected 450 * to be modified (either clobbered or used for return values). 451 * X86_64, on the other hand, already specifies a register-based calling 452 * conventions, returning at %rax, with parameteres going on %rdi, %rsi, 453 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any 454 * special handling for dealing with 4 arguments, unlike i386. 455 * However, x86_64 also have to clobber all caller saved registers, which 456 * unfortunately, are quite a bit (r8 - r11) 457 * 458 * The call instruction itself is marked by placing its start address 459 * and size into the .parainstructions section, so that 460 * apply_paravirt() in arch/i386/kernel/alternative.c can do the 461 * appropriate patching under the control of the backend pv_init_ops 462 * implementation. 463 * 464 * Unfortunately there's no way to get gcc to generate the args setup 465 * for the call, and then allow the call itself to be generated by an 466 * inline asm. Because of this, we must do the complete arg setup and 467 * return value handling from within these macros. This is fairly 468 * cumbersome. 469 * 470 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments. 471 * It could be extended to more arguments, but there would be little 472 * to be gained from that. For each number of arguments, there are 473 * the two VCALL and CALL variants for void and non-void functions. 474 * 475 * When there is a return value, the invoker of the macro must specify 476 * the return type. The macro then uses sizeof() on that type to 477 * determine whether its a 32 or 64 bit value, and places the return 478 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for 479 * 64-bit). For x86_64 machines, it just returns at %rax regardless of 480 * the return value size. 481 * 482 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments 483 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments 484 * in low,high order 485 * 486 * Small structures are passed and returned in registers. The macro 487 * calling convention can't directly deal with this, so the wrapper 488 * functions must do this. 489 * 490 * These PVOP_* macros are only defined within this header. This 491 * means that all uses must be wrapped in inline functions. This also 492 * makes sure the incoming and outgoing types are always correct. 493 */ 494 #ifdef CONFIG_X86_32 495 #define PVOP_VCALL_ARGS \ 496 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx 497 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS 498 499 #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x)) 500 #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x)) 501 #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x)) 502 503 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \ 504 "=c" (__ecx) 505 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS 506 507 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx) 508 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS 509 510 #define EXTRA_CLOBBERS 511 #define VEXTRA_CLOBBERS 512 #else /* CONFIG_X86_64 */ 513 /* [re]ax isn't an arg, but the return val */ 514 #define PVOP_VCALL_ARGS \ 515 unsigned long __edi = __edi, __esi = __esi, \ 516 __edx = __edx, __ecx = __ecx, __eax = __eax 517 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS 518 519 #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x)) 520 #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x)) 521 #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x)) 522 #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x)) 523 524 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \ 525 "=S" (__esi), "=d" (__edx), \ 526 "=c" (__ecx) 527 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) 528 529 /* void functions are still allowed [re]ax for scratch */ 530 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax) 531 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS 532 533 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11" 534 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" 535 #endif /* CONFIG_X86_32 */ 536 537 #ifdef CONFIG_PARAVIRT_DEBUG 538 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL) 539 #else 540 #define PVOP_TEST_NULL(op) ((void)op) 541 #endif 542 543 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \ 544 pre, post, ...) \ 545 ({ \ 546 rettype __ret; \ 547 PVOP_CALL_ARGS; \ 548 PVOP_TEST_NULL(op); \ 549 /* This is 32-bit specific, but is okay in 64-bit */ \ 550 /* since this condition will never hold */ \ 551 if (sizeof(rettype) > sizeof(unsigned long)) { \ 552 asm volatile(pre \ 553 paravirt_alt(PARAVIRT_CALL) \ 554 post \ 555 : call_clbr \ 556 : paravirt_type(op), \ 557 paravirt_clobber(clbr), \ 558 ##__VA_ARGS__ \ 559 : "memory", "cc" extra_clbr); \ 560 __ret = (rettype)((((u64)__edx) << 32) | __eax); \ 561 } else { \ 562 asm volatile(pre \ 563 paravirt_alt(PARAVIRT_CALL) \ 564 post \ 565 : call_clbr \ 566 : paravirt_type(op), \ 567 paravirt_clobber(clbr), \ 568 ##__VA_ARGS__ \ 569 : "memory", "cc" extra_clbr); \ 570 __ret = (rettype)__eax; \ 571 } \ 572 __ret; \ 573 }) 574 575 #define __PVOP_CALL(rettype, op, pre, post, ...) \ 576 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \ 577 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__) 578 579 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \ 580 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \ 581 PVOP_CALLEE_CLOBBERS, , \ 582 pre, post, ##__VA_ARGS__) 583 584 585 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \ 586 ({ \ 587 PVOP_VCALL_ARGS; \ 588 PVOP_TEST_NULL(op); \ 589 asm volatile(pre \ 590 paravirt_alt(PARAVIRT_CALL) \ 591 post \ 592 : call_clbr \ 593 : paravirt_type(op), \ 594 paravirt_clobber(clbr), \ 595 ##__VA_ARGS__ \ 596 : "memory", "cc" extra_clbr); \ 597 }) 598 599 #define __PVOP_VCALL(op, pre, post, ...) \ 600 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \ 601 VEXTRA_CLOBBERS, \ 602 pre, post, ##__VA_ARGS__) 603 604 #define __PVOP_VCALLEESAVE(op, pre, post, ...) \ 605 ____PVOP_VCALL(op.func, CLBR_RET_REG, \ 606 PVOP_VCALLEE_CLOBBERS, , \ 607 pre, post, ##__VA_ARGS__) 608 609 610 611 #define PVOP_CALL0(rettype, op) \ 612 __PVOP_CALL(rettype, op, "", "") 613 #define PVOP_VCALL0(op) \ 614 __PVOP_VCALL(op, "", "") 615 616 #define PVOP_CALLEE0(rettype, op) \ 617 __PVOP_CALLEESAVE(rettype, op, "", "") 618 #define PVOP_VCALLEE0(op) \ 619 __PVOP_VCALLEESAVE(op, "", "") 620 621 622 #define PVOP_CALL1(rettype, op, arg1) \ 623 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) 624 #define PVOP_VCALL1(op, arg1) \ 625 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1)) 626 627 #define PVOP_CALLEE1(rettype, op, arg1) \ 628 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) 629 #define PVOP_VCALLEE1(op, arg1) \ 630 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1)) 631 632 633 #define PVOP_CALL2(rettype, op, arg1, arg2) \ 634 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 635 PVOP_CALL_ARG2(arg2)) 636 #define PVOP_VCALL2(op, arg1, arg2) \ 637 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ 638 PVOP_CALL_ARG2(arg2)) 639 640 #define PVOP_CALLEE2(rettype, op, arg1, arg2) \ 641 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 642 PVOP_CALL_ARG2(arg2)) 643 #define PVOP_VCALLEE2(op, arg1, arg2) \ 644 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \ 645 PVOP_CALL_ARG2(arg2)) 646 647 648 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ 649 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 650 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) 651 #define PVOP_VCALL3(op, arg1, arg2, arg3) \ 652 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ 653 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) 654 655 /* This is the only difference in x86_64. We can make it much simpler */ 656 #ifdef CONFIG_X86_32 657 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ 658 __PVOP_CALL(rettype, op, \ 659 "push %[_arg4];", "lea 4(%%esp),%%esp;", \ 660 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 661 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4))) 662 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ 663 __PVOP_VCALL(op, \ 664 "push %[_arg4];", "lea 4(%%esp),%%esp;", \ 665 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ 666 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) 667 #else 668 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ 669 __PVOP_CALL(rettype, op, "", "", \ 670 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 671 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) 672 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ 673 __PVOP_VCALL(op, "", "", \ 674 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 675 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) 676 #endif 677 678 /* Lazy mode for batching updates / context switch */ 679 enum paravirt_lazy_mode { 680 PARAVIRT_LAZY_NONE, 681 PARAVIRT_LAZY_MMU, 682 PARAVIRT_LAZY_CPU, 683 }; 684 685 enum paravirt_lazy_mode paravirt_get_lazy_mode(void); 686 void paravirt_start_context_switch(struct task_struct *prev); 687 void paravirt_end_context_switch(struct task_struct *next); 688 689 void paravirt_enter_lazy_mmu(void); 690 void paravirt_leave_lazy_mmu(void); 691 void paravirt_flush_lazy_mmu(void); 692 693 void _paravirt_nop(void); 694 u32 _paravirt_ident_32(u32); 695 u64 _paravirt_ident_64(u64); 696 697 #define paravirt_nop ((void *)_paravirt_nop) 698 699 /* These all sit in the .parainstructions section to tell us what to patch. */ 700 struct paravirt_patch_site { 701 u8 *instr; /* original instructions */ 702 u8 instrtype; /* type of this instruction */ 703 u8 len; /* length of original instruction */ 704 u16 clobbers; /* what registers you may clobber */ 705 }; 706 707 extern struct paravirt_patch_site __parainstructions[], 708 __parainstructions_end[]; 709 710 #endif /* __ASSEMBLY__ */ 711 712 #endif /* _ASM_X86_PARAVIRT_TYPES_H */ 713