1 /*
2 * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
3 * and RBTX49xx patch from CELF patch archive.
4 *
5 * 2003-2005 (c) MontaVista Software, Inc.
6 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/string.h>
17 #include <linux/module.h>
18 #include <linux/clk.h>
19 #include <linux/err.h>
20 #include <linux/gpio.h>
21 #include <linux/platform_device.h>
22 #include <linux/serial_core.h>
23 #include <linux/mtd/physmap.h>
24 #include <linux/leds.h>
25 #include <linux/device.h>
26 #include <linux/slab.h>
27 #include <linux/irq.h>
28 #include <asm/bootinfo.h>
29 #include <asm/idle.h>
30 #include <asm/time.h>
31 #include <asm/reboot.h>
32 #include <asm/r4kcache.h>
33 #include <asm/sections.h>
34 #include <asm/txx9/generic.h>
35 #include <asm/txx9/pci.h>
36 #include <asm/txx9tmr.h>
37 #include <asm/txx9/ndfmc.h>
38 #include <asm/txx9/dmac.h>
39 #ifdef CONFIG_CPU_TX49XX
40 #include <asm/txx9/tx4938.h>
41 #endif
42
43 /* EBUSC settings of TX4927, etc. */
44 struct resource txx9_ce_res[8];
45 static char txx9_ce_res_name[8][4]; /* "CEn" */
46
47 /* pcode, internal register */
48 unsigned int txx9_pcode;
49 char txx9_pcode_str[8];
50 static struct resource txx9_reg_res = {
51 .name = txx9_pcode_str,
52 .flags = IORESOURCE_MEM,
53 };
54 void __init
txx9_reg_res_init(unsigned int pcode,unsigned long base,unsigned long size)55 txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
56 {
57 int i;
58
59 for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
60 sprintf(txx9_ce_res_name[i], "CE%d", i);
61 txx9_ce_res[i].flags = IORESOURCE_MEM;
62 txx9_ce_res[i].name = txx9_ce_res_name[i];
63 }
64
65 txx9_pcode = pcode;
66 sprintf(txx9_pcode_str, "TX%x", pcode);
67 if (base) {
68 txx9_reg_res.start = base & 0xfffffffffULL;
69 txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
70 request_resource(&iomem_resource, &txx9_reg_res);
71 }
72 }
73
74 /* clocks */
75 unsigned int txx9_master_clock;
76 unsigned int txx9_cpu_clock;
77 unsigned int txx9_gbus_clock;
78
79 #ifdef CONFIG_CPU_TX39XX
80 /* don't enable by default - see errata */
81 int txx9_ccfg_toeon __initdata;
82 #else
83 int txx9_ccfg_toeon __initdata = 1;
84 #endif
85
86 /* Minimum CLK support */
87
clk_get(struct device * dev,const char * id)88 struct clk *clk_get(struct device *dev, const char *id)
89 {
90 if (!strcmp(id, "spi-baseclk"))
91 return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 2);
92 if (!strcmp(id, "imbus_clk"))
93 return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
94 return ERR_PTR(-ENOENT);
95 }
96 EXPORT_SYMBOL(clk_get);
97
clk_enable(struct clk * clk)98 int clk_enable(struct clk *clk)
99 {
100 return 0;
101 }
102 EXPORT_SYMBOL(clk_enable);
103
clk_disable(struct clk * clk)104 void clk_disable(struct clk *clk)
105 {
106 }
107 EXPORT_SYMBOL(clk_disable);
108
clk_get_rate(struct clk * clk)109 unsigned long clk_get_rate(struct clk *clk)
110 {
111 return (unsigned long)clk;
112 }
113 EXPORT_SYMBOL(clk_get_rate);
114
clk_put(struct clk * clk)115 void clk_put(struct clk *clk)
116 {
117 }
118 EXPORT_SYMBOL(clk_put);
119
120 #define BOARD_VEC(board) extern struct txx9_board_vec board;
121 #include <asm/txx9/boards.h>
122 #undef BOARD_VEC
123
124 struct txx9_board_vec *txx9_board_vec __initdata;
125 static char txx9_system_type[32];
126
127 static struct txx9_board_vec *board_vecs[] __initdata = {
128 #define BOARD_VEC(board) &board,
129 #include <asm/txx9/boards.h>
130 #undef BOARD_VEC
131 };
132
find_board_byname(const char * name)133 static struct txx9_board_vec *__init find_board_byname(const char *name)
134 {
135 int i;
136
137 /* search board_vecs table */
138 for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
139 if (strstr(board_vecs[i]->system, name))
140 return board_vecs[i];
141 }
142 return NULL;
143 }
144
prom_init_cmdline(void)145 static void __init prom_init_cmdline(void)
146 {
147 int argc;
148 int *argv32;
149 int i; /* Always ignore the "-c" at argv[0] */
150
151 if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
152 /*
153 * argc is not a valid number, or argv32 is not a valid
154 * pointer
155 */
156 argc = 0;
157 argv32 = NULL;
158 } else {
159 argc = (int)fw_arg0;
160 argv32 = (int *)fw_arg1;
161 }
162
163 arcs_cmdline[0] = '\0';
164
165 for (i = 1; i < argc; i++) {
166 char *str = (char *)(long)argv32[i];
167 if (i != 1)
168 strcat(arcs_cmdline, " ");
169 if (strchr(str, ' ')) {
170 strcat(arcs_cmdline, "\"");
171 strcat(arcs_cmdline, str);
172 strcat(arcs_cmdline, "\"");
173 } else
174 strcat(arcs_cmdline, str);
175 }
176 }
177
178 static int txx9_ic_disable __initdata;
179 static int txx9_dc_disable __initdata;
180
181 #if defined(CONFIG_CPU_TX49XX)
182 /* flush all cache on very early stage (before 4k_cache_init) */
early_flush_dcache(void)183 static void __init early_flush_dcache(void)
184 {
185 unsigned int conf = read_c0_config();
186 unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
187 unsigned int linesz = 32;
188 unsigned long addr, end;
189
190 end = INDEX_BASE + dc_size / 4;
191 /* 4way, waybit=0 */
192 for (addr = INDEX_BASE; addr < end; addr += linesz) {
193 cache_op(Index_Writeback_Inv_D, addr | 0);
194 cache_op(Index_Writeback_Inv_D, addr | 1);
195 cache_op(Index_Writeback_Inv_D, addr | 2);
196 cache_op(Index_Writeback_Inv_D, addr | 3);
197 }
198 }
199
txx9_cache_fixup(void)200 static void __init txx9_cache_fixup(void)
201 {
202 unsigned int conf;
203
204 conf = read_c0_config();
205 /* flush and disable */
206 if (txx9_ic_disable) {
207 conf |= TX49_CONF_IC;
208 write_c0_config(conf);
209 }
210 if (txx9_dc_disable) {
211 early_flush_dcache();
212 conf |= TX49_CONF_DC;
213 write_c0_config(conf);
214 }
215
216 /* enable cache */
217 conf = read_c0_config();
218 if (!txx9_ic_disable)
219 conf &= ~TX49_CONF_IC;
220 if (!txx9_dc_disable)
221 conf &= ~TX49_CONF_DC;
222 write_c0_config(conf);
223
224 if (conf & TX49_CONF_IC)
225 pr_info("TX49XX I-Cache disabled.\n");
226 if (conf & TX49_CONF_DC)
227 pr_info("TX49XX D-Cache disabled.\n");
228 }
229 #elif defined(CONFIG_CPU_TX39XX)
230 /* flush all cache on very early stage (before tx39_cache_init) */
early_flush_dcache(void)231 static void __init early_flush_dcache(void)
232 {
233 unsigned int conf = read_c0_config();
234 unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
235 TX39_CONF_DCS_SHIFT));
236 unsigned int linesz = 16;
237 unsigned long addr, end;
238
239 end = INDEX_BASE + dc_size / 2;
240 /* 2way, waybit=0 */
241 for (addr = INDEX_BASE; addr < end; addr += linesz) {
242 cache_op(Index_Writeback_Inv_D, addr | 0);
243 cache_op(Index_Writeback_Inv_D, addr | 1);
244 }
245 }
246
txx9_cache_fixup(void)247 static void __init txx9_cache_fixup(void)
248 {
249 unsigned int conf;
250
251 conf = read_c0_config();
252 /* flush and disable */
253 if (txx9_ic_disable) {
254 conf &= ~TX39_CONF_ICE;
255 write_c0_config(conf);
256 }
257 if (txx9_dc_disable) {
258 early_flush_dcache();
259 conf &= ~TX39_CONF_DCE;
260 write_c0_config(conf);
261 }
262
263 /* enable cache */
264 conf = read_c0_config();
265 if (!txx9_ic_disable)
266 conf |= TX39_CONF_ICE;
267 if (!txx9_dc_disable)
268 conf |= TX39_CONF_DCE;
269 write_c0_config(conf);
270
271 if (!(conf & TX39_CONF_ICE))
272 pr_info("TX39XX I-Cache disabled.\n");
273 if (!(conf & TX39_CONF_DCE))
274 pr_info("TX39XX D-Cache disabled.\n");
275 }
276 #else
txx9_cache_fixup(void)277 static inline void txx9_cache_fixup(void)
278 {
279 }
280 #endif
281
preprocess_cmdline(void)282 static void __init preprocess_cmdline(void)
283 {
284 static char cmdline[COMMAND_LINE_SIZE] __initdata;
285 char *s;
286
287 strcpy(cmdline, arcs_cmdline);
288 s = cmdline;
289 arcs_cmdline[0] = '\0';
290 while (s && *s) {
291 char *str = strsep(&s, " ");
292 if (strncmp(str, "board=", 6) == 0) {
293 txx9_board_vec = find_board_byname(str + 6);
294 continue;
295 } else if (strncmp(str, "masterclk=", 10) == 0) {
296 unsigned int val;
297 if (kstrtouint(str + 10, 10, &val) == 0)
298 txx9_master_clock = val;
299 continue;
300 } else if (strcmp(str, "icdisable") == 0) {
301 txx9_ic_disable = 1;
302 continue;
303 } else if (strcmp(str, "dcdisable") == 0) {
304 txx9_dc_disable = 1;
305 continue;
306 } else if (strcmp(str, "toeoff") == 0) {
307 txx9_ccfg_toeon = 0;
308 continue;
309 } else if (strcmp(str, "toeon") == 0) {
310 txx9_ccfg_toeon = 1;
311 continue;
312 }
313 if (arcs_cmdline[0])
314 strcat(arcs_cmdline, " ");
315 strcat(arcs_cmdline, str);
316 }
317
318 txx9_cache_fixup();
319 }
320
select_board(void)321 static void __init select_board(void)
322 {
323 const char *envstr;
324
325 /* first, determine by "board=" argument in preprocess_cmdline() */
326 if (txx9_board_vec)
327 return;
328 /* next, determine by "board" envvar */
329 envstr = prom_getenv("board");
330 if (envstr) {
331 txx9_board_vec = find_board_byname(envstr);
332 if (txx9_board_vec)
333 return;
334 }
335
336 /* select "default" board */
337 #ifdef CONFIG_TOSHIBA_JMR3927
338 txx9_board_vec = &jmr3927_vec;
339 #endif
340 #ifdef CONFIG_CPU_TX49XX
341 switch (TX4938_REV_PCODE()) {
342 #ifdef CONFIG_TOSHIBA_RBTX4927
343 case 0x4927:
344 txx9_board_vec = &rbtx4927_vec;
345 break;
346 case 0x4937:
347 txx9_board_vec = &rbtx4937_vec;
348 break;
349 #endif
350 #ifdef CONFIG_TOSHIBA_RBTX4938
351 case 0x4938:
352 txx9_board_vec = &rbtx4938_vec;
353 break;
354 #endif
355 #ifdef CONFIG_TOSHIBA_RBTX4939
356 case 0x4939:
357 txx9_board_vec = &rbtx4939_vec;
358 break;
359 #endif
360 }
361 #endif
362 }
363
prom_init(void)364 void __init prom_init(void)
365 {
366 prom_init_cmdline();
367 preprocess_cmdline();
368 select_board();
369
370 strcpy(txx9_system_type, txx9_board_vec->system);
371
372 txx9_board_vec->prom_init();
373 }
374
prom_free_prom_memory(void)375 void __init prom_free_prom_memory(void)
376 {
377 unsigned long saddr = PAGE_SIZE;
378 unsigned long eaddr = __pa_symbol(&_text);
379
380 if (saddr < eaddr)
381 free_init_pages("prom memory", saddr, eaddr);
382 }
383
get_system_type(void)384 const char *get_system_type(void)
385 {
386 return txx9_system_type;
387 }
388
prom_getenv(const char * name)389 const char *__init prom_getenv(const char *name)
390 {
391 const s32 *str;
392
393 if (fw_arg2 < CKSEG0)
394 return NULL;
395
396 str = (const s32 *)fw_arg2;
397 /* YAMON style ("name", "value" pairs) */
398 while (str[0] && str[1]) {
399 if (!strcmp((const char *)(unsigned long)str[0], name))
400 return (const char *)(unsigned long)str[1];
401 str += 2;
402 }
403 return NULL;
404 }
405
txx9_machine_halt(void)406 static void __noreturn txx9_machine_halt(void)
407 {
408 local_irq_disable();
409 clear_c0_status(ST0_IM);
410 while (1) {
411 if (cpu_wait) {
412 (*cpu_wait)();
413 if (cpu_has_counter) {
414 /*
415 * Clear counter interrupt while it
416 * breaks WAIT instruction even if
417 * masked.
418 */
419 write_c0_compare(0);
420 }
421 }
422 }
423 }
424
425 /* Watchdog support */
txx9_wdt_init(unsigned long base)426 void __init txx9_wdt_init(unsigned long base)
427 {
428 struct resource res = {
429 .start = base,
430 .end = base + 0x100 - 1,
431 .flags = IORESOURCE_MEM,
432 };
433 platform_device_register_simple("txx9wdt", -1, &res, 1);
434 }
435
txx9_wdt_now(unsigned long base)436 void txx9_wdt_now(unsigned long base)
437 {
438 struct txx9_tmr_reg __iomem *tmrptr =
439 ioremap(base, sizeof(struct txx9_tmr_reg));
440 /* disable watch dog timer */
441 __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
442 __raw_writel(0, &tmrptr->tcr);
443 /* kick watchdog */
444 __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
445 __raw_writel(1, &tmrptr->cpra); /* immediate */
446 __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
447 &tmrptr->tcr);
448 }
449
450 /* SPI support */
txx9_spi_init(int busid,unsigned long base,int irq)451 void __init txx9_spi_init(int busid, unsigned long base, int irq)
452 {
453 struct resource res[] = {
454 {
455 .start = base,
456 .end = base + 0x20 - 1,
457 .flags = IORESOURCE_MEM,
458 }, {
459 .start = irq,
460 .flags = IORESOURCE_IRQ,
461 },
462 };
463 platform_device_register_simple("spi_txx9", busid,
464 res, ARRAY_SIZE(res));
465 }
466
txx9_ethaddr_init(unsigned int id,unsigned char * ethaddr)467 void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
468 {
469 struct platform_device *pdev =
470 platform_device_alloc("tc35815-mac", id);
471 if (!pdev ||
472 platform_device_add_data(pdev, ethaddr, 6) ||
473 platform_device_add(pdev))
474 platform_device_put(pdev);
475 }
476
txx9_sio_init(unsigned long baseaddr,int irq,unsigned int line,unsigned int sclk,int nocts)477 void __init txx9_sio_init(unsigned long baseaddr, int irq,
478 unsigned int line, unsigned int sclk, int nocts)
479 {
480 #ifdef CONFIG_SERIAL_TXX9
481 struct uart_port req;
482
483 memset(&req, 0, sizeof(req));
484 req.line = line;
485 req.iotype = UPIO_MEM;
486 req.membase = ioremap(baseaddr, 0x24);
487 req.mapbase = baseaddr;
488 req.irq = irq;
489 if (!nocts)
490 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
491 if (sclk) {
492 req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
493 req.uartclk = sclk;
494 } else
495 req.uartclk = TXX9_IMCLK;
496 early_serial_txx9_setup(&req);
497 #endif /* CONFIG_SERIAL_TXX9 */
498 }
499
500 #ifdef CONFIG_EARLY_PRINTK
null_prom_putchar(char c)501 static void null_prom_putchar(char c)
502 {
503 }
504 void (*txx9_prom_putchar)(char c) = null_prom_putchar;
505
prom_putchar(char c)506 void prom_putchar(char c)
507 {
508 txx9_prom_putchar(c);
509 }
510
511 static void __iomem *early_txx9_sio_port;
512
early_txx9_sio_putchar(char c)513 static void early_txx9_sio_putchar(char c)
514 {
515 #define TXX9_SICISR 0x0c
516 #define TXX9_SITFIFO 0x1c
517 #define TXX9_SICISR_TXALS 0x00000002
518 while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
519 TXX9_SICISR_TXALS))
520 ;
521 __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
522 }
523
txx9_sio_putchar_init(unsigned long baseaddr)524 void __init txx9_sio_putchar_init(unsigned long baseaddr)
525 {
526 early_txx9_sio_port = ioremap(baseaddr, 0x24);
527 txx9_prom_putchar = early_txx9_sio_putchar;
528 }
529 #endif /* CONFIG_EARLY_PRINTK */
530
531 /* wrappers */
plat_mem_setup(void)532 void __init plat_mem_setup(void)
533 {
534 ioport_resource.start = 0;
535 ioport_resource.end = ~0UL; /* no limit */
536 iomem_resource.start = 0;
537 iomem_resource.end = ~0UL; /* no limit */
538
539 /* fallback restart/halt routines */
540 _machine_restart = (void (*)(char *))txx9_machine_halt;
541 _machine_halt = txx9_machine_halt;
542 pm_power_off = txx9_machine_halt;
543
544 #ifdef CONFIG_PCI
545 pcibios_plat_setup = txx9_pcibios_setup;
546 #endif
547 txx9_board_vec->mem_setup();
548 }
549
arch_init_irq(void)550 void __init arch_init_irq(void)
551 {
552 txx9_board_vec->irq_setup();
553 }
554
plat_time_init(void)555 void __init plat_time_init(void)
556 {
557 #ifdef CONFIG_CPU_TX49XX
558 mips_hpt_frequency = txx9_cpu_clock / 2;
559 #endif
560 txx9_board_vec->time_init();
561 }
562
_txx9_arch_init(void)563 static int __init _txx9_arch_init(void)
564 {
565 if (txx9_board_vec->arch_init)
566 txx9_board_vec->arch_init();
567 return 0;
568 }
569 arch_initcall(_txx9_arch_init);
570
_txx9_device_init(void)571 static int __init _txx9_device_init(void)
572 {
573 if (txx9_board_vec->device_init)
574 txx9_board_vec->device_init();
575 return 0;
576 }
577 device_initcall(_txx9_device_init);
578
579 int (*txx9_irq_dispatch)(int pending);
plat_irq_dispatch(void)580 asmlinkage void plat_irq_dispatch(void)
581 {
582 int pending = read_c0_status() & read_c0_cause() & ST0_IM;
583 int irq = txx9_irq_dispatch(pending);
584
585 if (likely(irq >= 0))
586 do_IRQ(irq);
587 else
588 spurious_interrupt();
589 }
590
591 /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
592 #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
__swizzle_addr_none(unsigned long port)593 static unsigned long __swizzle_addr_none(unsigned long port)
594 {
595 return port;
596 }
597 unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
598 EXPORT_SYMBOL(__swizzle_addr_b);
599 #endif
600
601 #ifdef NEEDS_TXX9_IOSWABW
ioswabw_default(volatile u16 * a,u16 x)602 static u16 ioswabw_default(volatile u16 *a, u16 x)
603 {
604 return le16_to_cpu(x);
605 }
__mem_ioswabw_default(volatile u16 * a,u16 x)606 static u16 __mem_ioswabw_default(volatile u16 *a, u16 x)
607 {
608 return x;
609 }
610 u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default;
611 EXPORT_SYMBOL(ioswabw);
612 u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default;
613 EXPORT_SYMBOL(__mem_ioswabw);
614 #endif
615
txx9_physmap_flash_init(int no,unsigned long addr,unsigned long size,const struct physmap_flash_data * pdata)616 void __init txx9_physmap_flash_init(int no, unsigned long addr,
617 unsigned long size,
618 const struct physmap_flash_data *pdata)
619 {
620 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
621 struct resource res = {
622 .start = addr,
623 .end = addr + size - 1,
624 .flags = IORESOURCE_MEM,
625 };
626 struct platform_device *pdev;
627 static struct mtd_partition parts[2];
628 struct physmap_flash_data pdata_part;
629
630 /* If this area contained boot area, make separate partition */
631 if (pdata->nr_parts == 0 && !pdata->parts &&
632 addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
633 !parts[0].name) {
634 parts[0].name = "boot";
635 parts[0].offset = 0x1fc00000 - addr;
636 parts[0].size = addr + size - 0x1fc00000;
637 parts[1].name = "user";
638 parts[1].offset = 0;
639 parts[1].size = 0x1fc00000 - addr;
640 pdata_part = *pdata;
641 pdata_part.nr_parts = ARRAY_SIZE(parts);
642 pdata_part.parts = parts;
643 pdata = &pdata_part;
644 }
645
646 pdev = platform_device_alloc("physmap-flash", no);
647 if (!pdev ||
648 platform_device_add_resources(pdev, &res, 1) ||
649 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
650 platform_device_add(pdev))
651 platform_device_put(pdev);
652 #endif
653 }
654
txx9_ndfmc_init(unsigned long baseaddr,const struct txx9ndfmc_platform_data * pdata)655 void __init txx9_ndfmc_init(unsigned long baseaddr,
656 const struct txx9ndfmc_platform_data *pdata)
657 {
658 #if IS_ENABLED(CONFIG_MTD_NAND_TXX9NDFMC)
659 struct resource res = {
660 .start = baseaddr,
661 .end = baseaddr + 0x1000 - 1,
662 .flags = IORESOURCE_MEM,
663 };
664 struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1);
665
666 if (!pdev ||
667 platform_device_add_resources(pdev, &res, 1) ||
668 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
669 platform_device_add(pdev))
670 platform_device_put(pdev);
671 #endif
672 }
673
674 #if IS_ENABLED(CONFIG_LEDS_GPIO)
675 static DEFINE_SPINLOCK(txx9_iocled_lock);
676
677 #define TXX9_IOCLED_MAXLEDS 8
678
679 struct txx9_iocled_data {
680 struct gpio_chip chip;
681 u8 cur_val;
682 void __iomem *mmioaddr;
683 struct gpio_led_platform_data pdata;
684 struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
685 char names[TXX9_IOCLED_MAXLEDS][32];
686 };
687
txx9_iocled_get(struct gpio_chip * chip,unsigned int offset)688 static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
689 {
690 struct txx9_iocled_data *data =
691 container_of(chip, struct txx9_iocled_data, chip);
692 return data->cur_val & (1 << offset);
693 }
694
txx9_iocled_set(struct gpio_chip * chip,unsigned int offset,int value)695 static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
696 int value)
697 {
698 struct txx9_iocled_data *data =
699 container_of(chip, struct txx9_iocled_data, chip);
700 unsigned long flags;
701 spin_lock_irqsave(&txx9_iocled_lock, flags);
702 if (value)
703 data->cur_val |= 1 << offset;
704 else
705 data->cur_val &= ~(1 << offset);
706 writeb(data->cur_val, data->mmioaddr);
707 mmiowb();
708 spin_unlock_irqrestore(&txx9_iocled_lock, flags);
709 }
710
txx9_iocled_dir_in(struct gpio_chip * chip,unsigned int offset)711 static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
712 {
713 return 0;
714 }
715
txx9_iocled_dir_out(struct gpio_chip * chip,unsigned int offset,int value)716 static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
717 int value)
718 {
719 txx9_iocled_set(chip, offset, value);
720 return 0;
721 }
722
txx9_iocled_init(unsigned long baseaddr,int basenum,unsigned int num,int lowactive,const char * color,char ** deftriggers)723 void __init txx9_iocled_init(unsigned long baseaddr,
724 int basenum, unsigned int num, int lowactive,
725 const char *color, char **deftriggers)
726 {
727 struct txx9_iocled_data *iocled;
728 struct platform_device *pdev;
729 int i;
730 static char *default_triggers[] __initdata = {
731 "heartbeat",
732 "ide-disk",
733 "nand-disk",
734 NULL,
735 };
736
737 if (!deftriggers)
738 deftriggers = default_triggers;
739 iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
740 if (!iocled)
741 return;
742 iocled->mmioaddr = ioremap(baseaddr, 1);
743 if (!iocled->mmioaddr)
744 goto out_free;
745 iocled->chip.get = txx9_iocled_get;
746 iocled->chip.set = txx9_iocled_set;
747 iocled->chip.direction_input = txx9_iocled_dir_in;
748 iocled->chip.direction_output = txx9_iocled_dir_out;
749 iocled->chip.label = "iocled";
750 iocled->chip.base = basenum;
751 iocled->chip.ngpio = num;
752 if (gpiochip_add(&iocled->chip))
753 goto out_unmap;
754 if (basenum < 0)
755 basenum = iocled->chip.base;
756
757 pdev = platform_device_alloc("leds-gpio", basenum);
758 if (!pdev)
759 goto out_gpio;
760 iocled->pdata.num_leds = num;
761 iocled->pdata.leds = iocled->leds;
762 for (i = 0; i < num; i++) {
763 struct gpio_led *led = &iocled->leds[i];
764 snprintf(iocled->names[i], sizeof(iocled->names[i]),
765 "iocled:%s:%u", color, i);
766 led->name = iocled->names[i];
767 led->gpio = basenum + i;
768 led->active_low = lowactive;
769 if (deftriggers && *deftriggers)
770 led->default_trigger = *deftriggers++;
771 }
772 pdev->dev.platform_data = &iocled->pdata;
773 if (platform_device_add(pdev))
774 goto out_pdev;
775 return;
776
777 out_pdev:
778 platform_device_put(pdev);
779 out_gpio:
780 gpiochip_remove(&iocled->chip);
781 out_unmap:
782 iounmap(iocled->mmioaddr);
783 out_free:
784 kfree(iocled);
785 }
786 #else /* CONFIG_LEDS_GPIO */
txx9_iocled_init(unsigned long baseaddr,int basenum,unsigned int num,int lowactive,const char * color,char ** deftriggers)787 void __init txx9_iocled_init(unsigned long baseaddr,
788 int basenum, unsigned int num, int lowactive,
789 const char *color, char **deftriggers)
790 {
791 }
792 #endif /* CONFIG_LEDS_GPIO */
793
txx9_dmac_init(int id,unsigned long baseaddr,int irq,const struct txx9dmac_platform_data * pdata)794 void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
795 const struct txx9dmac_platform_data *pdata)
796 {
797 #if IS_ENABLED(CONFIG_TXX9_DMAC)
798 struct resource res[] = {
799 {
800 .start = baseaddr,
801 .end = baseaddr + 0x800 - 1,
802 .flags = IORESOURCE_MEM,
803 #ifndef CONFIG_MACH_TX49XX
804 }, {
805 .start = irq,
806 .flags = IORESOURCE_IRQ,
807 #endif
808 }
809 };
810 #ifdef CONFIG_MACH_TX49XX
811 struct resource chan_res[] = {
812 {
813 .flags = IORESOURCE_IRQ,
814 }
815 };
816 #endif
817 struct platform_device *pdev = platform_device_alloc("txx9dmac", id);
818 struct txx9dmac_chan_platform_data cpdata;
819 int i;
820
821 if (!pdev ||
822 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
823 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
824 platform_device_add(pdev)) {
825 platform_device_put(pdev);
826 return;
827 }
828 memset(&cpdata, 0, sizeof(cpdata));
829 cpdata.dmac_dev = pdev;
830 for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) {
831 #ifdef CONFIG_MACH_TX49XX
832 chan_res[0].start = irq + i;
833 #endif
834 pdev = platform_device_alloc("txx9dmac-chan",
835 id * TXX9_DMA_MAX_NR_CHANNELS + i);
836 if (!pdev ||
837 #ifdef CONFIG_MACH_TX49XX
838 platform_device_add_resources(pdev, chan_res,
839 ARRAY_SIZE(chan_res)) ||
840 #endif
841 platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) ||
842 platform_device_add(pdev))
843 platform_device_put(pdev);
844 }
845 #endif
846 }
847
txx9_aclc_init(unsigned long baseaddr,int irq,unsigned int dmac_id,unsigned int dma_chan_out,unsigned int dma_chan_in)848 void __init txx9_aclc_init(unsigned long baseaddr, int irq,
849 unsigned int dmac_id,
850 unsigned int dma_chan_out,
851 unsigned int dma_chan_in)
852 {
853 #if IS_ENABLED(CONFIG_SND_SOC_TXX9ACLC)
854 unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS;
855 struct resource res[] = {
856 {
857 .start = baseaddr,
858 .end = baseaddr + 0x100 - 1,
859 .flags = IORESOURCE_MEM,
860 }, {
861 .start = irq,
862 .flags = IORESOURCE_IRQ,
863 }, {
864 .name = "txx9dmac-chan",
865 .start = dma_base + dma_chan_out,
866 .flags = IORESOURCE_DMA,
867 }, {
868 .name = "txx9dmac-chan",
869 .start = dma_base + dma_chan_in,
870 .flags = IORESOURCE_DMA,
871 }
872 };
873 struct platform_device *pdev =
874 platform_device_alloc("txx9aclc-ac97", -1);
875
876 if (!pdev ||
877 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
878 platform_device_add(pdev))
879 platform_device_put(pdev);
880 #endif
881 }
882
883 static struct bus_type txx9_sramc_subsys = {
884 .name = "txx9_sram",
885 .dev_name = "txx9_sram",
886 };
887
888 struct txx9_sramc_dev {
889 struct device dev;
890 struct bin_attribute bindata_attr;
891 void __iomem *base;
892 };
893
txx9_sram_read(struct file * filp,struct kobject * kobj,struct bin_attribute * bin_attr,char * buf,loff_t pos,size_t size)894 static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj,
895 struct bin_attribute *bin_attr,
896 char *buf, loff_t pos, size_t size)
897 {
898 struct txx9_sramc_dev *dev = bin_attr->private;
899 size_t ramsize = bin_attr->size;
900
901 if (pos >= ramsize)
902 return 0;
903 if (pos + size > ramsize)
904 size = ramsize - pos;
905 memcpy_fromio(buf, dev->base + pos, size);
906 return size;
907 }
908
txx9_sram_write(struct file * filp,struct kobject * kobj,struct bin_attribute * bin_attr,char * buf,loff_t pos,size_t size)909 static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj,
910 struct bin_attribute *bin_attr,
911 char *buf, loff_t pos, size_t size)
912 {
913 struct txx9_sramc_dev *dev = bin_attr->private;
914 size_t ramsize = bin_attr->size;
915
916 if (pos >= ramsize)
917 return 0;
918 if (pos + size > ramsize)
919 size = ramsize - pos;
920 memcpy_toio(dev->base + pos, buf, size);
921 return size;
922 }
923
txx9_device_release(struct device * dev)924 static void txx9_device_release(struct device *dev)
925 {
926 struct txx9_sramc_dev *tdev;
927
928 tdev = container_of(dev, struct txx9_sramc_dev, dev);
929 kfree(tdev);
930 }
931
txx9_sramc_init(struct resource * r)932 void __init txx9_sramc_init(struct resource *r)
933 {
934 struct txx9_sramc_dev *dev;
935 size_t size;
936 int err;
937
938 err = subsys_system_register(&txx9_sramc_subsys, NULL);
939 if (err)
940 return;
941 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
942 if (!dev)
943 return;
944 size = resource_size(r);
945 dev->base = ioremap(r->start, size);
946 if (!dev->base) {
947 kfree(dev);
948 return;
949 }
950 dev->dev.release = &txx9_device_release;
951 dev->dev.bus = &txx9_sramc_subsys;
952 sysfs_bin_attr_init(&dev->bindata_attr);
953 dev->bindata_attr.attr.name = "bindata";
954 dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
955 dev->bindata_attr.read = txx9_sram_read;
956 dev->bindata_attr.write = txx9_sram_write;
957 dev->bindata_attr.size = size;
958 dev->bindata_attr.private = dev;
959 err = device_register(&dev->dev);
960 if (err)
961 goto exit_put;
962 err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr);
963 if (err) {
964 iounmap(dev->base);
965 device_unregister(&dev->dev);
966 }
967 return;
968 exit_put:
969 iounmap(dev->base);
970 put_device(&dev->dev);
971 }
972