1 /*
2 * udc.c - ChipIdea UDC driver
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/delay.h>
14 #include <linux/device.h>
15 #include <linux/dmapool.h>
16 #include <linux/err.h>
17 #include <linux/irqreturn.h>
18 #include <linux/kernel.h>
19 #include <linux/slab.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/usb/ch9.h>
22 #include <linux/usb/gadget.h>
23 #include <linux/usb/otg-fsm.h>
24 #include <linux/usb/chipidea.h>
25
26 #include "ci.h"
27 #include "udc.h"
28 #include "bits.h"
29 #include "debug.h"
30 #include "otg.h"
31 #include "otg_fsm.h"
32
33 /* control endpoint description */
34 static const struct usb_endpoint_descriptor
35 ctrl_endpt_out_desc = {
36 .bLength = USB_DT_ENDPOINT_SIZE,
37 .bDescriptorType = USB_DT_ENDPOINT,
38
39 .bEndpointAddress = USB_DIR_OUT,
40 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
41 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
42 };
43
44 static const struct usb_endpoint_descriptor
45 ctrl_endpt_in_desc = {
46 .bLength = USB_DT_ENDPOINT_SIZE,
47 .bDescriptorType = USB_DT_ENDPOINT,
48
49 .bEndpointAddress = USB_DIR_IN,
50 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
51 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
52 };
53
54 /**
55 * hw_ep_bit: calculates the bit number
56 * @num: endpoint number
57 * @dir: endpoint direction
58 *
59 * This function returns bit number
60 */
hw_ep_bit(int num,int dir)61 static inline int hw_ep_bit(int num, int dir)
62 {
63 return num + (dir ? 16 : 0);
64 }
65
ep_to_bit(struct ci_hdrc * ci,int n)66 static inline int ep_to_bit(struct ci_hdrc *ci, int n)
67 {
68 int fill = 16 - ci->hw_ep_max / 2;
69
70 if (n >= ci->hw_ep_max / 2)
71 n += fill;
72
73 return n;
74 }
75
76 /**
77 * hw_device_state: enables/disables interrupts (execute without interruption)
78 * @dma: 0 => disable, !0 => enable and set dma engine
79 *
80 * This function returns an error code
81 */
hw_device_state(struct ci_hdrc * ci,u32 dma)82 static int hw_device_state(struct ci_hdrc *ci, u32 dma)
83 {
84 if (dma) {
85 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
86 /* interrupt, error, port change, reset, sleep/suspend */
87 hw_write(ci, OP_USBINTR, ~0,
88 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
89 } else {
90 hw_write(ci, OP_USBINTR, ~0, 0);
91 }
92 return 0;
93 }
94
95 /**
96 * hw_ep_flush: flush endpoint fifo (execute without interruption)
97 * @num: endpoint number
98 * @dir: endpoint direction
99 *
100 * This function returns an error code
101 */
hw_ep_flush(struct ci_hdrc * ci,int num,int dir)102 static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
103 {
104 int n = hw_ep_bit(num, dir);
105
106 do {
107 /* flush any pending transfer */
108 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
109 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
110 cpu_relax();
111 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
112
113 return 0;
114 }
115
116 /**
117 * hw_ep_disable: disables endpoint (execute without interruption)
118 * @num: endpoint number
119 * @dir: endpoint direction
120 *
121 * This function returns an error code
122 */
hw_ep_disable(struct ci_hdrc * ci,int num,int dir)123 static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
124 {
125 hw_ep_flush(ci, num, dir);
126 hw_write(ci, OP_ENDPTCTRL + num,
127 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
128 return 0;
129 }
130
131 /**
132 * hw_ep_enable: enables endpoint (execute without interruption)
133 * @num: endpoint number
134 * @dir: endpoint direction
135 * @type: endpoint type
136 *
137 * This function returns an error code
138 */
hw_ep_enable(struct ci_hdrc * ci,int num,int dir,int type)139 static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
140 {
141 u32 mask, data;
142
143 if (dir) {
144 mask = ENDPTCTRL_TXT; /* type */
145 data = type << __ffs(mask);
146
147 mask |= ENDPTCTRL_TXS; /* unstall */
148 mask |= ENDPTCTRL_TXR; /* reset data toggle */
149 data |= ENDPTCTRL_TXR;
150 mask |= ENDPTCTRL_TXE; /* enable */
151 data |= ENDPTCTRL_TXE;
152 } else {
153 mask = ENDPTCTRL_RXT; /* type */
154 data = type << __ffs(mask);
155
156 mask |= ENDPTCTRL_RXS; /* unstall */
157 mask |= ENDPTCTRL_RXR; /* reset data toggle */
158 data |= ENDPTCTRL_RXR;
159 mask |= ENDPTCTRL_RXE; /* enable */
160 data |= ENDPTCTRL_RXE;
161 }
162 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
163 return 0;
164 }
165
166 /**
167 * hw_ep_get_halt: return endpoint halt status
168 * @num: endpoint number
169 * @dir: endpoint direction
170 *
171 * This function returns 1 if endpoint halted
172 */
hw_ep_get_halt(struct ci_hdrc * ci,int num,int dir)173 static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
174 {
175 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
176
177 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
178 }
179
180 /**
181 * hw_ep_prime: primes endpoint (execute without interruption)
182 * @num: endpoint number
183 * @dir: endpoint direction
184 * @is_ctrl: true if control endpoint
185 *
186 * This function returns an error code
187 */
hw_ep_prime(struct ci_hdrc * ci,int num,int dir,int is_ctrl)188 static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
189 {
190 int n = hw_ep_bit(num, dir);
191
192 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
193 return -EAGAIN;
194
195 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
196
197 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
198 cpu_relax();
199 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
200 return -EAGAIN;
201
202 /* status shoult be tested according with manual but it doesn't work */
203 return 0;
204 }
205
206 /**
207 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
208 * without interruption)
209 * @num: endpoint number
210 * @dir: endpoint direction
211 * @value: true => stall, false => unstall
212 *
213 * This function returns an error code
214 */
hw_ep_set_halt(struct ci_hdrc * ci,int num,int dir,int value)215 static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
216 {
217 if (value != 0 && value != 1)
218 return -EINVAL;
219
220 do {
221 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
222 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
223 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
224
225 /* data toggle - reserved for EP0 but it's in ESS */
226 hw_write(ci, reg, mask_xs|mask_xr,
227 value ? mask_xs : mask_xr);
228 } while (value != hw_ep_get_halt(ci, num, dir));
229
230 return 0;
231 }
232
233 /**
234 * hw_is_port_high_speed: test if port is high speed
235 *
236 * This function returns true if high speed port
237 */
hw_port_is_high_speed(struct ci_hdrc * ci)238 static int hw_port_is_high_speed(struct ci_hdrc *ci)
239 {
240 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
241 hw_read(ci, OP_PORTSC, PORTSC_HSP);
242 }
243
244 /**
245 * hw_test_and_clear_complete: test & clear complete status (execute without
246 * interruption)
247 * @n: endpoint number
248 *
249 * This function returns complete status
250 */
hw_test_and_clear_complete(struct ci_hdrc * ci,int n)251 static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
252 {
253 n = ep_to_bit(ci, n);
254 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
255 }
256
257 /**
258 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
259 * without interruption)
260 *
261 * This function returns active interrutps
262 */
hw_test_and_clear_intr_active(struct ci_hdrc * ci)263 static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
264 {
265 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
266
267 hw_write(ci, OP_USBSTS, ~0, reg);
268 return reg;
269 }
270
271 /**
272 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
273 * interruption)
274 *
275 * This function returns guard value
276 */
hw_test_and_clear_setup_guard(struct ci_hdrc * ci)277 static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
278 {
279 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
280 }
281
282 /**
283 * hw_test_and_set_setup_guard: test & set setup guard (execute without
284 * interruption)
285 *
286 * This function returns guard value
287 */
hw_test_and_set_setup_guard(struct ci_hdrc * ci)288 static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
289 {
290 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
291 }
292
293 /**
294 * hw_usb_set_address: configures USB address (execute without interruption)
295 * @value: new USB address
296 *
297 * This function explicitly sets the address, without the "USBADRA" (advance)
298 * feature, which is not supported by older versions of the controller.
299 */
hw_usb_set_address(struct ci_hdrc * ci,u8 value)300 static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
301 {
302 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
303 value << __ffs(DEVICEADDR_USBADR));
304 }
305
306 /**
307 * hw_usb_reset: restart device after a bus reset (execute without
308 * interruption)
309 *
310 * This function returns an error code
311 */
hw_usb_reset(struct ci_hdrc * ci)312 static int hw_usb_reset(struct ci_hdrc *ci)
313 {
314 hw_usb_set_address(ci, 0);
315
316 /* ESS flushes only at end?!? */
317 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
318
319 /* clear setup token semaphores */
320 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
321
322 /* clear complete status */
323 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
324
325 /* wait until all bits cleared */
326 while (hw_read(ci, OP_ENDPTPRIME, ~0))
327 udelay(10); /* not RTOS friendly */
328
329 /* reset all endpoints ? */
330
331 /* reset internal status and wait for further instructions
332 no need to verify the port reset status (ESS does it) */
333
334 return 0;
335 }
336
337 /******************************************************************************
338 * UTIL block
339 *****************************************************************************/
340
add_td_to_list(struct ci_hw_ep * hwep,struct ci_hw_req * hwreq,unsigned length)341 static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
342 unsigned length)
343 {
344 int i;
345 u32 temp;
346 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
347 GFP_ATOMIC);
348
349 if (node == NULL)
350 return -ENOMEM;
351
352 node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC,
353 &node->dma);
354 if (node->ptr == NULL) {
355 kfree(node);
356 return -ENOMEM;
357 }
358
359 memset(node->ptr, 0, sizeof(struct ci_hw_td));
360 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
361 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
362 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
363 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
364 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
365
366 if (hwreq->req.length == 0
367 || hwreq->req.length % hwep->ep.maxpacket)
368 mul++;
369 node->ptr->token |= mul << __ffs(TD_MULTO);
370 }
371
372 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
373 if (length) {
374 node->ptr->page[0] = cpu_to_le32(temp);
375 for (i = 1; i < TD_PAGE_COUNT; i++) {
376 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
377 page &= ~TD_RESERVED_MASK;
378 node->ptr->page[i] = cpu_to_le32(page);
379 }
380 }
381
382 hwreq->req.actual += length;
383
384 if (!list_empty(&hwreq->tds)) {
385 /* get the last entry */
386 lastnode = list_entry(hwreq->tds.prev,
387 struct td_node, td);
388 lastnode->ptr->next = cpu_to_le32(node->dma);
389 }
390
391 INIT_LIST_HEAD(&node->td);
392 list_add_tail(&node->td, &hwreq->tds);
393
394 return 0;
395 }
396
397 /**
398 * _usb_addr: calculates endpoint address from direction & number
399 * @ep: endpoint
400 */
_usb_addr(struct ci_hw_ep * ep)401 static inline u8 _usb_addr(struct ci_hw_ep *ep)
402 {
403 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
404 }
405
406 /**
407 * _hardware_queue: configures a request at hardware level
408 * @gadget: gadget
409 * @hwep: endpoint
410 *
411 * This function returns an error code
412 */
_hardware_enqueue(struct ci_hw_ep * hwep,struct ci_hw_req * hwreq)413 static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
414 {
415 struct ci_hdrc *ci = hwep->ci;
416 int ret = 0;
417 unsigned rest = hwreq->req.length;
418 int pages = TD_PAGE_COUNT;
419 struct td_node *firstnode, *lastnode;
420
421 /* don't queue twice */
422 if (hwreq->req.status == -EALREADY)
423 return -EALREADY;
424
425 hwreq->req.status = -EALREADY;
426
427 ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
428 if (ret)
429 return ret;
430
431 /*
432 * The first buffer could be not page aligned.
433 * In that case we have to span into one extra td.
434 */
435 if (hwreq->req.dma % PAGE_SIZE)
436 pages--;
437
438 if (rest == 0)
439 add_td_to_list(hwep, hwreq, 0);
440
441 while (rest > 0) {
442 unsigned count = min(hwreq->req.length - hwreq->req.actual,
443 (unsigned)(pages * CI_HDRC_PAGE_SIZE));
444 add_td_to_list(hwep, hwreq, count);
445 rest -= count;
446 }
447
448 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
449 && (hwreq->req.length % hwep->ep.maxpacket == 0))
450 add_td_to_list(hwep, hwreq, 0);
451
452 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
453
454 lastnode = list_entry(hwreq->tds.prev,
455 struct td_node, td);
456
457 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
458 if (!hwreq->req.no_interrupt)
459 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
460 wmb();
461
462 hwreq->req.actual = 0;
463 if (!list_empty(&hwep->qh.queue)) {
464 struct ci_hw_req *hwreqprev;
465 int n = hw_ep_bit(hwep->num, hwep->dir);
466 int tmp_stat;
467 struct td_node *prevlastnode;
468 u32 next = firstnode->dma & TD_ADDR_MASK;
469
470 hwreqprev = list_entry(hwep->qh.queue.prev,
471 struct ci_hw_req, queue);
472 prevlastnode = list_entry(hwreqprev->tds.prev,
473 struct td_node, td);
474
475 prevlastnode->ptr->next = cpu_to_le32(next);
476 wmb();
477 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
478 goto done;
479 do {
480 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
481 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
482 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
483 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
484 if (tmp_stat)
485 goto done;
486 }
487
488 /* QH configuration */
489 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
490 hwep->qh.ptr->td.token &=
491 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
492
493 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
494 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
495
496 if (hwreq->req.length == 0
497 || hwreq->req.length % hwep->ep.maxpacket)
498 mul++;
499 hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
500 }
501
502 wmb(); /* synchronize before ep prime */
503
504 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
505 hwep->type == USB_ENDPOINT_XFER_CONTROL);
506 done:
507 return ret;
508 }
509
510 /*
511 * free_pending_td: remove a pending request for the endpoint
512 * @hwep: endpoint
513 */
free_pending_td(struct ci_hw_ep * hwep)514 static void free_pending_td(struct ci_hw_ep *hwep)
515 {
516 struct td_node *pending = hwep->pending_td;
517
518 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
519 hwep->pending_td = NULL;
520 kfree(pending);
521 }
522
reprime_dtd(struct ci_hdrc * ci,struct ci_hw_ep * hwep,struct td_node * node)523 static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
524 struct td_node *node)
525 {
526 hwep->qh.ptr->td.next = node->dma;
527 hwep->qh.ptr->td.token &=
528 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
529
530 /* Synchronize before ep prime */
531 wmb();
532
533 return hw_ep_prime(ci, hwep->num, hwep->dir,
534 hwep->type == USB_ENDPOINT_XFER_CONTROL);
535 }
536
537 /**
538 * _hardware_dequeue: handles a request at hardware level
539 * @gadget: gadget
540 * @hwep: endpoint
541 *
542 * This function returns an error code
543 */
_hardware_dequeue(struct ci_hw_ep * hwep,struct ci_hw_req * hwreq)544 static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
545 {
546 u32 tmptoken;
547 struct td_node *node, *tmpnode;
548 unsigned remaining_length;
549 unsigned actual = hwreq->req.length;
550 struct ci_hdrc *ci = hwep->ci;
551
552 if (hwreq->req.status != -EALREADY)
553 return -EINVAL;
554
555 hwreq->req.status = 0;
556
557 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
558 tmptoken = le32_to_cpu(node->ptr->token);
559 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
560 int n = hw_ep_bit(hwep->num, hwep->dir);
561
562 if (ci->rev == CI_REVISION_24)
563 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
564 reprime_dtd(ci, hwep, node);
565 hwreq->req.status = -EALREADY;
566 return -EBUSY;
567 }
568
569 remaining_length = (tmptoken & TD_TOTAL_BYTES);
570 remaining_length >>= __ffs(TD_TOTAL_BYTES);
571 actual -= remaining_length;
572
573 hwreq->req.status = tmptoken & TD_STATUS;
574 if ((TD_STATUS_HALTED & hwreq->req.status)) {
575 hwreq->req.status = -EPIPE;
576 break;
577 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
578 hwreq->req.status = -EPROTO;
579 break;
580 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
581 hwreq->req.status = -EILSEQ;
582 break;
583 }
584
585 if (remaining_length) {
586 if (hwep->dir) {
587 hwreq->req.status = -EPROTO;
588 break;
589 }
590 }
591 /*
592 * As the hardware could still address the freed td
593 * which will run the udc unusable, the cleanup of the
594 * td has to be delayed by one.
595 */
596 if (hwep->pending_td)
597 free_pending_td(hwep);
598
599 hwep->pending_td = node;
600 list_del_init(&node->td);
601 }
602
603 usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
604
605 hwreq->req.actual += actual;
606
607 if (hwreq->req.status)
608 return hwreq->req.status;
609
610 return hwreq->req.actual;
611 }
612
613 /**
614 * _ep_nuke: dequeues all endpoint requests
615 * @hwep: endpoint
616 *
617 * This function returns an error code
618 * Caller must hold lock
619 */
_ep_nuke(struct ci_hw_ep * hwep)620 static int _ep_nuke(struct ci_hw_ep *hwep)
621 __releases(hwep->lock)
622 __acquires(hwep->lock)
623 {
624 struct td_node *node, *tmpnode;
625 if (hwep == NULL)
626 return -EINVAL;
627
628 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
629
630 while (!list_empty(&hwep->qh.queue)) {
631
632 /* pop oldest request */
633 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
634 struct ci_hw_req, queue);
635
636 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
637 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
638 list_del_init(&node->td);
639 node->ptr = NULL;
640 kfree(node);
641 }
642
643 list_del_init(&hwreq->queue);
644 hwreq->req.status = -ESHUTDOWN;
645
646 if (hwreq->req.complete != NULL) {
647 spin_unlock(hwep->lock);
648 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
649 spin_lock(hwep->lock);
650 }
651 }
652
653 if (hwep->pending_td)
654 free_pending_td(hwep);
655
656 return 0;
657 }
658
_ep_set_halt(struct usb_ep * ep,int value,bool check_transfer)659 static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
660 {
661 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
662 int direction, retval = 0;
663 unsigned long flags;
664
665 if (ep == NULL || hwep->ep.desc == NULL)
666 return -EINVAL;
667
668 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
669 return -EOPNOTSUPP;
670
671 spin_lock_irqsave(hwep->lock, flags);
672
673 if (value && hwep->dir == TX && check_transfer &&
674 !list_empty(&hwep->qh.queue) &&
675 !usb_endpoint_xfer_control(hwep->ep.desc)) {
676 spin_unlock_irqrestore(hwep->lock, flags);
677 return -EAGAIN;
678 }
679
680 direction = hwep->dir;
681 do {
682 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
683
684 if (!value)
685 hwep->wedge = 0;
686
687 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
688 hwep->dir = (hwep->dir == TX) ? RX : TX;
689
690 } while (hwep->dir != direction);
691
692 spin_unlock_irqrestore(hwep->lock, flags);
693 return retval;
694 }
695
696
697 /**
698 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
699 * @gadget: gadget
700 *
701 * This function returns an error code
702 */
_gadget_stop_activity(struct usb_gadget * gadget)703 static int _gadget_stop_activity(struct usb_gadget *gadget)
704 {
705 struct usb_ep *ep;
706 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
707 unsigned long flags;
708
709 spin_lock_irqsave(&ci->lock, flags);
710 ci->gadget.speed = USB_SPEED_UNKNOWN;
711 ci->remote_wakeup = 0;
712 ci->suspended = 0;
713 spin_unlock_irqrestore(&ci->lock, flags);
714
715 /* flush all endpoints */
716 gadget_for_each_ep(ep, gadget) {
717 usb_ep_fifo_flush(ep);
718 }
719 usb_ep_fifo_flush(&ci->ep0out->ep);
720 usb_ep_fifo_flush(&ci->ep0in->ep);
721
722 /* make sure to disable all endpoints */
723 gadget_for_each_ep(ep, gadget) {
724 usb_ep_disable(ep);
725 }
726
727 if (ci->status != NULL) {
728 usb_ep_free_request(&ci->ep0in->ep, ci->status);
729 ci->status = NULL;
730 }
731
732 return 0;
733 }
734
735 /******************************************************************************
736 * ISR block
737 *****************************************************************************/
738 /**
739 * isr_reset_handler: USB reset interrupt handler
740 * @ci: UDC device
741 *
742 * This function resets USB engine after a bus reset occurred
743 */
isr_reset_handler(struct ci_hdrc * ci)744 static void isr_reset_handler(struct ci_hdrc *ci)
745 __releases(ci->lock)
746 __acquires(ci->lock)
747 {
748 int retval;
749
750 spin_unlock(&ci->lock);
751 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
752 usb_gadget_udc_reset(&ci->gadget, ci->driver);
753
754 retval = _gadget_stop_activity(&ci->gadget);
755 if (retval)
756 goto done;
757
758 retval = hw_usb_reset(ci);
759 if (retval)
760 goto done;
761
762 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
763 if (ci->status == NULL)
764 retval = -ENOMEM;
765
766 done:
767 spin_lock(&ci->lock);
768
769 if (retval)
770 dev_err(ci->dev, "error: %i\n", retval);
771 }
772
773 /**
774 * isr_get_status_complete: get_status request complete function
775 * @ep: endpoint
776 * @req: request handled
777 *
778 * Caller must release lock
779 */
isr_get_status_complete(struct usb_ep * ep,struct usb_request * req)780 static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
781 {
782 if (ep == NULL || req == NULL)
783 return;
784
785 kfree(req->buf);
786 usb_ep_free_request(ep, req);
787 }
788
789 /**
790 * _ep_queue: queues (submits) an I/O request to an endpoint
791 *
792 * Caller must hold lock
793 */
_ep_queue(struct usb_ep * ep,struct usb_request * req,gfp_t __maybe_unused gfp_flags)794 static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
795 gfp_t __maybe_unused gfp_flags)
796 {
797 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
798 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
799 struct ci_hdrc *ci = hwep->ci;
800 int retval = 0;
801
802 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
803 return -EINVAL;
804
805 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
806 if (req->length)
807 hwep = (ci->ep0_dir == RX) ?
808 ci->ep0out : ci->ep0in;
809 if (!list_empty(&hwep->qh.queue)) {
810 _ep_nuke(hwep);
811 retval = -EOVERFLOW;
812 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
813 _usb_addr(hwep));
814 }
815 }
816
817 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
818 hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
819 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
820 return -EMSGSIZE;
821 }
822
823 /* first nuke then test link, e.g. previous status has not sent */
824 if (!list_empty(&hwreq->queue)) {
825 dev_err(hwep->ci->dev, "request already in queue\n");
826 return -EBUSY;
827 }
828
829 /* push request */
830 hwreq->req.status = -EINPROGRESS;
831 hwreq->req.actual = 0;
832
833 retval = _hardware_enqueue(hwep, hwreq);
834
835 if (retval == -EALREADY)
836 retval = 0;
837 if (!retval)
838 list_add_tail(&hwreq->queue, &hwep->qh.queue);
839
840 return retval;
841 }
842
843 /**
844 * isr_get_status_response: get_status request response
845 * @ci: ci struct
846 * @setup: setup request packet
847 *
848 * This function returns an error code
849 */
isr_get_status_response(struct ci_hdrc * ci,struct usb_ctrlrequest * setup)850 static int isr_get_status_response(struct ci_hdrc *ci,
851 struct usb_ctrlrequest *setup)
852 __releases(hwep->lock)
853 __acquires(hwep->lock)
854 {
855 struct ci_hw_ep *hwep = ci->ep0in;
856 struct usb_request *req = NULL;
857 gfp_t gfp_flags = GFP_ATOMIC;
858 int dir, num, retval;
859
860 if (hwep == NULL || setup == NULL)
861 return -EINVAL;
862
863 spin_unlock(hwep->lock);
864 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
865 spin_lock(hwep->lock);
866 if (req == NULL)
867 return -ENOMEM;
868
869 req->complete = isr_get_status_complete;
870 req->length = 2;
871 req->buf = kzalloc(req->length, gfp_flags);
872 if (req->buf == NULL) {
873 retval = -ENOMEM;
874 goto err_free_req;
875 }
876
877 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
878 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
879 ci->gadget.is_selfpowered;
880 } else if ((setup->bRequestType & USB_RECIP_MASK) \
881 == USB_RECIP_ENDPOINT) {
882 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
883 TX : RX;
884 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
885 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
886 }
887 /* else do nothing; reserved for future use */
888
889 retval = _ep_queue(&hwep->ep, req, gfp_flags);
890 if (retval)
891 goto err_free_buf;
892
893 return 0;
894
895 err_free_buf:
896 kfree(req->buf);
897 err_free_req:
898 spin_unlock(hwep->lock);
899 usb_ep_free_request(&hwep->ep, req);
900 spin_lock(hwep->lock);
901 return retval;
902 }
903
904 /**
905 * isr_setup_status_complete: setup_status request complete function
906 * @ep: endpoint
907 * @req: request handled
908 *
909 * Caller must release lock. Put the port in test mode if test mode
910 * feature is selected.
911 */
912 static void
isr_setup_status_complete(struct usb_ep * ep,struct usb_request * req)913 isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
914 {
915 struct ci_hdrc *ci = req->context;
916 unsigned long flags;
917
918 if (ci->setaddr) {
919 hw_usb_set_address(ci, ci->address);
920 ci->setaddr = false;
921 if (ci->address)
922 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
923 }
924
925 spin_lock_irqsave(&ci->lock, flags);
926 if (ci->test_mode)
927 hw_port_test_set(ci, ci->test_mode);
928 spin_unlock_irqrestore(&ci->lock, flags);
929 }
930
931 /**
932 * isr_setup_status_phase: queues the status phase of a setup transation
933 * @ci: ci struct
934 *
935 * This function returns an error code
936 */
isr_setup_status_phase(struct ci_hdrc * ci)937 static int isr_setup_status_phase(struct ci_hdrc *ci)
938 {
939 int retval;
940 struct ci_hw_ep *hwep;
941
942 /*
943 * Unexpected USB controller behavior, caused by bad signal integrity
944 * or ground reference problems, can lead to isr_setup_status_phase
945 * being called with ci->status equal to NULL.
946 * If this situation occurs, you should review your USB hardware design.
947 */
948 if (WARN_ON_ONCE(!ci->status))
949 return -EPIPE;
950
951 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
952 ci->status->context = ci;
953 ci->status->complete = isr_setup_status_complete;
954
955 retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
956
957 return retval;
958 }
959
960 /**
961 * isr_tr_complete_low: transaction complete low level handler
962 * @hwep: endpoint
963 *
964 * This function returns an error code
965 * Caller must hold lock
966 */
isr_tr_complete_low(struct ci_hw_ep * hwep)967 static int isr_tr_complete_low(struct ci_hw_ep *hwep)
968 __releases(hwep->lock)
969 __acquires(hwep->lock)
970 {
971 struct ci_hw_req *hwreq, *hwreqtemp;
972 struct ci_hw_ep *hweptemp = hwep;
973 int retval = 0;
974
975 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
976 queue) {
977 retval = _hardware_dequeue(hwep, hwreq);
978 if (retval < 0)
979 break;
980 list_del_init(&hwreq->queue);
981 if (hwreq->req.complete != NULL) {
982 spin_unlock(hwep->lock);
983 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
984 hwreq->req.length)
985 hweptemp = hwep->ci->ep0in;
986 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
987 spin_lock(hwep->lock);
988 }
989 }
990
991 if (retval == -EBUSY)
992 retval = 0;
993
994 return retval;
995 }
996
otg_a_alt_hnp_support(struct ci_hdrc * ci)997 static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
998 {
999 dev_warn(&ci->gadget.dev,
1000 "connect the device to an alternate port if you want HNP\n");
1001 return isr_setup_status_phase(ci);
1002 }
1003
1004 /**
1005 * isr_setup_packet_handler: setup packet handler
1006 * @ci: UDC descriptor
1007 *
1008 * This function handles setup packet
1009 */
isr_setup_packet_handler(struct ci_hdrc * ci)1010 static void isr_setup_packet_handler(struct ci_hdrc *ci)
1011 __releases(ci->lock)
1012 __acquires(ci->lock)
1013 {
1014 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1015 struct usb_ctrlrequest req;
1016 int type, num, dir, err = -EINVAL;
1017 u8 tmode = 0;
1018
1019 /*
1020 * Flush data and handshake transactions of previous
1021 * setup packet.
1022 */
1023 _ep_nuke(ci->ep0out);
1024 _ep_nuke(ci->ep0in);
1025
1026 /* read_setup_packet */
1027 do {
1028 hw_test_and_set_setup_guard(ci);
1029 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1030 } while (!hw_test_and_clear_setup_guard(ci));
1031
1032 type = req.bRequestType;
1033
1034 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1035
1036 switch (req.bRequest) {
1037 case USB_REQ_CLEAR_FEATURE:
1038 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1039 le16_to_cpu(req.wValue) ==
1040 USB_ENDPOINT_HALT) {
1041 if (req.wLength != 0)
1042 break;
1043 num = le16_to_cpu(req.wIndex);
1044 dir = num & USB_ENDPOINT_DIR_MASK;
1045 num &= USB_ENDPOINT_NUMBER_MASK;
1046 if (dir) /* TX */
1047 num += ci->hw_ep_max / 2;
1048 if (!ci->ci_hw_ep[num].wedge) {
1049 spin_unlock(&ci->lock);
1050 err = usb_ep_clear_halt(
1051 &ci->ci_hw_ep[num].ep);
1052 spin_lock(&ci->lock);
1053 if (err)
1054 break;
1055 }
1056 err = isr_setup_status_phase(ci);
1057 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1058 le16_to_cpu(req.wValue) ==
1059 USB_DEVICE_REMOTE_WAKEUP) {
1060 if (req.wLength != 0)
1061 break;
1062 ci->remote_wakeup = 0;
1063 err = isr_setup_status_phase(ci);
1064 } else {
1065 goto delegate;
1066 }
1067 break;
1068 case USB_REQ_GET_STATUS:
1069 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
1070 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1071 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1072 goto delegate;
1073 if (le16_to_cpu(req.wLength) != 2 ||
1074 le16_to_cpu(req.wValue) != 0)
1075 break;
1076 err = isr_get_status_response(ci, &req);
1077 break;
1078 case USB_REQ_SET_ADDRESS:
1079 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1080 goto delegate;
1081 if (le16_to_cpu(req.wLength) != 0 ||
1082 le16_to_cpu(req.wIndex) != 0)
1083 break;
1084 ci->address = (u8)le16_to_cpu(req.wValue);
1085 ci->setaddr = true;
1086 err = isr_setup_status_phase(ci);
1087 break;
1088 case USB_REQ_SET_FEATURE:
1089 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1090 le16_to_cpu(req.wValue) ==
1091 USB_ENDPOINT_HALT) {
1092 if (req.wLength != 0)
1093 break;
1094 num = le16_to_cpu(req.wIndex);
1095 dir = num & USB_ENDPOINT_DIR_MASK;
1096 num &= USB_ENDPOINT_NUMBER_MASK;
1097 if (dir) /* TX */
1098 num += ci->hw_ep_max / 2;
1099
1100 spin_unlock(&ci->lock);
1101 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1102 spin_lock(&ci->lock);
1103 if (!err)
1104 isr_setup_status_phase(ci);
1105 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1106 if (req.wLength != 0)
1107 break;
1108 switch (le16_to_cpu(req.wValue)) {
1109 case USB_DEVICE_REMOTE_WAKEUP:
1110 ci->remote_wakeup = 1;
1111 err = isr_setup_status_phase(ci);
1112 break;
1113 case USB_DEVICE_TEST_MODE:
1114 tmode = le16_to_cpu(req.wIndex) >> 8;
1115 switch (tmode) {
1116 case TEST_J:
1117 case TEST_K:
1118 case TEST_SE0_NAK:
1119 case TEST_PACKET:
1120 case TEST_FORCE_EN:
1121 ci->test_mode = tmode;
1122 err = isr_setup_status_phase(
1123 ci);
1124 break;
1125 default:
1126 break;
1127 }
1128 break;
1129 case USB_DEVICE_B_HNP_ENABLE:
1130 if (ci_otg_is_fsm_mode(ci)) {
1131 ci->gadget.b_hnp_enable = 1;
1132 err = isr_setup_status_phase(
1133 ci);
1134 }
1135 break;
1136 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1137 if (ci_otg_is_fsm_mode(ci))
1138 err = otg_a_alt_hnp_support(ci);
1139 break;
1140 case USB_DEVICE_A_HNP_SUPPORT:
1141 if (ci_otg_is_fsm_mode(ci)) {
1142 ci->gadget.a_hnp_support = 1;
1143 err = isr_setup_status_phase(
1144 ci);
1145 }
1146 break;
1147 default:
1148 goto delegate;
1149 }
1150 } else {
1151 goto delegate;
1152 }
1153 break;
1154 default:
1155 delegate:
1156 if (req.wLength == 0) /* no data phase */
1157 ci->ep0_dir = TX;
1158
1159 spin_unlock(&ci->lock);
1160 err = ci->driver->setup(&ci->gadget, &req);
1161 spin_lock(&ci->lock);
1162 break;
1163 }
1164
1165 if (err < 0) {
1166 spin_unlock(&ci->lock);
1167 if (_ep_set_halt(&hwep->ep, 1, false))
1168 dev_err(ci->dev, "error: _ep_set_halt\n");
1169 spin_lock(&ci->lock);
1170 }
1171 }
1172
1173 /**
1174 * isr_tr_complete_handler: transaction complete interrupt handler
1175 * @ci: UDC descriptor
1176 *
1177 * This function handles traffic events
1178 */
isr_tr_complete_handler(struct ci_hdrc * ci)1179 static void isr_tr_complete_handler(struct ci_hdrc *ci)
1180 __releases(ci->lock)
1181 __acquires(ci->lock)
1182 {
1183 unsigned i;
1184 int err;
1185
1186 for (i = 0; i < ci->hw_ep_max; i++) {
1187 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1188
1189 if (hwep->ep.desc == NULL)
1190 continue; /* not configured */
1191
1192 if (hw_test_and_clear_complete(ci, i)) {
1193 err = isr_tr_complete_low(hwep);
1194 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1195 if (err > 0) /* needs status phase */
1196 err = isr_setup_status_phase(ci);
1197 if (err < 0) {
1198 spin_unlock(&ci->lock);
1199 if (_ep_set_halt(&hwep->ep, 1, false))
1200 dev_err(ci->dev,
1201 "error: _ep_set_halt\n");
1202 spin_lock(&ci->lock);
1203 }
1204 }
1205 }
1206
1207 /* Only handle setup packet below */
1208 if (i == 0 &&
1209 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1210 isr_setup_packet_handler(ci);
1211 }
1212 }
1213
1214 /******************************************************************************
1215 * ENDPT block
1216 *****************************************************************************/
1217 /**
1218 * ep_enable: configure endpoint, making it usable
1219 *
1220 * Check usb_ep_enable() at "usb_gadget.h" for details
1221 */
ep_enable(struct usb_ep * ep,const struct usb_endpoint_descriptor * desc)1222 static int ep_enable(struct usb_ep *ep,
1223 const struct usb_endpoint_descriptor *desc)
1224 {
1225 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1226 int retval = 0;
1227 unsigned long flags;
1228 u32 cap = 0;
1229
1230 if (ep == NULL || desc == NULL)
1231 return -EINVAL;
1232
1233 spin_lock_irqsave(hwep->lock, flags);
1234
1235 /* only internal SW should enable ctrl endpts */
1236
1237 if (!list_empty(&hwep->qh.queue)) {
1238 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1239 spin_unlock_irqrestore(hwep->lock, flags);
1240 return -EBUSY;
1241 }
1242
1243 hwep->ep.desc = desc;
1244
1245 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1246 hwep->num = usb_endpoint_num(desc);
1247 hwep->type = usb_endpoint_type(desc);
1248
1249 hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
1250 hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
1251
1252 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1253 cap |= QH_IOS;
1254
1255 cap |= QH_ZLT;
1256 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1257 /*
1258 * For ISO-TX, we set mult at QH as the largest value, and use
1259 * MultO at TD as real mult value.
1260 */
1261 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1262 cap |= 3 << __ffs(QH_MULT);
1263
1264 hwep->qh.ptr->cap = cpu_to_le32(cap);
1265
1266 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1267
1268 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1269 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1270 retval = -EINVAL;
1271 }
1272
1273 /*
1274 * Enable endpoints in the HW other than ep0 as ep0
1275 * is always enabled
1276 */
1277 if (hwep->num)
1278 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1279 hwep->type);
1280
1281 spin_unlock_irqrestore(hwep->lock, flags);
1282 return retval;
1283 }
1284
1285 /**
1286 * ep_disable: endpoint is no longer usable
1287 *
1288 * Check usb_ep_disable() at "usb_gadget.h" for details
1289 */
ep_disable(struct usb_ep * ep)1290 static int ep_disable(struct usb_ep *ep)
1291 {
1292 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1293 int direction, retval = 0;
1294 unsigned long flags;
1295
1296 if (ep == NULL)
1297 return -EINVAL;
1298 else if (hwep->ep.desc == NULL)
1299 return -EBUSY;
1300
1301 spin_lock_irqsave(hwep->lock, flags);
1302
1303 /* only internal SW should disable ctrl endpts */
1304
1305 direction = hwep->dir;
1306 do {
1307 retval |= _ep_nuke(hwep);
1308 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1309
1310 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1311 hwep->dir = (hwep->dir == TX) ? RX : TX;
1312
1313 } while (hwep->dir != direction);
1314
1315 hwep->ep.desc = NULL;
1316
1317 spin_unlock_irqrestore(hwep->lock, flags);
1318 return retval;
1319 }
1320
1321 /**
1322 * ep_alloc_request: allocate a request object to use with this endpoint
1323 *
1324 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1325 */
ep_alloc_request(struct usb_ep * ep,gfp_t gfp_flags)1326 static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1327 {
1328 struct ci_hw_req *hwreq = NULL;
1329
1330 if (ep == NULL)
1331 return NULL;
1332
1333 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1334 if (hwreq != NULL) {
1335 INIT_LIST_HEAD(&hwreq->queue);
1336 INIT_LIST_HEAD(&hwreq->tds);
1337 }
1338
1339 return (hwreq == NULL) ? NULL : &hwreq->req;
1340 }
1341
1342 /**
1343 * ep_free_request: frees a request object
1344 *
1345 * Check usb_ep_free_request() at "usb_gadget.h" for details
1346 */
ep_free_request(struct usb_ep * ep,struct usb_request * req)1347 static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1348 {
1349 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1350 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1351 struct td_node *node, *tmpnode;
1352 unsigned long flags;
1353
1354 if (ep == NULL || req == NULL) {
1355 return;
1356 } else if (!list_empty(&hwreq->queue)) {
1357 dev_err(hwep->ci->dev, "freeing queued request\n");
1358 return;
1359 }
1360
1361 spin_lock_irqsave(hwep->lock, flags);
1362
1363 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1364 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1365 list_del_init(&node->td);
1366 node->ptr = NULL;
1367 kfree(node);
1368 }
1369
1370 kfree(hwreq);
1371
1372 spin_unlock_irqrestore(hwep->lock, flags);
1373 }
1374
1375 /**
1376 * ep_queue: queues (submits) an I/O request to an endpoint
1377 *
1378 * Check usb_ep_queue()* at usb_gadget.h" for details
1379 */
ep_queue(struct usb_ep * ep,struct usb_request * req,gfp_t __maybe_unused gfp_flags)1380 static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1381 gfp_t __maybe_unused gfp_flags)
1382 {
1383 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1384 int retval = 0;
1385 unsigned long flags;
1386
1387 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1388 return -EINVAL;
1389
1390 spin_lock_irqsave(hwep->lock, flags);
1391 retval = _ep_queue(ep, req, gfp_flags);
1392 spin_unlock_irqrestore(hwep->lock, flags);
1393 return retval;
1394 }
1395
1396 /**
1397 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1398 *
1399 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1400 */
ep_dequeue(struct usb_ep * ep,struct usb_request * req)1401 static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1402 {
1403 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1404 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1405 unsigned long flags;
1406 struct td_node *node, *tmpnode;
1407
1408 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1409 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1410 list_empty(&hwep->qh.queue))
1411 return -EINVAL;
1412
1413 spin_lock_irqsave(hwep->lock, flags);
1414
1415 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1416
1417 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1418 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1419 list_del(&node->td);
1420 kfree(node);
1421 }
1422
1423 /* pop request */
1424 list_del_init(&hwreq->queue);
1425
1426 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1427
1428 req->status = -ECONNRESET;
1429
1430 if (hwreq->req.complete != NULL) {
1431 spin_unlock(hwep->lock);
1432 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1433 spin_lock(hwep->lock);
1434 }
1435
1436 spin_unlock_irqrestore(hwep->lock, flags);
1437 return 0;
1438 }
1439
1440 /**
1441 * ep_set_halt: sets the endpoint halt feature
1442 *
1443 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1444 */
ep_set_halt(struct usb_ep * ep,int value)1445 static int ep_set_halt(struct usb_ep *ep, int value)
1446 {
1447 return _ep_set_halt(ep, value, true);
1448 }
1449
1450 /**
1451 * ep_set_wedge: sets the halt feature and ignores clear requests
1452 *
1453 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1454 */
ep_set_wedge(struct usb_ep * ep)1455 static int ep_set_wedge(struct usb_ep *ep)
1456 {
1457 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1458 unsigned long flags;
1459
1460 if (ep == NULL || hwep->ep.desc == NULL)
1461 return -EINVAL;
1462
1463 spin_lock_irqsave(hwep->lock, flags);
1464 hwep->wedge = 1;
1465 spin_unlock_irqrestore(hwep->lock, flags);
1466
1467 return usb_ep_set_halt(ep);
1468 }
1469
1470 /**
1471 * ep_fifo_flush: flushes contents of a fifo
1472 *
1473 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1474 */
ep_fifo_flush(struct usb_ep * ep)1475 static void ep_fifo_flush(struct usb_ep *ep)
1476 {
1477 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1478 unsigned long flags;
1479
1480 if (ep == NULL) {
1481 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1482 return;
1483 }
1484
1485 spin_lock_irqsave(hwep->lock, flags);
1486
1487 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1488
1489 spin_unlock_irqrestore(hwep->lock, flags);
1490 }
1491
1492 /**
1493 * Endpoint-specific part of the API to the USB controller hardware
1494 * Check "usb_gadget.h" for details
1495 */
1496 static const struct usb_ep_ops usb_ep_ops = {
1497 .enable = ep_enable,
1498 .disable = ep_disable,
1499 .alloc_request = ep_alloc_request,
1500 .free_request = ep_free_request,
1501 .queue = ep_queue,
1502 .dequeue = ep_dequeue,
1503 .set_halt = ep_set_halt,
1504 .set_wedge = ep_set_wedge,
1505 .fifo_flush = ep_fifo_flush,
1506 };
1507
1508 /******************************************************************************
1509 * GADGET block
1510 *****************************************************************************/
ci_udc_vbus_session(struct usb_gadget * _gadget,int is_active)1511 static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1512 {
1513 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1514 unsigned long flags;
1515 int gadget_ready = 0;
1516
1517 spin_lock_irqsave(&ci->lock, flags);
1518 ci->vbus_active = is_active;
1519 if (ci->driver)
1520 gadget_ready = 1;
1521 spin_unlock_irqrestore(&ci->lock, flags);
1522
1523 if (gadget_ready) {
1524 if (is_active) {
1525 pm_runtime_get_sync(&_gadget->dev);
1526 hw_device_reset(ci);
1527 hw_device_state(ci, ci->ep0out->qh.dma);
1528 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1529 usb_udc_vbus_handler(_gadget, true);
1530 } else {
1531 usb_udc_vbus_handler(_gadget, false);
1532 if (ci->driver)
1533 ci->driver->disconnect(&ci->gadget);
1534 hw_device_state(ci, 0);
1535 if (ci->platdata->notify_event)
1536 ci->platdata->notify_event(ci,
1537 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1538 _gadget_stop_activity(&ci->gadget);
1539 pm_runtime_put_sync(&_gadget->dev);
1540 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1541 }
1542 }
1543
1544 return 0;
1545 }
1546
ci_udc_wakeup(struct usb_gadget * _gadget)1547 static int ci_udc_wakeup(struct usb_gadget *_gadget)
1548 {
1549 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1550 unsigned long flags;
1551 int ret = 0;
1552
1553 spin_lock_irqsave(&ci->lock, flags);
1554 if (!ci->remote_wakeup) {
1555 ret = -EOPNOTSUPP;
1556 goto out;
1557 }
1558 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1559 ret = -EINVAL;
1560 goto out;
1561 }
1562 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1563 out:
1564 spin_unlock_irqrestore(&ci->lock, flags);
1565 return ret;
1566 }
1567
ci_udc_vbus_draw(struct usb_gadget * _gadget,unsigned ma)1568 static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1569 {
1570 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1571
1572 if (ci->usb_phy)
1573 return usb_phy_set_power(ci->usb_phy, ma);
1574 return -ENOTSUPP;
1575 }
1576
ci_udc_selfpowered(struct usb_gadget * _gadget,int is_on)1577 static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1578 {
1579 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1580 struct ci_hw_ep *hwep = ci->ep0in;
1581 unsigned long flags;
1582
1583 spin_lock_irqsave(hwep->lock, flags);
1584 _gadget->is_selfpowered = (is_on != 0);
1585 spin_unlock_irqrestore(hwep->lock, flags);
1586
1587 return 0;
1588 }
1589
1590 /* Change Data+ pullup status
1591 * this func is used by usb_gadget_connect/disconnet
1592 */
ci_udc_pullup(struct usb_gadget * _gadget,int is_on)1593 static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1594 {
1595 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1596
1597 /*
1598 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1599 * and don't touch Data+ in host mode for dual role config.
1600 */
1601 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1602 return 0;
1603
1604 pm_runtime_get_sync(&ci->gadget.dev);
1605 if (is_on)
1606 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1607 else
1608 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1609 pm_runtime_put_sync(&ci->gadget.dev);
1610
1611 return 0;
1612 }
1613
1614 static int ci_udc_start(struct usb_gadget *gadget,
1615 struct usb_gadget_driver *driver);
1616 static int ci_udc_stop(struct usb_gadget *gadget);
1617
1618 /* Match ISOC IN from the highest endpoint */
ci_udc_match_ep(struct usb_gadget * gadget,struct usb_endpoint_descriptor * desc,struct usb_ss_ep_comp_descriptor * comp_desc)1619 static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
1620 struct usb_endpoint_descriptor *desc,
1621 struct usb_ss_ep_comp_descriptor *comp_desc)
1622 {
1623 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1624 struct usb_ep *ep;
1625
1626 if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
1627 list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
1628 if (ep->caps.dir_in && !ep->claimed)
1629 return ep;
1630 }
1631 }
1632
1633 return NULL;
1634 }
1635
1636 /**
1637 * Device operations part of the API to the USB controller hardware,
1638 * which don't involve endpoints (or i/o)
1639 * Check "usb_gadget.h" for details
1640 */
1641 static const struct usb_gadget_ops usb_gadget_ops = {
1642 .vbus_session = ci_udc_vbus_session,
1643 .wakeup = ci_udc_wakeup,
1644 .set_selfpowered = ci_udc_selfpowered,
1645 .pullup = ci_udc_pullup,
1646 .vbus_draw = ci_udc_vbus_draw,
1647 .udc_start = ci_udc_start,
1648 .udc_stop = ci_udc_stop,
1649 .match_ep = ci_udc_match_ep,
1650 };
1651
init_eps(struct ci_hdrc * ci)1652 static int init_eps(struct ci_hdrc *ci)
1653 {
1654 int retval = 0, i, j;
1655
1656 for (i = 0; i < ci->hw_ep_max/2; i++)
1657 for (j = RX; j <= TX; j++) {
1658 int k = i + j * ci->hw_ep_max/2;
1659 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1660
1661 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1662 (j == TX) ? "in" : "out");
1663
1664 hwep->ci = ci;
1665 hwep->lock = &ci->lock;
1666 hwep->td_pool = ci->td_pool;
1667
1668 hwep->ep.name = hwep->name;
1669 hwep->ep.ops = &usb_ep_ops;
1670
1671 if (i == 0) {
1672 hwep->ep.caps.type_control = true;
1673 } else {
1674 hwep->ep.caps.type_iso = true;
1675 hwep->ep.caps.type_bulk = true;
1676 hwep->ep.caps.type_int = true;
1677 }
1678
1679 if (j == TX)
1680 hwep->ep.caps.dir_in = true;
1681 else
1682 hwep->ep.caps.dir_out = true;
1683
1684 /*
1685 * for ep0: maxP defined in desc, for other
1686 * eps, maxP is set by epautoconfig() called
1687 * by gadget layer
1688 */
1689 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1690
1691 INIT_LIST_HEAD(&hwep->qh.queue);
1692 hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
1693 &hwep->qh.dma);
1694 if (hwep->qh.ptr == NULL)
1695 retval = -ENOMEM;
1696 else
1697 memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
1698
1699 /*
1700 * set up shorthands for ep0 out and in endpoints,
1701 * don't add to gadget's ep_list
1702 */
1703 if (i == 0) {
1704 if (j == RX)
1705 ci->ep0out = hwep;
1706 else
1707 ci->ep0in = hwep;
1708
1709 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1710 continue;
1711 }
1712
1713 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1714 }
1715
1716 return retval;
1717 }
1718
destroy_eps(struct ci_hdrc * ci)1719 static void destroy_eps(struct ci_hdrc *ci)
1720 {
1721 int i;
1722
1723 for (i = 0; i < ci->hw_ep_max; i++) {
1724 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1725
1726 if (hwep->pending_td)
1727 free_pending_td(hwep);
1728 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1729 }
1730 }
1731
1732 /**
1733 * ci_udc_start: register a gadget driver
1734 * @gadget: our gadget
1735 * @driver: the driver being registered
1736 *
1737 * Interrupts are enabled here.
1738 */
ci_udc_start(struct usb_gadget * gadget,struct usb_gadget_driver * driver)1739 static int ci_udc_start(struct usb_gadget *gadget,
1740 struct usb_gadget_driver *driver)
1741 {
1742 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1743 unsigned long flags;
1744 int retval = -ENOMEM;
1745
1746 if (driver->disconnect == NULL)
1747 return -EINVAL;
1748
1749
1750 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1751 retval = usb_ep_enable(&ci->ep0out->ep);
1752 if (retval)
1753 return retval;
1754
1755 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1756 retval = usb_ep_enable(&ci->ep0in->ep);
1757 if (retval)
1758 return retval;
1759
1760 ci->driver = driver;
1761
1762 /* Start otg fsm for B-device */
1763 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1764 ci_hdrc_otg_fsm_start(ci);
1765 return retval;
1766 }
1767
1768 pm_runtime_get_sync(&ci->gadget.dev);
1769 if (ci->vbus_active) {
1770 spin_lock_irqsave(&ci->lock, flags);
1771 hw_device_reset(ci);
1772 } else {
1773 usb_udc_vbus_handler(&ci->gadget, false);
1774 pm_runtime_put_sync(&ci->gadget.dev);
1775 return retval;
1776 }
1777
1778 retval = hw_device_state(ci, ci->ep0out->qh.dma);
1779 spin_unlock_irqrestore(&ci->lock, flags);
1780 if (retval)
1781 pm_runtime_put_sync(&ci->gadget.dev);
1782
1783 return retval;
1784 }
1785
ci_udc_stop_for_otg_fsm(struct ci_hdrc * ci)1786 static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1787 {
1788 if (!ci_otg_is_fsm_mode(ci))
1789 return;
1790
1791 mutex_lock(&ci->fsm.lock);
1792 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1793 ci->fsm.a_bidl_adis_tmout = 1;
1794 ci_hdrc_otg_fsm_start(ci);
1795 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1796 ci->fsm.protocol = PROTO_UNDEF;
1797 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1798 }
1799 mutex_unlock(&ci->fsm.lock);
1800 }
1801
1802 /**
1803 * ci_udc_stop: unregister a gadget driver
1804 */
ci_udc_stop(struct usb_gadget * gadget)1805 static int ci_udc_stop(struct usb_gadget *gadget)
1806 {
1807 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1808 unsigned long flags;
1809
1810 spin_lock_irqsave(&ci->lock, flags);
1811
1812 if (ci->vbus_active) {
1813 hw_device_state(ci, 0);
1814 if (ci->platdata->notify_event)
1815 ci->platdata->notify_event(ci,
1816 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1817 spin_unlock_irqrestore(&ci->lock, flags);
1818 _gadget_stop_activity(&ci->gadget);
1819 spin_lock_irqsave(&ci->lock, flags);
1820 pm_runtime_put(&ci->gadget.dev);
1821 }
1822
1823 ci->driver = NULL;
1824 spin_unlock_irqrestore(&ci->lock, flags);
1825
1826 ci_udc_stop_for_otg_fsm(ci);
1827 return 0;
1828 }
1829
1830 /******************************************************************************
1831 * BUS block
1832 *****************************************************************************/
1833 /**
1834 * udc_irq: ci interrupt handler
1835 *
1836 * This function returns IRQ_HANDLED if the IRQ has been handled
1837 * It locks access to registers
1838 */
udc_irq(struct ci_hdrc * ci)1839 static irqreturn_t udc_irq(struct ci_hdrc *ci)
1840 {
1841 irqreturn_t retval;
1842 u32 intr;
1843
1844 if (ci == NULL)
1845 return IRQ_HANDLED;
1846
1847 spin_lock(&ci->lock);
1848
1849 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
1850 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
1851 USBMODE_CM_DC) {
1852 spin_unlock(&ci->lock);
1853 return IRQ_NONE;
1854 }
1855 }
1856 intr = hw_test_and_clear_intr_active(ci);
1857
1858 if (intr) {
1859 /* order defines priority - do NOT change it */
1860 if (USBi_URI & intr)
1861 isr_reset_handler(ci);
1862
1863 if (USBi_PCI & intr) {
1864 ci->gadget.speed = hw_port_is_high_speed(ci) ?
1865 USB_SPEED_HIGH : USB_SPEED_FULL;
1866 if (ci->suspended && ci->driver->resume) {
1867 spin_unlock(&ci->lock);
1868 ci->driver->resume(&ci->gadget);
1869 spin_lock(&ci->lock);
1870 ci->suspended = 0;
1871 }
1872 }
1873
1874 if (USBi_UI & intr)
1875 isr_tr_complete_handler(ci);
1876
1877 if (USBi_SLI & intr) {
1878 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1879 ci->driver->suspend) {
1880 ci->suspended = 1;
1881 spin_unlock(&ci->lock);
1882 ci->driver->suspend(&ci->gadget);
1883 usb_gadget_set_state(&ci->gadget,
1884 USB_STATE_SUSPENDED);
1885 spin_lock(&ci->lock);
1886 }
1887 }
1888 retval = IRQ_HANDLED;
1889 } else {
1890 retval = IRQ_NONE;
1891 }
1892 spin_unlock(&ci->lock);
1893
1894 return retval;
1895 }
1896
1897 /**
1898 * udc_start: initialize gadget role
1899 * @ci: chipidea controller
1900 */
udc_start(struct ci_hdrc * ci)1901 static int udc_start(struct ci_hdrc *ci)
1902 {
1903 struct device *dev = ci->dev;
1904 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
1905 int retval = 0;
1906
1907 ci->gadget.ops = &usb_gadget_ops;
1908 ci->gadget.speed = USB_SPEED_UNKNOWN;
1909 ci->gadget.max_speed = USB_SPEED_HIGH;
1910 ci->gadget.name = ci->platdata->name;
1911 ci->gadget.otg_caps = otg_caps;
1912
1913 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
1914 otg_caps->adp_support))
1915 ci->gadget.is_otg = 1;
1916
1917 INIT_LIST_HEAD(&ci->gadget.ep_list);
1918
1919 /* alloc resources */
1920 ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
1921 sizeof(struct ci_hw_qh),
1922 64, CI_HDRC_PAGE_SIZE);
1923 if (ci->qh_pool == NULL)
1924 return -ENOMEM;
1925
1926 ci->td_pool = dma_pool_create("ci_hw_td", dev,
1927 sizeof(struct ci_hw_td),
1928 64, CI_HDRC_PAGE_SIZE);
1929 if (ci->td_pool == NULL) {
1930 retval = -ENOMEM;
1931 goto free_qh_pool;
1932 }
1933
1934 retval = init_eps(ci);
1935 if (retval)
1936 goto free_pools;
1937
1938 ci->gadget.ep0 = &ci->ep0in->ep;
1939
1940 retval = usb_add_gadget_udc(dev, &ci->gadget);
1941 if (retval)
1942 goto destroy_eps;
1943
1944 pm_runtime_no_callbacks(&ci->gadget.dev);
1945 pm_runtime_enable(&ci->gadget.dev);
1946
1947 return retval;
1948
1949 destroy_eps:
1950 destroy_eps(ci);
1951 free_pools:
1952 dma_pool_destroy(ci->td_pool);
1953 free_qh_pool:
1954 dma_pool_destroy(ci->qh_pool);
1955 return retval;
1956 }
1957
1958 /**
1959 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
1960 *
1961 * No interrupts active, the IRQ has been released
1962 */
ci_hdrc_gadget_destroy(struct ci_hdrc * ci)1963 void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
1964 {
1965 if (!ci->roles[CI_ROLE_GADGET])
1966 return;
1967
1968 usb_del_gadget_udc(&ci->gadget);
1969
1970 destroy_eps(ci);
1971
1972 dma_pool_destroy(ci->td_pool);
1973 dma_pool_destroy(ci->qh_pool);
1974 }
1975
udc_id_switch_for_device(struct ci_hdrc * ci)1976 static int udc_id_switch_for_device(struct ci_hdrc *ci)
1977 {
1978 if (ci->is_otg)
1979 /* Clear and enable BSV irq */
1980 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
1981 OTGSC_BSVIS | OTGSC_BSVIE);
1982
1983 return 0;
1984 }
1985
udc_id_switch_for_host(struct ci_hdrc * ci)1986 static void udc_id_switch_for_host(struct ci_hdrc *ci)
1987 {
1988 /*
1989 * host doesn't care B_SESSION_VALID event
1990 * so clear and disbale BSV irq
1991 */
1992 if (ci->is_otg)
1993 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
1994 }
1995
1996 /**
1997 * ci_hdrc_gadget_init - initialize device related bits
1998 * ci: the controller
1999 *
2000 * This function initializes the gadget, if the device is "device capable".
2001 */
ci_hdrc_gadget_init(struct ci_hdrc * ci)2002 int ci_hdrc_gadget_init(struct ci_hdrc *ci)
2003 {
2004 struct ci_role_driver *rdrv;
2005 int ret;
2006
2007 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
2008 return -ENXIO;
2009
2010 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
2011 if (!rdrv)
2012 return -ENOMEM;
2013
2014 rdrv->start = udc_id_switch_for_device;
2015 rdrv->stop = udc_id_switch_for_host;
2016 rdrv->irq = udc_irq;
2017 rdrv->name = "gadget";
2018
2019 ret = udc_start(ci);
2020 if (!ret)
2021 ci->roles[CI_ROLE_GADGET] = rdrv;
2022
2023 return ret;
2024 }
2025