1 /* 2 * Copyright IBM Corp. 1999, 2012 3 * Author(s): Hartmut Penner <hp@de.ibm.com>, 4 * Martin Schwidefsky <schwidefsky@de.ibm.com>, 5 * Denis Joseph Barrow, 6 */ 7 8 #ifndef _ASM_S390_LOWCORE_H 9 #define _ASM_S390_LOWCORE_H 10 11 #include <linux/types.h> 12 #include <asm/ptrace.h> 13 #include <asm/cpu.h> 14 #include <asm/types.h> 15 16 #define LC_ORDER 1 17 #define LC_PAGES 2 18 19 struct save_area { 20 u64 fp_regs[16]; 21 u64 gp_regs[16]; 22 u8 psw[16]; 23 u8 pad1[8]; 24 u32 pref_reg; 25 u32 fp_ctrl_reg; 26 u8 pad2[4]; 27 u32 tod_reg; 28 u64 timer; 29 u64 clk_cmp; 30 u8 pad3[8]; 31 u32 acc_regs[16]; 32 u64 ctrl_regs[16]; 33 } __packed; 34 35 struct save_area_ext { 36 struct save_area sa; 37 __vector128 vx_regs[32]; 38 }; 39 40 struct _lowcore { 41 __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */ 42 __u32 ipl_parmblock_ptr; /* 0x0014 */ 43 __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */ 44 __u32 ext_params; /* 0x0080 */ 45 __u16 ext_cpu_addr; /* 0x0084 */ 46 __u16 ext_int_code; /* 0x0086 */ 47 __u16 svc_ilc; /* 0x0088 */ 48 __u16 svc_code; /* 0x008a */ 49 __u16 pgm_ilc; /* 0x008c */ 50 __u16 pgm_code; /* 0x008e */ 51 __u32 data_exc_code; /* 0x0090 */ 52 __u16 mon_class_num; /* 0x0094 */ 53 __u8 per_code; /* 0x0096 */ 54 __u8 per_atmid; /* 0x0097 */ 55 __u64 per_address; /* 0x0098 */ 56 __u8 exc_access_id; /* 0x00a0 */ 57 __u8 per_access_id; /* 0x00a1 */ 58 __u8 op_access_id; /* 0x00a2 */ 59 __u8 ar_mode_id; /* 0x00a3 */ 60 __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */ 61 __u64 trans_exc_code; /* 0x00a8 */ 62 __u64 monitor_code; /* 0x00b0 */ 63 __u16 subchannel_id; /* 0x00b8 */ 64 __u16 subchannel_nr; /* 0x00ba */ 65 __u32 io_int_parm; /* 0x00bc */ 66 __u32 io_int_word; /* 0x00c0 */ 67 __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */ 68 __u32 stfl_fac_list; /* 0x00c8 */ 69 __u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */ 70 __u64 mcck_interruption_code; /* 0x00e8 */ 71 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */ 72 __u32 external_damage_code; /* 0x00f4 */ 73 __u64 failing_storage_address; /* 0x00f8 */ 74 __u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */ 75 __u64 breaking_event_addr; /* 0x0110 */ 76 __u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */ 77 psw_t restart_old_psw; /* 0x0120 */ 78 psw_t external_old_psw; /* 0x0130 */ 79 psw_t svc_old_psw; /* 0x0140 */ 80 psw_t program_old_psw; /* 0x0150 */ 81 psw_t mcck_old_psw; /* 0x0160 */ 82 psw_t io_old_psw; /* 0x0170 */ 83 __u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */ 84 psw_t restart_psw; /* 0x01a0 */ 85 psw_t external_new_psw; /* 0x01b0 */ 86 psw_t svc_new_psw; /* 0x01c0 */ 87 psw_t program_new_psw; /* 0x01d0 */ 88 psw_t mcck_new_psw; /* 0x01e0 */ 89 psw_t io_new_psw; /* 0x01f0 */ 90 91 /* Save areas. */ 92 __u64 save_area_sync[8]; /* 0x0200 */ 93 __u64 save_area_async[8]; /* 0x0240 */ 94 __u64 save_area_restart[1]; /* 0x0280 */ 95 96 /* CPU flags. */ 97 __u64 cpu_flags; /* 0x0288 */ 98 99 /* Return psws. */ 100 psw_t return_psw; /* 0x0290 */ 101 psw_t return_mcck_psw; /* 0x02a0 */ 102 103 /* CPU accounting and timing values. */ 104 __u64 sync_enter_timer; /* 0x02b0 */ 105 __u64 async_enter_timer; /* 0x02b8 */ 106 __u64 mcck_enter_timer; /* 0x02c0 */ 107 __u64 exit_timer; /* 0x02c8 */ 108 __u64 user_timer; /* 0x02d0 */ 109 __u64 system_timer; /* 0x02d8 */ 110 __u64 steal_timer; /* 0x02e0 */ 111 __u64 last_update_timer; /* 0x02e8 */ 112 __u64 last_update_clock; /* 0x02f0 */ 113 __u64 int_clock; /* 0x02f8 */ 114 __u64 mcck_clock; /* 0x0300 */ 115 __u64 clock_comparator; /* 0x0308 */ 116 117 /* Current process. */ 118 __u64 current_task; /* 0x0310 */ 119 __u64 thread_info; /* 0x0318 */ 120 __u64 kernel_stack; /* 0x0320 */ 121 122 /* Interrupt, panic and restart stack. */ 123 __u64 async_stack; /* 0x0328 */ 124 __u64 panic_stack; /* 0x0330 */ 125 __u64 restart_stack; /* 0x0338 */ 126 127 /* Restart function and parameter. */ 128 __u64 restart_fn; /* 0x0340 */ 129 __u64 restart_data; /* 0x0348 */ 130 __u64 restart_source; /* 0x0350 */ 131 132 /* Address space pointer. */ 133 __u64 kernel_asce; /* 0x0358 */ 134 __u64 user_asce; /* 0x0360 */ 135 136 /* 137 * The lpp and current_pid fields form a 138 * 64-bit value that is set as program 139 * parameter with the LPP instruction. 140 */ 141 __u32 lpp; /* 0x0368 */ 142 __u32 current_pid; /* 0x036c */ 143 144 /* SMP info area */ 145 __u32 cpu_nr; /* 0x0370 */ 146 __u32 softirq_pending; /* 0x0374 */ 147 __u64 percpu_offset; /* 0x0378 */ 148 __u64 vdso_per_cpu_data; /* 0x0380 */ 149 __u64 machine_flags; /* 0x0388 */ 150 __u8 pad_0x0390[0x0398-0x0390]; /* 0x0390 */ 151 __u64 gmap; /* 0x0398 */ 152 __u32 spinlock_lockval; /* 0x03a0 */ 153 __u8 pad_0x03a0[0x0400-0x03a4]; /* 0x03a4 */ 154 155 /* Per cpu primary space access list */ 156 __u32 paste[16]; /* 0x0400 */ 157 158 /* br %r1 trampoline */ 159 __u16 br_r1_trampoline; /* 0x0440 */ 160 __u8 pad_0x0442[0x0e00-0x0442]; /* 0x0442 */ 161 162 /* 163 * 0xe00 contains the address of the IPL Parameter Information 164 * block. Dump tools need IPIB for IPL after dump. 165 * Note: do not change the position of any fields in 0x0e00-0x0f00 166 */ 167 __u64 ipib; /* 0x0e00 */ 168 __u32 ipib_checksum; /* 0x0e08 */ 169 __u64 vmcore_info; /* 0x0e0c */ 170 __u8 pad_0x0e14[0x0e18-0x0e14]; /* 0x0e14 */ 171 __u64 os_info; /* 0x0e18 */ 172 __u8 pad_0x0e20[0x0f00-0x0e20]; /* 0x0e20 */ 173 174 /* Extended facility list */ 175 __u64 stfle_fac_list[16]; /* 0x0f00 */ 176 __u64 alt_stfle_fac_list[16]; /* 0x0f80 */ 177 __u8 pad_0x1000[0x11b0-0x1000]; /* 0x1000 */ 178 179 /* Pointer to vector register save area */ 180 __u64 vector_save_area_addr; /* 0x11b0 */ 181 182 /* 64 bit extparam used for pfault/diag 250: defined by architecture */ 183 __u64 ext_params2; /* 0x11B8 */ 184 __u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */ 185 186 /* CPU register save area: defined by architecture */ 187 __u64 floating_pt_save_area[16]; /* 0x1200 */ 188 __u64 gpregs_save_area[16]; /* 0x1280 */ 189 psw_t psw_save_area; /* 0x1300 */ 190 __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */ 191 __u32 prefixreg_save_area; /* 0x1318 */ 192 __u32 fpt_creg_save_area; /* 0x131c */ 193 __u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */ 194 __u32 tod_progreg_save_area; /* 0x1324 */ 195 __u32 cpu_timer_save_area[2]; /* 0x1328 */ 196 __u32 clock_comp_save_area[2]; /* 0x1330 */ 197 __u8 pad_0x1338[0x1340-0x1338]; /* 0x1338 */ 198 __u32 access_regs_save_area[16]; /* 0x1340 */ 199 __u64 cregs_save_area[16]; /* 0x1380 */ 200 __u8 pad_0x1400[0x1800-0x1400]; /* 0x1400 */ 201 202 /* Transaction abort diagnostic block */ 203 __u8 pgm_tdb[256]; /* 0x1800 */ 204 __u8 pad_0x1900[0x1c00-0x1900]; /* 0x1900 */ 205 206 /* Software defined save area for vector registers */ 207 __u8 vector_save_area[1024]; /* 0x1c00 */ 208 } __packed; 209 210 #define S390_lowcore (*((struct _lowcore *) 0)) 211 212 extern struct _lowcore *lowcore_ptr[]; 213 set_prefix(__u32 address)214static inline void set_prefix(__u32 address) 215 { 216 asm volatile("spx %0" : : "m" (address) : "memory"); 217 } 218 store_prefix(void)219static inline __u32 store_prefix(void) 220 { 221 __u32 address; 222 223 asm volatile("stpx %0" : "=m" (address)); 224 return address; 225 } 226 227 #endif /* _ASM_S390_LOWCORE_H */ 228