1 /*
2 * wm_adsp.c -- Wolfson ADSP support
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/firmware.h>
18 #include <linux/list.h>
19 #include <linux/pm.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
24 #include <linux/vmalloc.h>
25 #include <linux/workqueue.h>
26 #include <linux/debugfs.h>
27 #include <sound/core.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/soc.h>
31 #include <sound/jack.h>
32 #include <sound/initval.h>
33 #include <sound/tlv.h>
34
35 #include <linux/mfd/arizona/registers.h>
36
37 #include "arizona.h"
38 #include "wm_adsp.h"
39
40 #define adsp_crit(_dsp, fmt, ...) \
41 dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
42 #define adsp_err(_dsp, fmt, ...) \
43 dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
44 #define adsp_warn(_dsp, fmt, ...) \
45 dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
46 #define adsp_info(_dsp, fmt, ...) \
47 dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
48 #define adsp_dbg(_dsp, fmt, ...) \
49 dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
50
51 #define ADSP1_CONTROL_1 0x00
52 #define ADSP1_CONTROL_2 0x02
53 #define ADSP1_CONTROL_3 0x03
54 #define ADSP1_CONTROL_4 0x04
55 #define ADSP1_CONTROL_5 0x06
56 #define ADSP1_CONTROL_6 0x07
57 #define ADSP1_CONTROL_7 0x08
58 #define ADSP1_CONTROL_8 0x09
59 #define ADSP1_CONTROL_9 0x0A
60 #define ADSP1_CONTROL_10 0x0B
61 #define ADSP1_CONTROL_11 0x0C
62 #define ADSP1_CONTROL_12 0x0D
63 #define ADSP1_CONTROL_13 0x0F
64 #define ADSP1_CONTROL_14 0x10
65 #define ADSP1_CONTROL_15 0x11
66 #define ADSP1_CONTROL_16 0x12
67 #define ADSP1_CONTROL_17 0x13
68 #define ADSP1_CONTROL_18 0x14
69 #define ADSP1_CONTROL_19 0x16
70 #define ADSP1_CONTROL_20 0x17
71 #define ADSP1_CONTROL_21 0x18
72 #define ADSP1_CONTROL_22 0x1A
73 #define ADSP1_CONTROL_23 0x1B
74 #define ADSP1_CONTROL_24 0x1C
75 #define ADSP1_CONTROL_25 0x1E
76 #define ADSP1_CONTROL_26 0x20
77 #define ADSP1_CONTROL_27 0x21
78 #define ADSP1_CONTROL_28 0x22
79 #define ADSP1_CONTROL_29 0x23
80 #define ADSP1_CONTROL_30 0x24
81 #define ADSP1_CONTROL_31 0x26
82
83 /*
84 * ADSP1 Control 19
85 */
86 #define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
87 #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
88 #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
89
90
91 /*
92 * ADSP1 Control 30
93 */
94 #define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */
95 #define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */
96 #define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */
97 #define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */
98 #define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
99 #define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
100 #define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
101 #define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
102 #define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
103 #define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
104 #define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
105 #define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
106 #define ADSP1_START 0x0001 /* DSP1_START */
107 #define ADSP1_START_MASK 0x0001 /* DSP1_START */
108 #define ADSP1_START_SHIFT 0 /* DSP1_START */
109 #define ADSP1_START_WIDTH 1 /* DSP1_START */
110
111 /*
112 * ADSP1 Control 31
113 */
114 #define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
115 #define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
116 #define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
117
118 #define ADSP2_CONTROL 0x0
119 #define ADSP2_CLOCKING 0x1
120 #define ADSP2_STATUS1 0x4
121 #define ADSP2_WDMA_CONFIG_1 0x30
122 #define ADSP2_WDMA_CONFIG_2 0x31
123 #define ADSP2_RDMA_CONFIG_1 0x34
124
125 #define ADSP2_SCRATCH0 0x40
126 #define ADSP2_SCRATCH1 0x41
127 #define ADSP2_SCRATCH2 0x42
128 #define ADSP2_SCRATCH3 0x43
129
130 /*
131 * ADSP2 Control
132 */
133
134 #define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
135 #define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
136 #define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */
137 #define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */
138 #define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
139 #define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
140 #define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
141 #define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
142 #define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
143 #define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
144 #define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
145 #define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
146 #define ADSP2_START 0x0001 /* DSP1_START */
147 #define ADSP2_START_MASK 0x0001 /* DSP1_START */
148 #define ADSP2_START_SHIFT 0 /* DSP1_START */
149 #define ADSP2_START_WIDTH 1 /* DSP1_START */
150
151 /*
152 * ADSP2 clocking
153 */
154 #define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
155 #define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
156 #define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
157
158 /*
159 * ADSP2 Status 1
160 */
161 #define ADSP2_RAM_RDY 0x0001
162 #define ADSP2_RAM_RDY_MASK 0x0001
163 #define ADSP2_RAM_RDY_SHIFT 0
164 #define ADSP2_RAM_RDY_WIDTH 1
165
166 struct wm_adsp_buf {
167 struct list_head list;
168 void *buf;
169 };
170
wm_adsp_buf_alloc(const void * src,size_t len,struct list_head * list)171 static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len,
172 struct list_head *list)
173 {
174 struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL);
175
176 if (buf == NULL)
177 return NULL;
178
179 buf->buf = vmalloc(len);
180 if (!buf->buf) {
181 vfree(buf);
182 return NULL;
183 }
184 memcpy(buf->buf, src, len);
185
186 if (list)
187 list_add_tail(&buf->list, list);
188
189 return buf;
190 }
191
wm_adsp_buf_free(struct list_head * list)192 static void wm_adsp_buf_free(struct list_head *list)
193 {
194 while (!list_empty(list)) {
195 struct wm_adsp_buf *buf = list_first_entry(list,
196 struct wm_adsp_buf,
197 list);
198 list_del(&buf->list);
199 vfree(buf->buf);
200 kfree(buf);
201 }
202 }
203
204 #define WM_ADSP_NUM_FW 4
205
206 #define WM_ADSP_FW_MBC_VSS 0
207 #define WM_ADSP_FW_TX 1
208 #define WM_ADSP_FW_TX_SPK 2
209 #define WM_ADSP_FW_RX_ANC 3
210
211 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
212 [WM_ADSP_FW_MBC_VSS] = "MBC/VSS",
213 [WM_ADSP_FW_TX] = "Tx",
214 [WM_ADSP_FW_TX_SPK] = "Tx Speaker",
215 [WM_ADSP_FW_RX_ANC] = "Rx ANC",
216 };
217
218 static struct {
219 const char *file;
220 } wm_adsp_fw[WM_ADSP_NUM_FW] = {
221 [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" },
222 [WM_ADSP_FW_TX] = { .file = "tx" },
223 [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" },
224 [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" },
225 };
226
227 struct wm_coeff_ctl_ops {
228 int (*xget)(struct snd_kcontrol *kcontrol,
229 struct snd_ctl_elem_value *ucontrol);
230 int (*xput)(struct snd_kcontrol *kcontrol,
231 struct snd_ctl_elem_value *ucontrol);
232 int (*xinfo)(struct snd_kcontrol *kcontrol,
233 struct snd_ctl_elem_info *uinfo);
234 };
235
236 struct wm_coeff_ctl {
237 const char *name;
238 const char *fw_name;
239 struct wm_adsp_alg_region alg_region;
240 struct wm_coeff_ctl_ops ops;
241 struct wm_adsp *dsp;
242 unsigned int enabled:1;
243 struct list_head list;
244 void *cache;
245 unsigned int offset;
246 size_t len;
247 unsigned int set:1;
248 struct snd_kcontrol *kcontrol;
249 unsigned int flags;
250 };
251
252 #ifdef CONFIG_DEBUG_FS
wm_adsp_debugfs_save_wmfwname(struct wm_adsp * dsp,const char * s)253 static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s)
254 {
255 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
256
257 mutex_lock(&dsp->debugfs_lock);
258 kfree(dsp->wmfw_file_name);
259 dsp->wmfw_file_name = tmp;
260 mutex_unlock(&dsp->debugfs_lock);
261 }
262
wm_adsp_debugfs_save_binname(struct wm_adsp * dsp,const char * s)263 static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s)
264 {
265 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
266
267 mutex_lock(&dsp->debugfs_lock);
268 kfree(dsp->bin_file_name);
269 dsp->bin_file_name = tmp;
270 mutex_unlock(&dsp->debugfs_lock);
271 }
272
wm_adsp_debugfs_clear(struct wm_adsp * dsp)273 static void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
274 {
275 mutex_lock(&dsp->debugfs_lock);
276 kfree(dsp->wmfw_file_name);
277 kfree(dsp->bin_file_name);
278 dsp->wmfw_file_name = NULL;
279 dsp->bin_file_name = NULL;
280 mutex_unlock(&dsp->debugfs_lock);
281 }
282
wm_adsp_debugfs_wmfw_read(struct file * file,char __user * user_buf,size_t count,loff_t * ppos)283 static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file,
284 char __user *user_buf,
285 size_t count, loff_t *ppos)
286 {
287 struct wm_adsp *dsp = file->private_data;
288 ssize_t ret;
289
290 mutex_lock(&dsp->debugfs_lock);
291
292 if (!dsp->wmfw_file_name || !dsp->running)
293 ret = 0;
294 else
295 ret = simple_read_from_buffer(user_buf, count, ppos,
296 dsp->wmfw_file_name,
297 strlen(dsp->wmfw_file_name));
298
299 mutex_unlock(&dsp->debugfs_lock);
300 return ret;
301 }
302
wm_adsp_debugfs_bin_read(struct file * file,char __user * user_buf,size_t count,loff_t * ppos)303 static ssize_t wm_adsp_debugfs_bin_read(struct file *file,
304 char __user *user_buf,
305 size_t count, loff_t *ppos)
306 {
307 struct wm_adsp *dsp = file->private_data;
308 ssize_t ret;
309
310 mutex_lock(&dsp->debugfs_lock);
311
312 if (!dsp->bin_file_name || !dsp->running)
313 ret = 0;
314 else
315 ret = simple_read_from_buffer(user_buf, count, ppos,
316 dsp->bin_file_name,
317 strlen(dsp->bin_file_name));
318
319 mutex_unlock(&dsp->debugfs_lock);
320 return ret;
321 }
322
323 static const struct {
324 const char *name;
325 const struct file_operations fops;
326 } wm_adsp_debugfs_fops[] = {
327 {
328 .name = "wmfw_file_name",
329 .fops = {
330 .open = simple_open,
331 .read = wm_adsp_debugfs_wmfw_read,
332 },
333 },
334 {
335 .name = "bin_file_name",
336 .fops = {
337 .open = simple_open,
338 .read = wm_adsp_debugfs_bin_read,
339 },
340 },
341 };
342
wm_adsp2_init_debugfs(struct wm_adsp * dsp,struct snd_soc_codec * codec)343 static void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
344 struct snd_soc_codec *codec)
345 {
346 struct dentry *root = NULL;
347 char *root_name;
348 int i;
349
350 if (!codec->component.debugfs_root) {
351 adsp_err(dsp, "No codec debugfs root\n");
352 goto err;
353 }
354
355 root_name = kmalloc(PAGE_SIZE, GFP_KERNEL);
356 if (!root_name)
357 goto err;
358
359 snprintf(root_name, PAGE_SIZE, "dsp%d", dsp->num);
360 root = debugfs_create_dir(root_name, codec->component.debugfs_root);
361 kfree(root_name);
362
363 if (!root)
364 goto err;
365
366 if (!debugfs_create_bool("running", S_IRUGO, root, &dsp->running))
367 goto err;
368
369 if (!debugfs_create_x32("fw_id", S_IRUGO, root, &dsp->fw_id))
370 goto err;
371
372 if (!debugfs_create_x32("fw_version", S_IRUGO, root,
373 &dsp->fw_id_version))
374 goto err;
375
376 for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i) {
377 if (!debugfs_create_file(wm_adsp_debugfs_fops[i].name,
378 S_IRUGO, root, dsp,
379 &wm_adsp_debugfs_fops[i].fops))
380 goto err;
381 }
382
383 dsp->debugfs_root = root;
384 return;
385
386 err:
387 debugfs_remove_recursive(root);
388 adsp_err(dsp, "Failed to create debugfs\n");
389 }
390
wm_adsp2_cleanup_debugfs(struct wm_adsp * dsp)391 static void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
392 {
393 wm_adsp_debugfs_clear(dsp);
394 debugfs_remove_recursive(dsp->debugfs_root);
395 }
396 #else
wm_adsp2_init_debugfs(struct wm_adsp * dsp,struct snd_soc_codec * codec)397 static inline void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
398 struct snd_soc_codec *codec)
399 {
400 }
401
wm_adsp2_cleanup_debugfs(struct wm_adsp * dsp)402 static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
403 {
404 }
405
wm_adsp_debugfs_save_wmfwname(struct wm_adsp * dsp,const char * s)406 static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp,
407 const char *s)
408 {
409 }
410
wm_adsp_debugfs_save_binname(struct wm_adsp * dsp,const char * s)411 static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp,
412 const char *s)
413 {
414 }
415
wm_adsp_debugfs_clear(struct wm_adsp * dsp)416 static inline void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
417 {
418 }
419 #endif
420
wm_adsp_fw_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)421 static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
422 struct snd_ctl_elem_value *ucontrol)
423 {
424 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
425 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
426 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
427
428 ucontrol->value.integer.value[0] = dsp[e->shift_l].fw;
429
430 return 0;
431 }
432
wm_adsp_fw_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)433 static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
434 struct snd_ctl_elem_value *ucontrol)
435 {
436 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
437 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
438 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
439
440 if (ucontrol->value.integer.value[0] == dsp[e->shift_l].fw)
441 return 0;
442
443 if (ucontrol->value.integer.value[0] >= WM_ADSP_NUM_FW)
444 return -EINVAL;
445
446 if (dsp[e->shift_l].running)
447 return -EBUSY;
448
449 dsp[e->shift_l].fw = ucontrol->value.integer.value[0];
450
451 return 0;
452 }
453
454 static const struct soc_enum wm_adsp_fw_enum[] = {
455 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
456 SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
457 SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
458 SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
459 };
460
461 const struct snd_kcontrol_new wm_adsp_fw_controls[] = {
462 SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
463 wm_adsp_fw_get, wm_adsp_fw_put),
464 SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
465 wm_adsp_fw_get, wm_adsp_fw_put),
466 SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
467 wm_adsp_fw_get, wm_adsp_fw_put),
468 SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3],
469 wm_adsp_fw_get, wm_adsp_fw_put),
470 };
471 EXPORT_SYMBOL_GPL(wm_adsp_fw_controls);
472
wm_adsp_find_region(struct wm_adsp * dsp,int type)473 static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp,
474 int type)
475 {
476 int i;
477
478 for (i = 0; i < dsp->num_mems; i++)
479 if (dsp->mem[i].type == type)
480 return &dsp->mem[i];
481
482 return NULL;
483 }
484
wm_adsp_region_to_reg(struct wm_adsp_region const * mem,unsigned int offset)485 static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *mem,
486 unsigned int offset)
487 {
488 if (WARN_ON(!mem))
489 return offset;
490 switch (mem->type) {
491 case WMFW_ADSP1_PM:
492 return mem->base + (offset * 3);
493 case WMFW_ADSP1_DM:
494 return mem->base + (offset * 2);
495 case WMFW_ADSP2_XM:
496 return mem->base + (offset * 2);
497 case WMFW_ADSP2_YM:
498 return mem->base + (offset * 2);
499 case WMFW_ADSP1_ZM:
500 return mem->base + (offset * 2);
501 default:
502 WARN(1, "Unknown memory region type");
503 return offset;
504 }
505 }
506
wm_adsp2_show_fw_status(struct wm_adsp * dsp)507 static void wm_adsp2_show_fw_status(struct wm_adsp *dsp)
508 {
509 u16 scratch[4];
510 int ret;
511
512 ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2_SCRATCH0,
513 scratch, sizeof(scratch));
514 if (ret) {
515 adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret);
516 return;
517 }
518
519 adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
520 be16_to_cpu(scratch[0]),
521 be16_to_cpu(scratch[1]),
522 be16_to_cpu(scratch[2]),
523 be16_to_cpu(scratch[3]));
524 }
525
wm_coeff_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)526 static int wm_coeff_info(struct snd_kcontrol *kcontrol,
527 struct snd_ctl_elem_info *uinfo)
528 {
529 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
530
531 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
532 uinfo->count = ctl->len;
533 return 0;
534 }
535
wm_coeff_write_control(struct wm_coeff_ctl * ctl,const void * buf,size_t len)536 static int wm_coeff_write_control(struct wm_coeff_ctl *ctl,
537 const void *buf, size_t len)
538 {
539 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
540 const struct wm_adsp_region *mem;
541 struct wm_adsp *dsp = ctl->dsp;
542 void *scratch;
543 int ret;
544 unsigned int reg;
545
546 mem = wm_adsp_find_region(dsp, alg_region->type);
547 if (!mem) {
548 adsp_err(dsp, "No base for region %x\n",
549 alg_region->type);
550 return -EINVAL;
551 }
552
553 reg = ctl->alg_region.base + ctl->offset;
554 reg = wm_adsp_region_to_reg(mem, reg);
555
556 scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA);
557 if (!scratch)
558 return -ENOMEM;
559
560 ret = regmap_raw_write(dsp->regmap, reg, scratch,
561 ctl->len);
562 if (ret) {
563 adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n",
564 ctl->len, reg, ret);
565 kfree(scratch);
566 return ret;
567 }
568 adsp_dbg(dsp, "Wrote %zu bytes to %x\n", ctl->len, reg);
569
570 kfree(scratch);
571
572 return 0;
573 }
574
wm_coeff_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)575 static int wm_coeff_put(struct snd_kcontrol *kcontrol,
576 struct snd_ctl_elem_value *ucontrol)
577 {
578 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
579 char *p = ucontrol->value.bytes.data;
580
581 memcpy(ctl->cache, p, ctl->len);
582
583 ctl->set = 1;
584 if (!ctl->enabled)
585 return 0;
586
587 return wm_coeff_write_control(ctl, p, ctl->len);
588 }
589
wm_coeff_read_control(struct wm_coeff_ctl * ctl,void * buf,size_t len)590 static int wm_coeff_read_control(struct wm_coeff_ctl *ctl,
591 void *buf, size_t len)
592 {
593 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
594 const struct wm_adsp_region *mem;
595 struct wm_adsp *dsp = ctl->dsp;
596 void *scratch;
597 int ret;
598 unsigned int reg;
599
600 mem = wm_adsp_find_region(dsp, alg_region->type);
601 if (!mem) {
602 adsp_err(dsp, "No base for region %x\n",
603 alg_region->type);
604 return -EINVAL;
605 }
606
607 reg = ctl->alg_region.base + ctl->offset;
608 reg = wm_adsp_region_to_reg(mem, reg);
609
610 scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA);
611 if (!scratch)
612 return -ENOMEM;
613
614 ret = regmap_raw_read(dsp->regmap, reg, scratch, ctl->len);
615 if (ret) {
616 adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n",
617 ctl->len, reg, ret);
618 kfree(scratch);
619 return ret;
620 }
621 adsp_dbg(dsp, "Read %zu bytes from %x\n", ctl->len, reg);
622
623 memcpy(buf, scratch, ctl->len);
624 kfree(scratch);
625
626 return 0;
627 }
628
wm_coeff_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)629 static int wm_coeff_get(struct snd_kcontrol *kcontrol,
630 struct snd_ctl_elem_value *ucontrol)
631 {
632 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
633 char *p = ucontrol->value.bytes.data;
634
635 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
636 if (ctl->enabled)
637 return wm_coeff_read_control(ctl, p, ctl->len);
638 else
639 return -EPERM;
640 }
641
642 memcpy(p, ctl->cache, ctl->len);
643
644 return 0;
645 }
646
647 struct wmfw_ctl_work {
648 struct wm_adsp *dsp;
649 struct wm_coeff_ctl *ctl;
650 struct work_struct work;
651 };
652
wmfw_add_ctl(struct wm_adsp * dsp,struct wm_coeff_ctl * ctl)653 static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl)
654 {
655 struct snd_kcontrol_new *kcontrol;
656 int ret;
657
658 if (!ctl || !ctl->name)
659 return -EINVAL;
660
661 kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL);
662 if (!kcontrol)
663 return -ENOMEM;
664 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
665
666 kcontrol->name = ctl->name;
667 kcontrol->info = wm_coeff_info;
668 kcontrol->get = wm_coeff_get;
669 kcontrol->put = wm_coeff_put;
670 kcontrol->private_value = (unsigned long)ctl;
671
672 if (ctl->flags) {
673 if (ctl->flags & WMFW_CTL_FLAG_WRITEABLE)
674 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
675 if (ctl->flags & WMFW_CTL_FLAG_READABLE)
676 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_READ;
677 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
678 kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_VOLATILE;
679 }
680
681 ret = snd_soc_add_card_controls(dsp->card,
682 kcontrol, 1);
683 if (ret < 0)
684 goto err_kcontrol;
685
686 kfree(kcontrol);
687
688 ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card,
689 ctl->name);
690
691 return 0;
692
693 err_kcontrol:
694 kfree(kcontrol);
695 return ret;
696 }
697
wm_coeff_init_control_caches(struct wm_adsp * dsp)698 static int wm_coeff_init_control_caches(struct wm_adsp *dsp)
699 {
700 struct wm_coeff_ctl *ctl;
701 int ret;
702
703 list_for_each_entry(ctl, &dsp->ctl_list, list) {
704 if (!ctl->enabled || ctl->set)
705 continue;
706 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
707 continue;
708
709 ret = wm_coeff_read_control(ctl,
710 ctl->cache,
711 ctl->len);
712 if (ret < 0)
713 return ret;
714 }
715
716 return 0;
717 }
718
wm_coeff_sync_controls(struct wm_adsp * dsp)719 static int wm_coeff_sync_controls(struct wm_adsp *dsp)
720 {
721 struct wm_coeff_ctl *ctl;
722 int ret;
723
724 list_for_each_entry(ctl, &dsp->ctl_list, list) {
725 if (!ctl->enabled)
726 continue;
727 if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) {
728 ret = wm_coeff_write_control(ctl,
729 ctl->cache,
730 ctl->len);
731 if (ret < 0)
732 return ret;
733 }
734 }
735
736 return 0;
737 }
738
wm_adsp_ctl_work(struct work_struct * work)739 static void wm_adsp_ctl_work(struct work_struct *work)
740 {
741 struct wmfw_ctl_work *ctl_work = container_of(work,
742 struct wmfw_ctl_work,
743 work);
744
745 wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl);
746 kfree(ctl_work);
747 }
748
wm_adsp_create_control(struct wm_adsp * dsp,const struct wm_adsp_alg_region * alg_region,unsigned int offset,unsigned int len,const char * subname,unsigned int subname_len,unsigned int flags)749 static int wm_adsp_create_control(struct wm_adsp *dsp,
750 const struct wm_adsp_alg_region *alg_region,
751 unsigned int offset, unsigned int len,
752 const char *subname, unsigned int subname_len,
753 unsigned int flags)
754 {
755 struct wm_coeff_ctl *ctl;
756 struct wmfw_ctl_work *ctl_work;
757 char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
758 char *region_name;
759 int ret;
760
761 if (flags & WMFW_CTL_FLAG_SYS)
762 return 0;
763
764 switch (alg_region->type) {
765 case WMFW_ADSP1_PM:
766 region_name = "PM";
767 break;
768 case WMFW_ADSP1_DM:
769 region_name = "DM";
770 break;
771 case WMFW_ADSP2_XM:
772 region_name = "XM";
773 break;
774 case WMFW_ADSP2_YM:
775 region_name = "YM";
776 break;
777 case WMFW_ADSP1_ZM:
778 region_name = "ZM";
779 break;
780 default:
781 adsp_err(dsp, "Unknown region type: %d\n", alg_region->type);
782 return -EINVAL;
783 }
784
785 switch (dsp->fw_ver) {
786 case 0:
787 case 1:
788 snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "DSP%d %s %x",
789 dsp->num, region_name, alg_region->alg);
790 break;
791 default:
792 ret = snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
793 "DSP%d%c %.12s %x", dsp->num, *region_name,
794 wm_adsp_fw_text[dsp->fw], alg_region->alg);
795
796 /* Truncate the subname from the start if it is too long */
797 if (subname) {
798 int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2;
799 int skip = 0;
800
801 if (subname_len > avail)
802 skip = subname_len - avail;
803
804 snprintf(name + ret,
805 SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret, " %.*s",
806 subname_len - skip, subname + skip);
807 }
808 break;
809 }
810
811 list_for_each_entry(ctl, &dsp->ctl_list,
812 list) {
813 if (!strcmp(ctl->name, name)) {
814 if (!ctl->enabled)
815 ctl->enabled = 1;
816 return 0;
817 }
818 }
819
820 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
821 if (!ctl)
822 return -ENOMEM;
823 ctl->fw_name = wm_adsp_fw_text[dsp->fw];
824 ctl->alg_region = *alg_region;
825 ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL);
826 if (!ctl->name) {
827 ret = -ENOMEM;
828 goto err_ctl;
829 }
830 ctl->enabled = 1;
831 ctl->set = 0;
832 ctl->ops.xget = wm_coeff_get;
833 ctl->ops.xput = wm_coeff_put;
834 ctl->dsp = dsp;
835
836 ctl->flags = flags;
837 ctl->offset = offset;
838 if (len > 512) {
839 adsp_warn(dsp, "Truncating control %s from %d\n",
840 ctl->name, len);
841 len = 512;
842 }
843 ctl->len = len;
844 ctl->cache = kzalloc(ctl->len, GFP_KERNEL);
845 if (!ctl->cache) {
846 ret = -ENOMEM;
847 goto err_ctl_name;
848 }
849
850 list_add(&ctl->list, &dsp->ctl_list);
851
852 ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL);
853 if (!ctl_work) {
854 ret = -ENOMEM;
855 goto err_list_del;
856 }
857
858 ctl_work->dsp = dsp;
859 ctl_work->ctl = ctl;
860 INIT_WORK(&ctl_work->work, wm_adsp_ctl_work);
861 schedule_work(&ctl_work->work);
862
863 return 0;
864
865 err_list_del:
866 list_del(&ctl->list);
867 kfree(ctl->cache);
868 err_ctl_name:
869 kfree(ctl->name);
870 err_ctl:
871 kfree(ctl);
872
873 return ret;
874 }
875
876 struct wm_coeff_parsed_alg {
877 int id;
878 const u8 *name;
879 int name_len;
880 int ncoeff;
881 };
882
883 struct wm_coeff_parsed_coeff {
884 int offset;
885 int mem_type;
886 const u8 *name;
887 int name_len;
888 int ctl_type;
889 int flags;
890 int len;
891 };
892
wm_coeff_parse_string(int bytes,const u8 ** pos,const u8 ** str)893 static int wm_coeff_parse_string(int bytes, const u8 **pos, const u8 **str)
894 {
895 int length;
896
897 switch (bytes) {
898 case 1:
899 length = **pos;
900 break;
901 case 2:
902 length = le16_to_cpu(*((__le16 *)*pos));
903 break;
904 default:
905 return 0;
906 }
907
908 if (str)
909 *str = *pos + bytes;
910
911 *pos += ((length + bytes) + 3) & ~0x03;
912
913 return length;
914 }
915
wm_coeff_parse_int(int bytes,const u8 ** pos)916 static int wm_coeff_parse_int(int bytes, const u8 **pos)
917 {
918 int val = 0;
919
920 switch (bytes) {
921 case 2:
922 val = le16_to_cpu(*((__le16 *)*pos));
923 break;
924 case 4:
925 val = le32_to_cpu(*((__le32 *)*pos));
926 break;
927 default:
928 break;
929 }
930
931 *pos += bytes;
932
933 return val;
934 }
935
wm_coeff_parse_alg(struct wm_adsp * dsp,const u8 ** data,struct wm_coeff_parsed_alg * blk)936 static inline void wm_coeff_parse_alg(struct wm_adsp *dsp, const u8 **data,
937 struct wm_coeff_parsed_alg *blk)
938 {
939 const struct wmfw_adsp_alg_data *raw;
940
941 switch (dsp->fw_ver) {
942 case 0:
943 case 1:
944 raw = (const struct wmfw_adsp_alg_data *)*data;
945 *data = raw->data;
946
947 blk->id = le32_to_cpu(raw->id);
948 blk->name = raw->name;
949 blk->name_len = strlen(raw->name);
950 blk->ncoeff = le32_to_cpu(raw->ncoeff);
951 break;
952 default:
953 blk->id = wm_coeff_parse_int(sizeof(raw->id), data);
954 blk->name_len = wm_coeff_parse_string(sizeof(u8), data,
955 &blk->name);
956 wm_coeff_parse_string(sizeof(u16), data, NULL);
957 blk->ncoeff = wm_coeff_parse_int(sizeof(raw->ncoeff), data);
958 break;
959 }
960
961 adsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id);
962 adsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name);
963 adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff);
964 }
965
wm_coeff_parse_coeff(struct wm_adsp * dsp,const u8 ** data,struct wm_coeff_parsed_coeff * blk)966 static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data,
967 struct wm_coeff_parsed_coeff *blk)
968 {
969 const struct wmfw_adsp_coeff_data *raw;
970 const u8 *tmp;
971 int length;
972
973 switch (dsp->fw_ver) {
974 case 0:
975 case 1:
976 raw = (const struct wmfw_adsp_coeff_data *)*data;
977 *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size);
978
979 blk->offset = le16_to_cpu(raw->hdr.offset);
980 blk->mem_type = le16_to_cpu(raw->hdr.type);
981 blk->name = raw->name;
982 blk->name_len = strlen(raw->name);
983 blk->ctl_type = le16_to_cpu(raw->ctl_type);
984 blk->flags = le16_to_cpu(raw->flags);
985 blk->len = le32_to_cpu(raw->len);
986 break;
987 default:
988 tmp = *data;
989 blk->offset = wm_coeff_parse_int(sizeof(raw->hdr.offset), &tmp);
990 blk->mem_type = wm_coeff_parse_int(sizeof(raw->hdr.type), &tmp);
991 length = wm_coeff_parse_int(sizeof(raw->hdr.size), &tmp);
992 blk->name_len = wm_coeff_parse_string(sizeof(u8), &tmp,
993 &blk->name);
994 wm_coeff_parse_string(sizeof(u8), &tmp, NULL);
995 wm_coeff_parse_string(sizeof(u16), &tmp, NULL);
996 blk->ctl_type = wm_coeff_parse_int(sizeof(raw->ctl_type), &tmp);
997 blk->flags = wm_coeff_parse_int(sizeof(raw->flags), &tmp);
998 blk->len = wm_coeff_parse_int(sizeof(raw->len), &tmp);
999
1000 *data = *data + sizeof(raw->hdr) + length;
1001 break;
1002 }
1003
1004 adsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type);
1005 adsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset);
1006 adsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name);
1007 adsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags);
1008 adsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type);
1009 adsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len);
1010 }
1011
wm_adsp_parse_coeff(struct wm_adsp * dsp,const struct wmfw_region * region)1012 static int wm_adsp_parse_coeff(struct wm_adsp *dsp,
1013 const struct wmfw_region *region)
1014 {
1015 struct wm_adsp_alg_region alg_region = {};
1016 struct wm_coeff_parsed_alg alg_blk;
1017 struct wm_coeff_parsed_coeff coeff_blk;
1018 const u8 *data = region->data;
1019 int i, ret;
1020
1021 wm_coeff_parse_alg(dsp, &data, &alg_blk);
1022 for (i = 0; i < alg_blk.ncoeff; i++) {
1023 wm_coeff_parse_coeff(dsp, &data, &coeff_blk);
1024
1025 switch (coeff_blk.ctl_type) {
1026 case SNDRV_CTL_ELEM_TYPE_BYTES:
1027 break;
1028 default:
1029 adsp_err(dsp, "Unknown control type: %d\n",
1030 coeff_blk.ctl_type);
1031 return -EINVAL;
1032 }
1033
1034 alg_region.type = coeff_blk.mem_type;
1035 alg_region.alg = alg_blk.id;
1036
1037 ret = wm_adsp_create_control(dsp, &alg_region,
1038 coeff_blk.offset,
1039 coeff_blk.len,
1040 coeff_blk.name,
1041 coeff_blk.name_len,
1042 coeff_blk.flags);
1043 if (ret < 0)
1044 adsp_err(dsp, "Failed to create control: %.*s, %d\n",
1045 coeff_blk.name_len, coeff_blk.name, ret);
1046 }
1047
1048 return 0;
1049 }
1050
wm_adsp_load(struct wm_adsp * dsp)1051 static int wm_adsp_load(struct wm_adsp *dsp)
1052 {
1053 LIST_HEAD(buf_list);
1054 const struct firmware *firmware;
1055 struct regmap *regmap = dsp->regmap;
1056 unsigned int pos = 0;
1057 const struct wmfw_header *header;
1058 const struct wmfw_adsp1_sizes *adsp1_sizes;
1059 const struct wmfw_adsp2_sizes *adsp2_sizes;
1060 const struct wmfw_footer *footer;
1061 const struct wmfw_region *region;
1062 const struct wm_adsp_region *mem;
1063 const char *region_name;
1064 char *file, *text = NULL;
1065 struct wm_adsp_buf *buf;
1066 unsigned int reg;
1067 int regions = 0;
1068 int ret, offset, type, sizes;
1069
1070 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1071 if (file == NULL)
1072 return -ENOMEM;
1073
1074 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num,
1075 wm_adsp_fw[dsp->fw].file);
1076 file[PAGE_SIZE - 1] = '\0';
1077
1078 ret = request_firmware(&firmware, file, dsp->dev);
1079 if (ret != 0) {
1080 adsp_err(dsp, "Failed to request '%s'\n", file);
1081 goto out;
1082 }
1083 ret = -EINVAL;
1084
1085 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1086 if (pos >= firmware->size) {
1087 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1088 file, firmware->size);
1089 goto out_fw;
1090 }
1091
1092 header = (void*)&firmware->data[0];
1093
1094 if (memcmp(&header->magic[0], "WMFW", 4) != 0) {
1095 adsp_err(dsp, "%s: invalid magic\n", file);
1096 goto out_fw;
1097 }
1098
1099 switch (header->ver) {
1100 case 0:
1101 adsp_warn(dsp, "%s: Depreciated file format %d\n",
1102 file, header->ver);
1103 break;
1104 case 1:
1105 case 2:
1106 break;
1107 default:
1108 adsp_err(dsp, "%s: unknown file format %d\n",
1109 file, header->ver);
1110 goto out_fw;
1111 }
1112
1113 adsp_info(dsp, "Firmware version: %d\n", header->ver);
1114 dsp->fw_ver = header->ver;
1115
1116 if (header->core != dsp->type) {
1117 adsp_err(dsp, "%s: invalid core %d != %d\n",
1118 file, header->core, dsp->type);
1119 goto out_fw;
1120 }
1121
1122 switch (dsp->type) {
1123 case WMFW_ADSP1:
1124 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1125 adsp1_sizes = (void *)&(header[1]);
1126 footer = (void *)&(adsp1_sizes[1]);
1127 sizes = sizeof(*adsp1_sizes);
1128
1129 adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n",
1130 file, le32_to_cpu(adsp1_sizes->dm),
1131 le32_to_cpu(adsp1_sizes->pm),
1132 le32_to_cpu(adsp1_sizes->zm));
1133 break;
1134
1135 case WMFW_ADSP2:
1136 pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer);
1137 adsp2_sizes = (void *)&(header[1]);
1138 footer = (void *)&(adsp2_sizes[1]);
1139 sizes = sizeof(*adsp2_sizes);
1140
1141 adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n",
1142 file, le32_to_cpu(adsp2_sizes->xm),
1143 le32_to_cpu(adsp2_sizes->ym),
1144 le32_to_cpu(adsp2_sizes->pm),
1145 le32_to_cpu(adsp2_sizes->zm));
1146 break;
1147
1148 default:
1149 WARN(1, "Unknown DSP type");
1150 goto out_fw;
1151 }
1152
1153 if (le32_to_cpu(header->len) != sizeof(*header) +
1154 sizes + sizeof(*footer)) {
1155 adsp_err(dsp, "%s: unexpected header length %d\n",
1156 file, le32_to_cpu(header->len));
1157 goto out_fw;
1158 }
1159
1160 adsp_dbg(dsp, "%s: timestamp %llu\n", file,
1161 le64_to_cpu(footer->timestamp));
1162
1163 while (pos < firmware->size &&
1164 pos - firmware->size > sizeof(*region)) {
1165 region = (void *)&(firmware->data[pos]);
1166 region_name = "Unknown";
1167 reg = 0;
1168 text = NULL;
1169 offset = le32_to_cpu(region->offset) & 0xffffff;
1170 type = be32_to_cpu(region->type) & 0xff;
1171 mem = wm_adsp_find_region(dsp, type);
1172
1173 switch (type) {
1174 case WMFW_NAME_TEXT:
1175 region_name = "Firmware name";
1176 text = kzalloc(le32_to_cpu(region->len) + 1,
1177 GFP_KERNEL);
1178 break;
1179 case WMFW_ALGORITHM_DATA:
1180 region_name = "Algorithm";
1181 ret = wm_adsp_parse_coeff(dsp, region);
1182 if (ret != 0)
1183 goto out_fw;
1184 break;
1185 case WMFW_INFO_TEXT:
1186 region_name = "Information";
1187 text = kzalloc(le32_to_cpu(region->len) + 1,
1188 GFP_KERNEL);
1189 break;
1190 case WMFW_ABSOLUTE:
1191 region_name = "Absolute";
1192 reg = offset;
1193 break;
1194 case WMFW_ADSP1_PM:
1195 region_name = "PM";
1196 reg = wm_adsp_region_to_reg(mem, offset);
1197 break;
1198 case WMFW_ADSP1_DM:
1199 region_name = "DM";
1200 reg = wm_adsp_region_to_reg(mem, offset);
1201 break;
1202 case WMFW_ADSP2_XM:
1203 region_name = "XM";
1204 reg = wm_adsp_region_to_reg(mem, offset);
1205 break;
1206 case WMFW_ADSP2_YM:
1207 region_name = "YM";
1208 reg = wm_adsp_region_to_reg(mem, offset);
1209 break;
1210 case WMFW_ADSP1_ZM:
1211 region_name = "ZM";
1212 reg = wm_adsp_region_to_reg(mem, offset);
1213 break;
1214 default:
1215 adsp_warn(dsp,
1216 "%s.%d: Unknown region type %x at %d(%x)\n",
1217 file, regions, type, pos, pos);
1218 break;
1219 }
1220
1221 adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file,
1222 regions, le32_to_cpu(region->len), offset,
1223 region_name);
1224
1225 if ((pos + le32_to_cpu(region->len) + sizeof(*region)) >
1226 firmware->size) {
1227 adsp_err(dsp,
1228 "%s.%d: %s region len %d bytes exceeds file length %zu\n",
1229 file, regions, region_name,
1230 le32_to_cpu(region->len), firmware->size);
1231 ret = -EINVAL;
1232 goto out_fw;
1233 }
1234
1235 if (text) {
1236 memcpy(text, region->data, le32_to_cpu(region->len));
1237 adsp_info(dsp, "%s: %s\n", file, text);
1238 kfree(text);
1239 text = NULL;
1240 }
1241
1242 if (reg) {
1243 buf = wm_adsp_buf_alloc(region->data,
1244 le32_to_cpu(region->len),
1245 &buf_list);
1246 if (!buf) {
1247 adsp_err(dsp, "Out of memory\n");
1248 ret = -ENOMEM;
1249 goto out_fw;
1250 }
1251
1252 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1253 le32_to_cpu(region->len));
1254 if (ret != 0) {
1255 adsp_err(dsp,
1256 "%s.%d: Failed to write %d bytes at %d in %s: %d\n",
1257 file, regions,
1258 le32_to_cpu(region->len), offset,
1259 region_name, ret);
1260 goto out_fw;
1261 }
1262 }
1263
1264 pos += le32_to_cpu(region->len) + sizeof(*region);
1265 regions++;
1266 }
1267
1268 ret = regmap_async_complete(regmap);
1269 if (ret != 0) {
1270 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1271 goto out_fw;
1272 }
1273
1274 if (pos > firmware->size)
1275 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1276 file, regions, pos - firmware->size);
1277
1278 wm_adsp_debugfs_save_wmfwname(dsp, file);
1279
1280 out_fw:
1281 regmap_async_complete(regmap);
1282 wm_adsp_buf_free(&buf_list);
1283 release_firmware(firmware);
1284 kfree(text);
1285 out:
1286 kfree(file);
1287
1288 return ret;
1289 }
1290
wm_adsp_ctl_fixup_base(struct wm_adsp * dsp,const struct wm_adsp_alg_region * alg_region)1291 static void wm_adsp_ctl_fixup_base(struct wm_adsp *dsp,
1292 const struct wm_adsp_alg_region *alg_region)
1293 {
1294 struct wm_coeff_ctl *ctl;
1295
1296 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1297 if (ctl->fw_name == wm_adsp_fw_text[dsp->fw] &&
1298 alg_region->alg == ctl->alg_region.alg &&
1299 alg_region->type == ctl->alg_region.type) {
1300 ctl->alg_region.base = alg_region->base;
1301 }
1302 }
1303 }
1304
wm_adsp_read_algs(struct wm_adsp * dsp,size_t n_algs,unsigned int pos,unsigned int len)1305 static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs,
1306 unsigned int pos, unsigned int len)
1307 {
1308 void *alg;
1309 int ret;
1310 __be32 val;
1311
1312 if (n_algs == 0) {
1313 adsp_err(dsp, "No algorithms\n");
1314 return ERR_PTR(-EINVAL);
1315 }
1316
1317 if (n_algs > 1024) {
1318 adsp_err(dsp, "Algorithm count %zx excessive\n", n_algs);
1319 return ERR_PTR(-EINVAL);
1320 }
1321
1322 /* Read the terminator first to validate the length */
1323 ret = regmap_raw_read(dsp->regmap, pos + len, &val, sizeof(val));
1324 if (ret != 0) {
1325 adsp_err(dsp, "Failed to read algorithm list end: %d\n",
1326 ret);
1327 return ERR_PTR(ret);
1328 }
1329
1330 if (be32_to_cpu(val) != 0xbedead)
1331 adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n",
1332 pos + len, be32_to_cpu(val));
1333
1334 alg = kzalloc(len * 2, GFP_KERNEL | GFP_DMA);
1335 if (!alg)
1336 return ERR_PTR(-ENOMEM);
1337
1338 ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2);
1339 if (ret != 0) {
1340 adsp_err(dsp, "Failed to read algorithm list: %d\n",
1341 ret);
1342 kfree(alg);
1343 return ERR_PTR(ret);
1344 }
1345
1346 return alg;
1347 }
1348
wm_adsp_create_region(struct wm_adsp * dsp,int type,__be32 id,__be32 base)1349 static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp,
1350 int type, __be32 id,
1351 __be32 base)
1352 {
1353 struct wm_adsp_alg_region *alg_region;
1354
1355 alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL);
1356 if (!alg_region)
1357 return ERR_PTR(-ENOMEM);
1358
1359 alg_region->type = type;
1360 alg_region->alg = be32_to_cpu(id);
1361 alg_region->base = be32_to_cpu(base);
1362
1363 list_add_tail(&alg_region->list, &dsp->alg_regions);
1364
1365 if (dsp->fw_ver > 0)
1366 wm_adsp_ctl_fixup_base(dsp, alg_region);
1367
1368 return alg_region;
1369 }
1370
wm_adsp1_setup_algs(struct wm_adsp * dsp)1371 static int wm_adsp1_setup_algs(struct wm_adsp *dsp)
1372 {
1373 struct wmfw_adsp1_id_hdr adsp1_id;
1374 struct wmfw_adsp1_alg_hdr *adsp1_alg;
1375 struct wm_adsp_alg_region *alg_region;
1376 const struct wm_adsp_region *mem;
1377 unsigned int pos, len;
1378 size_t n_algs;
1379 int i, ret;
1380
1381 mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM);
1382 if (WARN_ON(!mem))
1383 return -EINVAL;
1384
1385 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id,
1386 sizeof(adsp1_id));
1387 if (ret != 0) {
1388 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1389 ret);
1390 return ret;
1391 }
1392
1393 n_algs = be32_to_cpu(adsp1_id.n_algs);
1394 dsp->fw_id = be32_to_cpu(adsp1_id.fw.id);
1395 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1396 dsp->fw_id,
1397 (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16,
1398 (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8,
1399 be32_to_cpu(adsp1_id.fw.ver) & 0xff,
1400 n_algs);
1401
1402 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1403 adsp1_id.fw.id, adsp1_id.zm);
1404 if (IS_ERR(alg_region))
1405 return PTR_ERR(alg_region);
1406
1407 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1408 adsp1_id.fw.id, adsp1_id.dm);
1409 if (IS_ERR(alg_region))
1410 return PTR_ERR(alg_region);
1411
1412 pos = sizeof(adsp1_id) / 2;
1413 len = (sizeof(*adsp1_alg) * n_algs) / 2;
1414
1415 adsp1_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
1416 if (IS_ERR(adsp1_alg))
1417 return PTR_ERR(adsp1_alg);
1418
1419 for (i = 0; i < n_algs; i++) {
1420 adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
1421 i, be32_to_cpu(adsp1_alg[i].alg.id),
1422 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16,
1423 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8,
1424 be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff,
1425 be32_to_cpu(adsp1_alg[i].dm),
1426 be32_to_cpu(adsp1_alg[i].zm));
1427
1428 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1429 adsp1_alg[i].alg.id,
1430 adsp1_alg[i].dm);
1431 if (IS_ERR(alg_region)) {
1432 ret = PTR_ERR(alg_region);
1433 goto out;
1434 }
1435 if (dsp->fw_ver == 0) {
1436 if (i + 1 < n_algs) {
1437 len = be32_to_cpu(adsp1_alg[i + 1].dm);
1438 len -= be32_to_cpu(adsp1_alg[i].dm);
1439 len *= 4;
1440 wm_adsp_create_control(dsp, alg_region, 0,
1441 len, NULL, 0, 0);
1442 } else {
1443 adsp_warn(dsp, "Missing length info for region DM with ID %x\n",
1444 be32_to_cpu(adsp1_alg[i].alg.id));
1445 }
1446 }
1447
1448 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1449 adsp1_alg[i].alg.id,
1450 adsp1_alg[i].zm);
1451 if (IS_ERR(alg_region)) {
1452 ret = PTR_ERR(alg_region);
1453 goto out;
1454 }
1455 if (dsp->fw_ver == 0) {
1456 if (i + 1 < n_algs) {
1457 len = be32_to_cpu(adsp1_alg[i + 1].zm);
1458 len -= be32_to_cpu(adsp1_alg[i].zm);
1459 len *= 4;
1460 wm_adsp_create_control(dsp, alg_region, 0,
1461 len, NULL, 0, 0);
1462 } else {
1463 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1464 be32_to_cpu(adsp1_alg[i].alg.id));
1465 }
1466 }
1467 }
1468
1469 out:
1470 kfree(adsp1_alg);
1471 return ret;
1472 }
1473
wm_adsp2_setup_algs(struct wm_adsp * dsp)1474 static int wm_adsp2_setup_algs(struct wm_adsp *dsp)
1475 {
1476 struct wmfw_adsp2_id_hdr adsp2_id;
1477 struct wmfw_adsp2_alg_hdr *adsp2_alg;
1478 struct wm_adsp_alg_region *alg_region;
1479 const struct wm_adsp_region *mem;
1480 unsigned int pos, len;
1481 size_t n_algs;
1482 int i, ret;
1483
1484 mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);
1485 if (WARN_ON(!mem))
1486 return -EINVAL;
1487
1488 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id,
1489 sizeof(adsp2_id));
1490 if (ret != 0) {
1491 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1492 ret);
1493 return ret;
1494 }
1495
1496 n_algs = be32_to_cpu(adsp2_id.n_algs);
1497 dsp->fw_id = be32_to_cpu(adsp2_id.fw.id);
1498 dsp->fw_id_version = be32_to_cpu(adsp2_id.fw.ver);
1499 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1500 dsp->fw_id,
1501 (dsp->fw_id_version & 0xff0000) >> 16,
1502 (dsp->fw_id_version & 0xff00) >> 8,
1503 dsp->fw_id_version & 0xff,
1504 n_algs);
1505
1506 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1507 adsp2_id.fw.id, adsp2_id.xm);
1508 if (IS_ERR(alg_region))
1509 return PTR_ERR(alg_region);
1510
1511 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1512 adsp2_id.fw.id, adsp2_id.ym);
1513 if (IS_ERR(alg_region))
1514 return PTR_ERR(alg_region);
1515
1516 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1517 adsp2_id.fw.id, adsp2_id.zm);
1518 if (IS_ERR(alg_region))
1519 return PTR_ERR(alg_region);
1520
1521 pos = sizeof(adsp2_id) / 2;
1522 len = (sizeof(*adsp2_alg) * n_algs) / 2;
1523
1524 adsp2_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
1525 if (IS_ERR(adsp2_alg))
1526 return PTR_ERR(adsp2_alg);
1527
1528 for (i = 0; i < n_algs; i++) {
1529 adsp_info(dsp,
1530 "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
1531 i, be32_to_cpu(adsp2_alg[i].alg.id),
1532 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
1533 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
1534 be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
1535 be32_to_cpu(adsp2_alg[i].xm),
1536 be32_to_cpu(adsp2_alg[i].ym),
1537 be32_to_cpu(adsp2_alg[i].zm));
1538
1539 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1540 adsp2_alg[i].alg.id,
1541 adsp2_alg[i].xm);
1542 if (IS_ERR(alg_region)) {
1543 ret = PTR_ERR(alg_region);
1544 goto out;
1545 }
1546 if (dsp->fw_ver == 0) {
1547 if (i + 1 < n_algs) {
1548 len = be32_to_cpu(adsp2_alg[i + 1].xm);
1549 len -= be32_to_cpu(adsp2_alg[i].xm);
1550 len *= 4;
1551 wm_adsp_create_control(dsp, alg_region, 0,
1552 len, NULL, 0, 0);
1553 } else {
1554 adsp_warn(dsp, "Missing length info for region XM with ID %x\n",
1555 be32_to_cpu(adsp2_alg[i].alg.id));
1556 }
1557 }
1558
1559 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1560 adsp2_alg[i].alg.id,
1561 adsp2_alg[i].ym);
1562 if (IS_ERR(alg_region)) {
1563 ret = PTR_ERR(alg_region);
1564 goto out;
1565 }
1566 if (dsp->fw_ver == 0) {
1567 if (i + 1 < n_algs) {
1568 len = be32_to_cpu(adsp2_alg[i + 1].ym);
1569 len -= be32_to_cpu(adsp2_alg[i].ym);
1570 len *= 4;
1571 wm_adsp_create_control(dsp, alg_region, 0,
1572 len, NULL, 0, 0);
1573 } else {
1574 adsp_warn(dsp, "Missing length info for region YM with ID %x\n",
1575 be32_to_cpu(adsp2_alg[i].alg.id));
1576 }
1577 }
1578
1579 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1580 adsp2_alg[i].alg.id,
1581 adsp2_alg[i].zm);
1582 if (IS_ERR(alg_region)) {
1583 ret = PTR_ERR(alg_region);
1584 goto out;
1585 }
1586 if (dsp->fw_ver == 0) {
1587 if (i + 1 < n_algs) {
1588 len = be32_to_cpu(adsp2_alg[i + 1].zm);
1589 len -= be32_to_cpu(adsp2_alg[i].zm);
1590 len *= 4;
1591 wm_adsp_create_control(dsp, alg_region, 0,
1592 len, NULL, 0, 0);
1593 } else {
1594 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1595 be32_to_cpu(adsp2_alg[i].alg.id));
1596 }
1597 }
1598 }
1599
1600 out:
1601 kfree(adsp2_alg);
1602 return ret;
1603 }
1604
wm_adsp_load_coeff(struct wm_adsp * dsp)1605 static int wm_adsp_load_coeff(struct wm_adsp *dsp)
1606 {
1607 LIST_HEAD(buf_list);
1608 struct regmap *regmap = dsp->regmap;
1609 struct wmfw_coeff_hdr *hdr;
1610 struct wmfw_coeff_item *blk;
1611 const struct firmware *firmware;
1612 const struct wm_adsp_region *mem;
1613 struct wm_adsp_alg_region *alg_region;
1614 const char *region_name;
1615 int ret, pos, blocks, type, offset, reg;
1616 char *file;
1617 struct wm_adsp_buf *buf;
1618
1619 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1620 if (file == NULL)
1621 return -ENOMEM;
1622
1623 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num,
1624 wm_adsp_fw[dsp->fw].file);
1625 file[PAGE_SIZE - 1] = '\0';
1626
1627 ret = request_firmware(&firmware, file, dsp->dev);
1628 if (ret != 0) {
1629 adsp_warn(dsp, "Failed to request '%s'\n", file);
1630 ret = 0;
1631 goto out;
1632 }
1633 ret = -EINVAL;
1634
1635 if (sizeof(*hdr) >= firmware->size) {
1636 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1637 file, firmware->size);
1638 goto out_fw;
1639 }
1640
1641 hdr = (void*)&firmware->data[0];
1642 if (memcmp(hdr->magic, "WMDR", 4) != 0) {
1643 adsp_err(dsp, "%s: invalid magic\n", file);
1644 goto out_fw;
1645 }
1646
1647 switch (be32_to_cpu(hdr->rev) & 0xff) {
1648 case 1:
1649 break;
1650 default:
1651 adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",
1652 file, be32_to_cpu(hdr->rev) & 0xff);
1653 ret = -EINVAL;
1654 goto out_fw;
1655 }
1656
1657 adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,
1658 (le32_to_cpu(hdr->ver) >> 16) & 0xff,
1659 (le32_to_cpu(hdr->ver) >> 8) & 0xff,
1660 le32_to_cpu(hdr->ver) & 0xff);
1661
1662 pos = le32_to_cpu(hdr->len);
1663
1664 blocks = 0;
1665 while (pos < firmware->size &&
1666 pos - firmware->size > sizeof(*blk)) {
1667 blk = (void*)(&firmware->data[pos]);
1668
1669 type = le16_to_cpu(blk->type);
1670 offset = le16_to_cpu(blk->offset);
1671
1672 adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",
1673 file, blocks, le32_to_cpu(blk->id),
1674 (le32_to_cpu(blk->ver) >> 16) & 0xff,
1675 (le32_to_cpu(blk->ver) >> 8) & 0xff,
1676 le32_to_cpu(blk->ver) & 0xff);
1677 adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n",
1678 file, blocks, le32_to_cpu(blk->len), offset, type);
1679
1680 reg = 0;
1681 region_name = "Unknown";
1682 switch (type) {
1683 case (WMFW_NAME_TEXT << 8):
1684 case (WMFW_INFO_TEXT << 8):
1685 break;
1686 case (WMFW_ABSOLUTE << 8):
1687 /*
1688 * Old files may use this for global
1689 * coefficients.
1690 */
1691 if (le32_to_cpu(blk->id) == dsp->fw_id &&
1692 offset == 0) {
1693 region_name = "global coefficients";
1694 mem = wm_adsp_find_region(dsp, type);
1695 if (!mem) {
1696 adsp_err(dsp, "No ZM\n");
1697 break;
1698 }
1699 reg = wm_adsp_region_to_reg(mem, 0);
1700
1701 } else {
1702 region_name = "register";
1703 reg = offset;
1704 }
1705 break;
1706
1707 case WMFW_ADSP1_DM:
1708 case WMFW_ADSP1_ZM:
1709 case WMFW_ADSP2_XM:
1710 case WMFW_ADSP2_YM:
1711 adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n",
1712 file, blocks, le32_to_cpu(blk->len),
1713 type, le32_to_cpu(blk->id));
1714
1715 mem = wm_adsp_find_region(dsp, type);
1716 if (!mem) {
1717 adsp_err(dsp, "No base for region %x\n", type);
1718 break;
1719 }
1720
1721 reg = 0;
1722 list_for_each_entry(alg_region,
1723 &dsp->alg_regions, list) {
1724 if (le32_to_cpu(blk->id) == alg_region->alg &&
1725 type == alg_region->type) {
1726 reg = alg_region->base;
1727 reg = wm_adsp_region_to_reg(mem,
1728 reg);
1729 reg += offset;
1730 break;
1731 }
1732 }
1733
1734 if (reg == 0)
1735 adsp_err(dsp, "No %x for algorithm %x\n",
1736 type, le32_to_cpu(blk->id));
1737 break;
1738
1739 default:
1740 adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n",
1741 file, blocks, type, pos);
1742 break;
1743 }
1744
1745 if (reg) {
1746 if ((pos + le32_to_cpu(blk->len) + sizeof(*blk)) >
1747 firmware->size) {
1748 adsp_err(dsp,
1749 "%s.%d: %s region len %d bytes exceeds file length %zu\n",
1750 file, blocks, region_name,
1751 le32_to_cpu(blk->len),
1752 firmware->size);
1753 ret = -EINVAL;
1754 goto out_fw;
1755 }
1756
1757 buf = wm_adsp_buf_alloc(blk->data,
1758 le32_to_cpu(blk->len),
1759 &buf_list);
1760 if (!buf) {
1761 adsp_err(dsp, "Out of memory\n");
1762 ret = -ENOMEM;
1763 goto out_fw;
1764 }
1765
1766 adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n",
1767 file, blocks, le32_to_cpu(blk->len),
1768 reg);
1769 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1770 le32_to_cpu(blk->len));
1771 if (ret != 0) {
1772 adsp_err(dsp,
1773 "%s.%d: Failed to write to %x in %s: %d\n",
1774 file, blocks, reg, region_name, ret);
1775 }
1776 }
1777
1778 pos += (le32_to_cpu(blk->len) + sizeof(*blk) + 3) & ~0x03;
1779 blocks++;
1780 }
1781
1782 ret = regmap_async_complete(regmap);
1783 if (ret != 0)
1784 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1785
1786 if (pos > firmware->size)
1787 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1788 file, blocks, pos - firmware->size);
1789
1790 wm_adsp_debugfs_save_binname(dsp, file);
1791
1792 out_fw:
1793 regmap_async_complete(regmap);
1794 release_firmware(firmware);
1795 wm_adsp_buf_free(&buf_list);
1796 out:
1797 kfree(file);
1798 return ret;
1799 }
1800
wm_adsp1_init(struct wm_adsp * dsp)1801 int wm_adsp1_init(struct wm_adsp *dsp)
1802 {
1803 INIT_LIST_HEAD(&dsp->alg_regions);
1804
1805 #ifdef CONFIG_DEBUG_FS
1806 mutex_init(&dsp->debugfs_lock);
1807 #endif
1808 return 0;
1809 }
1810 EXPORT_SYMBOL_GPL(wm_adsp1_init);
1811
wm_adsp1_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1812 int wm_adsp1_event(struct snd_soc_dapm_widget *w,
1813 struct snd_kcontrol *kcontrol,
1814 int event)
1815 {
1816 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1817 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
1818 struct wm_adsp *dsp = &dsps[w->shift];
1819 struct wm_adsp_alg_region *alg_region;
1820 struct wm_coeff_ctl *ctl;
1821 int ret;
1822 int val;
1823
1824 dsp->card = codec->component.card;
1825
1826 switch (event) {
1827 case SND_SOC_DAPM_POST_PMU:
1828 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1829 ADSP1_SYS_ENA, ADSP1_SYS_ENA);
1830
1831 /*
1832 * For simplicity set the DSP clock rate to be the
1833 * SYSCLK rate rather than making it configurable.
1834 */
1835 if(dsp->sysclk_reg) {
1836 ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);
1837 if (ret != 0) {
1838 adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
1839 ret);
1840 return ret;
1841 }
1842
1843 val = (val & dsp->sysclk_mask)
1844 >> dsp->sysclk_shift;
1845
1846 ret = regmap_update_bits(dsp->regmap,
1847 dsp->base + ADSP1_CONTROL_31,
1848 ADSP1_CLK_SEL_MASK, val);
1849 if (ret != 0) {
1850 adsp_err(dsp, "Failed to set clock rate: %d\n",
1851 ret);
1852 return ret;
1853 }
1854 }
1855
1856 ret = wm_adsp_load(dsp);
1857 if (ret != 0)
1858 goto err;
1859
1860 ret = wm_adsp1_setup_algs(dsp);
1861 if (ret != 0)
1862 goto err;
1863
1864 ret = wm_adsp_load_coeff(dsp);
1865 if (ret != 0)
1866 goto err;
1867
1868 /* Initialize caches for enabled and unset controls */
1869 ret = wm_coeff_init_control_caches(dsp);
1870 if (ret != 0)
1871 goto err;
1872
1873 /* Sync set controls */
1874 ret = wm_coeff_sync_controls(dsp);
1875 if (ret != 0)
1876 goto err;
1877
1878 /* Start the core running */
1879 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1880 ADSP1_CORE_ENA | ADSP1_START,
1881 ADSP1_CORE_ENA | ADSP1_START);
1882 break;
1883
1884 case SND_SOC_DAPM_PRE_PMD:
1885 /* Halt the core */
1886 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1887 ADSP1_CORE_ENA | ADSP1_START, 0);
1888
1889 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,
1890 ADSP1_WDMA_BUFFER_LENGTH_MASK, 0);
1891
1892 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1893 ADSP1_SYS_ENA, 0);
1894
1895 list_for_each_entry(ctl, &dsp->ctl_list, list)
1896 ctl->enabled = 0;
1897
1898 while (!list_empty(&dsp->alg_regions)) {
1899 alg_region = list_first_entry(&dsp->alg_regions,
1900 struct wm_adsp_alg_region,
1901 list);
1902 list_del(&alg_region->list);
1903 kfree(alg_region);
1904 }
1905 break;
1906
1907 default:
1908 break;
1909 }
1910
1911 return 0;
1912
1913 err:
1914 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1915 ADSP1_SYS_ENA, 0);
1916 return ret;
1917 }
1918 EXPORT_SYMBOL_GPL(wm_adsp1_event);
1919
wm_adsp2_ena(struct wm_adsp * dsp)1920 static int wm_adsp2_ena(struct wm_adsp *dsp)
1921 {
1922 unsigned int val;
1923 int ret, count;
1924
1925 ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL,
1926 ADSP2_SYS_ENA, ADSP2_SYS_ENA);
1927 if (ret != 0)
1928 return ret;
1929
1930 /* Wait for the RAM to start, should be near instantaneous */
1931 for (count = 0; count < 10; ++count) {
1932 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1,
1933 &val);
1934 if (ret != 0)
1935 return ret;
1936
1937 if (val & ADSP2_RAM_RDY)
1938 break;
1939
1940 msleep(1);
1941 }
1942
1943 if (!(val & ADSP2_RAM_RDY)) {
1944 adsp_err(dsp, "Failed to start DSP RAM\n");
1945 return -EBUSY;
1946 }
1947
1948 adsp_dbg(dsp, "RAM ready after %d polls\n", count);
1949
1950 return 0;
1951 }
1952
wm_adsp2_boot_work(struct work_struct * work)1953 static void wm_adsp2_boot_work(struct work_struct *work)
1954 {
1955 struct wm_adsp *dsp = container_of(work,
1956 struct wm_adsp,
1957 boot_work);
1958 int ret;
1959 unsigned int val;
1960
1961 /*
1962 * For simplicity set the DSP clock rate to be the
1963 * SYSCLK rate rather than making it configurable.
1964 */
1965 ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val);
1966 if (ret != 0) {
1967 adsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret);
1968 return;
1969 }
1970 val = (val & ARIZONA_SYSCLK_FREQ_MASK)
1971 >> ARIZONA_SYSCLK_FREQ_SHIFT;
1972
1973 ret = regmap_update_bits_async(dsp->regmap,
1974 dsp->base + ADSP2_CLOCKING,
1975 ADSP2_CLK_SEL_MASK, val);
1976 if (ret != 0) {
1977 adsp_err(dsp, "Failed to set clock rate: %d\n", ret);
1978 return;
1979 }
1980
1981 ret = wm_adsp2_ena(dsp);
1982 if (ret != 0)
1983 return;
1984
1985 ret = wm_adsp_load(dsp);
1986 if (ret != 0)
1987 goto err;
1988
1989 ret = wm_adsp2_setup_algs(dsp);
1990 if (ret != 0)
1991 goto err;
1992
1993 ret = wm_adsp_load_coeff(dsp);
1994 if (ret != 0)
1995 goto err;
1996
1997 /* Initialize caches for enabled and unset controls */
1998 ret = wm_coeff_init_control_caches(dsp);
1999 if (ret != 0)
2000 goto err;
2001
2002 /* Sync set controls */
2003 ret = wm_coeff_sync_controls(dsp);
2004 if (ret != 0)
2005 goto err;
2006
2007 dsp->running = true;
2008
2009 return;
2010
2011 err:
2012 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2013 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2014 }
2015
wm_adsp2_early_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)2016 int wm_adsp2_early_event(struct snd_soc_dapm_widget *w,
2017 struct snd_kcontrol *kcontrol, int event)
2018 {
2019 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2020 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2021 struct wm_adsp *dsp = &dsps[w->shift];
2022
2023 dsp->card = codec->component.card;
2024
2025 switch (event) {
2026 case SND_SOC_DAPM_PRE_PMU:
2027 queue_work(system_unbound_wq, &dsp->boot_work);
2028 break;
2029 default:
2030 break;
2031 }
2032
2033 return 0;
2034 }
2035 EXPORT_SYMBOL_GPL(wm_adsp2_early_event);
2036
wm_adsp2_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)2037 int wm_adsp2_event(struct snd_soc_dapm_widget *w,
2038 struct snd_kcontrol *kcontrol, int event)
2039 {
2040 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2041 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2042 struct wm_adsp *dsp = &dsps[w->shift];
2043 struct wm_adsp_alg_region *alg_region;
2044 struct wm_coeff_ctl *ctl;
2045 int ret;
2046
2047 switch (event) {
2048 case SND_SOC_DAPM_POST_PMU:
2049 flush_work(&dsp->boot_work);
2050
2051 if (!dsp->running)
2052 return -EIO;
2053
2054 ret = regmap_update_bits(dsp->regmap,
2055 dsp->base + ADSP2_CONTROL,
2056 ADSP2_CORE_ENA | ADSP2_START,
2057 ADSP2_CORE_ENA | ADSP2_START);
2058 if (ret != 0)
2059 goto err;
2060 break;
2061
2062 case SND_SOC_DAPM_PRE_PMD:
2063 /* Log firmware state, it can be useful for analysis */
2064 wm_adsp2_show_fw_status(dsp);
2065
2066 wm_adsp_debugfs_clear(dsp);
2067
2068 dsp->fw_id = 0;
2069 dsp->fw_id_version = 0;
2070 dsp->running = false;
2071
2072 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2073 ADSP2_SYS_ENA | ADSP2_CORE_ENA |
2074 ADSP2_START, 0);
2075
2076 /* Make sure DMAs are quiesced */
2077 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);
2078 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0);
2079 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);
2080
2081 list_for_each_entry(ctl, &dsp->ctl_list, list)
2082 ctl->enabled = 0;
2083
2084 while (!list_empty(&dsp->alg_regions)) {
2085 alg_region = list_first_entry(&dsp->alg_regions,
2086 struct wm_adsp_alg_region,
2087 list);
2088 list_del(&alg_region->list);
2089 kfree(alg_region);
2090 }
2091
2092 adsp_dbg(dsp, "Shutdown complete\n");
2093 break;
2094
2095 default:
2096 break;
2097 }
2098
2099 return 0;
2100 err:
2101 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2102 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2103 return ret;
2104 }
2105 EXPORT_SYMBOL_GPL(wm_adsp2_event);
2106
wm_adsp2_codec_probe(struct wm_adsp * dsp,struct snd_soc_codec * codec)2107 int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2108 {
2109 wm_adsp2_init_debugfs(dsp, codec);
2110
2111 return snd_soc_add_codec_controls(codec,
2112 &wm_adsp_fw_controls[dsp->num - 1],
2113 1);
2114 }
2115 EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe);
2116
wm_adsp2_codec_remove(struct wm_adsp * dsp,struct snd_soc_codec * codec)2117 int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2118 {
2119 wm_adsp2_cleanup_debugfs(dsp);
2120
2121 return 0;
2122 }
2123 EXPORT_SYMBOL_GPL(wm_adsp2_codec_remove);
2124
wm_adsp2_init(struct wm_adsp * dsp)2125 int wm_adsp2_init(struct wm_adsp *dsp)
2126 {
2127 int ret;
2128
2129 /*
2130 * Disable the DSP memory by default when in reset for a small
2131 * power saving.
2132 */
2133 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2134 ADSP2_MEM_ENA, 0);
2135 if (ret != 0) {
2136 adsp_err(dsp, "Failed to clear memory retention: %d\n", ret);
2137 return ret;
2138 }
2139
2140 INIT_LIST_HEAD(&dsp->alg_regions);
2141 INIT_LIST_HEAD(&dsp->ctl_list);
2142 INIT_WORK(&dsp->boot_work, wm_adsp2_boot_work);
2143
2144 #ifdef CONFIG_DEBUG_FS
2145 mutex_init(&dsp->debugfs_lock);
2146 #endif
2147 return 0;
2148 }
2149 EXPORT_SYMBOL_GPL(wm_adsp2_init);
2150
2151 MODULE_LICENSE("GPL v2");
2152