1 /*
2 * Copyright IBM Corp. 2012
3 *
4 * Author(s):
5 * Jan Glauber <jang@linux.vnet.ibm.com>
6 *
7 * The System z PCI code is a rewrite from a prototype by
8 * the following people (Kudoz!):
9 * Alexander Schmidt
10 * Christoph Raisch
11 * Hannes Hering
12 * Hoang-Nam Nguyen
13 * Jan-Bernd Themann
14 * Stefan Roscher
15 * Thomas Klein
16 */
17
18 #define KMSG_COMPONENT "zpci"
19 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
20
21 #include <linux/kernel.h>
22 #include <linux/slab.h>
23 #include <linux/err.h>
24 #include <linux/export.h>
25 #include <linux/delay.h>
26 #include <linux/irq.h>
27 #include <linux/kernel_stat.h>
28 #include <linux/seq_file.h>
29 #include <linux/pci.h>
30 #include <linux/msi.h>
31
32 #include <asm/isc.h>
33 #include <asm/airq.h>
34 #include <asm/facility.h>
35 #include <asm/pci_insn.h>
36 #include <asm/pci_clp.h>
37 #include <asm/pci_dma.h>
38
39 #define DEBUG /* enable pr_debug */
40
41 #define SIC_IRQ_MODE_ALL 0
42 #define SIC_IRQ_MODE_SINGLE 1
43
44 #define ZPCI_NR_DMA_SPACES 1
45 #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
46
47 /* list of all detected zpci devices */
48 static LIST_HEAD(zpci_list);
49 static DEFINE_SPINLOCK(zpci_list_lock);
50
51 static struct irq_chip zpci_irq_chip = {
52 .name = "zPCI",
53 .irq_unmask = pci_msi_unmask_irq,
54 .irq_mask = pci_msi_mask_irq,
55 };
56
57 static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
58 static DEFINE_SPINLOCK(zpci_domain_lock);
59
60 static struct airq_iv *zpci_aisb_iv;
61 static struct airq_iv *zpci_aibv[ZPCI_NR_DEVICES];
62
63 /* Adapter interrupt definitions */
64 static void zpci_irq_handler(struct airq_struct *airq);
65
66 static struct airq_struct zpci_airq = {
67 .handler = zpci_irq_handler,
68 .isc = PCI_ISC,
69 };
70
71 /* I/O Map */
72 static DEFINE_SPINLOCK(zpci_iomap_lock);
73 static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
74 struct zpci_iomap_entry *zpci_iomap_start;
75 EXPORT_SYMBOL_GPL(zpci_iomap_start);
76
77 static struct kmem_cache *zdev_fmb_cache;
78
get_zdev_by_fid(u32 fid)79 struct zpci_dev *get_zdev_by_fid(u32 fid)
80 {
81 struct zpci_dev *tmp, *zdev = NULL;
82
83 spin_lock(&zpci_list_lock);
84 list_for_each_entry(tmp, &zpci_list, entry) {
85 if (tmp->fid == fid) {
86 zdev = tmp;
87 break;
88 }
89 }
90 spin_unlock(&zpci_list_lock);
91 return zdev;
92 }
93
get_zdev_by_bus(struct pci_bus * bus)94 static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
95 {
96 return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
97 }
98
pci_domain_nr(struct pci_bus * bus)99 int pci_domain_nr(struct pci_bus *bus)
100 {
101 return ((struct zpci_dev *) bus->sysdata)->domain;
102 }
103 EXPORT_SYMBOL_GPL(pci_domain_nr);
104
pci_proc_domain(struct pci_bus * bus)105 int pci_proc_domain(struct pci_bus *bus)
106 {
107 return pci_domain_nr(bus);
108 }
109 EXPORT_SYMBOL_GPL(pci_proc_domain);
110
111 /* Modify PCI: Register adapter interruptions */
zpci_set_airq(struct zpci_dev * zdev)112 static int zpci_set_airq(struct zpci_dev *zdev)
113 {
114 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
115 struct zpci_fib fib = {0};
116
117 fib.isc = PCI_ISC;
118 fib.sum = 1; /* enable summary notifications */
119 fib.noi = airq_iv_end(zdev->aibv);
120 fib.aibv = (unsigned long) zdev->aibv->vector;
121 fib.aibvo = 0; /* each zdev has its own interrupt vector */
122 fib.aisb = (unsigned long) zpci_aisb_iv->vector + (zdev->aisb/64)*8;
123 fib.aisbo = zdev->aisb & 63;
124
125 return zpci_mod_fc(req, &fib);
126 }
127
128 struct mod_pci_args {
129 u64 base;
130 u64 limit;
131 u64 iota;
132 u64 fmb_addr;
133 };
134
mod_pci(struct zpci_dev * zdev,int fn,u8 dmaas,struct mod_pci_args * args)135 static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
136 {
137 u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
138 struct zpci_fib fib = {0};
139
140 fib.pba = args->base;
141 fib.pal = args->limit;
142 fib.iota = args->iota;
143 fib.fmb_addr = args->fmb_addr;
144
145 return zpci_mod_fc(req, &fib);
146 }
147
148 /* Modify PCI: Register I/O address translation parameters */
zpci_register_ioat(struct zpci_dev * zdev,u8 dmaas,u64 base,u64 limit,u64 iota)149 int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
150 u64 base, u64 limit, u64 iota)
151 {
152 struct mod_pci_args args = { base, limit, iota, 0 };
153
154 WARN_ON_ONCE(iota & 0x3fff);
155 args.iota |= ZPCI_IOTA_RTTO_FLAG;
156 return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
157 }
158
159 /* Modify PCI: Unregister I/O address translation parameters */
zpci_unregister_ioat(struct zpci_dev * zdev,u8 dmaas)160 int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
161 {
162 struct mod_pci_args args = { 0, 0, 0, 0 };
163
164 return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
165 }
166
167 /* Modify PCI: Unregister adapter interruptions */
zpci_clear_airq(struct zpci_dev * zdev)168 static int zpci_clear_airq(struct zpci_dev *zdev)
169 {
170 struct mod_pci_args args = { 0, 0, 0, 0 };
171
172 return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
173 }
174
175 /* Modify PCI: Set PCI function measurement parameters */
zpci_fmb_enable_device(struct zpci_dev * zdev)176 int zpci_fmb_enable_device(struct zpci_dev *zdev)
177 {
178 struct mod_pci_args args = { 0, 0, 0, 0 };
179
180 if (zdev->fmb)
181 return -EINVAL;
182
183 zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
184 if (!zdev->fmb)
185 return -ENOMEM;
186 WARN_ON((u64) zdev->fmb & 0xf);
187
188 /* reset software counters */
189 atomic64_set(&zdev->allocated_pages, 0);
190 atomic64_set(&zdev->mapped_pages, 0);
191 atomic64_set(&zdev->unmapped_pages, 0);
192
193 args.fmb_addr = virt_to_phys(zdev->fmb);
194 return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
195 }
196
197 /* Modify PCI: Disable PCI function measurement */
zpci_fmb_disable_device(struct zpci_dev * zdev)198 int zpci_fmb_disable_device(struct zpci_dev *zdev)
199 {
200 struct mod_pci_args args = { 0, 0, 0, 0 };
201 int rc;
202
203 if (!zdev->fmb)
204 return -EINVAL;
205
206 /* Function measurement is disabled if fmb address is zero */
207 rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
208
209 kmem_cache_free(zdev_fmb_cache, zdev->fmb);
210 zdev->fmb = NULL;
211 return rc;
212 }
213
214 #define ZPCI_PCIAS_CFGSPC 15
215
zpci_cfg_load(struct zpci_dev * zdev,int offset,u32 * val,u8 len)216 static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
217 {
218 u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
219 u64 data;
220 int rc;
221
222 rc = zpci_load(&data, req, offset);
223 if (!rc) {
224 data = data << ((8 - len) * 8);
225 data = le64_to_cpu(data);
226 *val = (u32) data;
227 } else
228 *val = 0xffffffff;
229 return rc;
230 }
231
zpci_cfg_store(struct zpci_dev * zdev,int offset,u32 val,u8 len)232 static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
233 {
234 u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
235 u64 data = val;
236 int rc;
237
238 data = cpu_to_le64(data);
239 data = data >> ((8 - len) * 8);
240 rc = zpci_store(data, req, offset);
241 return rc;
242 }
243
pcibios_fixup_bus(struct pci_bus * bus)244 void pcibios_fixup_bus(struct pci_bus *bus)
245 {
246 }
247
pcibios_align_resource(void * data,const struct resource * res,resource_size_t size,resource_size_t align)248 resource_size_t pcibios_align_resource(void *data, const struct resource *res,
249 resource_size_t size,
250 resource_size_t align)
251 {
252 return 0;
253 }
254
255 /* combine single writes by using store-block insn */
__iowrite64_copy(void __iomem * to,const void * from,size_t count)256 void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
257 {
258 zpci_memcpy_toio(to, from, count);
259 }
260
261 /* Create a virtual mapping cookie for a PCI BAR */
pci_iomap_range(struct pci_dev * pdev,int bar,unsigned long offset,unsigned long max)262 void __iomem *pci_iomap_range(struct pci_dev *pdev,
263 int bar,
264 unsigned long offset,
265 unsigned long max)
266 {
267 struct zpci_dev *zdev = to_zpci(pdev);
268 u64 addr;
269 int idx;
270
271 if ((bar & 7) != bar)
272 return NULL;
273
274 idx = zdev->bars[bar].map_idx;
275 spin_lock(&zpci_iomap_lock);
276 if (zpci_iomap_start[idx].count++) {
277 BUG_ON(zpci_iomap_start[idx].fh != zdev->fh ||
278 zpci_iomap_start[idx].bar != bar);
279 } else {
280 zpci_iomap_start[idx].fh = zdev->fh;
281 zpci_iomap_start[idx].bar = bar;
282 }
283 /* Detect overrun */
284 BUG_ON(!zpci_iomap_start[idx].count);
285 spin_unlock(&zpci_iomap_lock);
286
287 addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
288 return (void __iomem *) addr + offset;
289 }
290 EXPORT_SYMBOL(pci_iomap_range);
291
pci_iomap(struct pci_dev * dev,int bar,unsigned long maxlen)292 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
293 {
294 return pci_iomap_range(dev, bar, 0, maxlen);
295 }
296 EXPORT_SYMBOL(pci_iomap);
297
pci_iounmap(struct pci_dev * pdev,void __iomem * addr)298 void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
299 {
300 unsigned int idx;
301
302 idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48;
303 spin_lock(&zpci_iomap_lock);
304 /* Detect underrun */
305 BUG_ON(!zpci_iomap_start[idx].count);
306 if (!--zpci_iomap_start[idx].count) {
307 zpci_iomap_start[idx].fh = 0;
308 zpci_iomap_start[idx].bar = 0;
309 }
310 spin_unlock(&zpci_iomap_lock);
311 }
312 EXPORT_SYMBOL(pci_iounmap);
313
pci_read(struct pci_bus * bus,unsigned int devfn,int where,int size,u32 * val)314 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
315 int size, u32 *val)
316 {
317 struct zpci_dev *zdev = get_zdev_by_bus(bus);
318 int ret;
319
320 if (!zdev || devfn != ZPCI_DEVFN)
321 ret = -ENODEV;
322 else
323 ret = zpci_cfg_load(zdev, where, val, size);
324
325 return ret;
326 }
327
pci_write(struct pci_bus * bus,unsigned int devfn,int where,int size,u32 val)328 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
329 int size, u32 val)
330 {
331 struct zpci_dev *zdev = get_zdev_by_bus(bus);
332 int ret;
333
334 if (!zdev || devfn != ZPCI_DEVFN)
335 ret = -ENODEV;
336 else
337 ret = zpci_cfg_store(zdev, where, val, size);
338
339 return ret;
340 }
341
342 static struct pci_ops pci_root_ops = {
343 .read = pci_read,
344 .write = pci_write,
345 };
346
zpci_irq_handler(struct airq_struct * airq)347 static void zpci_irq_handler(struct airq_struct *airq)
348 {
349 unsigned long si, ai;
350 struct airq_iv *aibv;
351 int irqs_on = 0;
352
353 inc_irq_stat(IRQIO_PCI);
354 for (si = 0;;) {
355 /* Scan adapter summary indicator bit vector */
356 si = airq_iv_scan(zpci_aisb_iv, si, airq_iv_end(zpci_aisb_iv));
357 if (si == -1UL) {
358 if (irqs_on++)
359 /* End of second scan with interrupts on. */
360 break;
361 /* First scan complete, reenable interrupts. */
362 if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC))
363 break;
364 si = 0;
365 continue;
366 }
367
368 /* Scan the adapter interrupt vector for this device. */
369 aibv = zpci_aibv[si];
370 for (ai = 0;;) {
371 ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv));
372 if (ai == -1UL)
373 break;
374 inc_irq_stat(IRQIO_MSI);
375 airq_iv_lock(aibv, ai);
376 generic_handle_irq(airq_iv_get_data(aibv, ai));
377 airq_iv_unlock(aibv, ai);
378 }
379 }
380 }
381
arch_setup_msi_irqs(struct pci_dev * pdev,int nvec,int type)382 int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
383 {
384 struct zpci_dev *zdev = to_zpci(pdev);
385 unsigned int hwirq, msi_vecs;
386 unsigned long aisb;
387 struct msi_desc *msi;
388 struct msi_msg msg;
389 int rc, irq;
390
391 if (type == PCI_CAP_ID_MSI && nvec > 1)
392 return 1;
393 msi_vecs = min_t(unsigned int, nvec, zdev->max_msi);
394
395 /* Allocate adapter summary indicator bit */
396 rc = -EIO;
397 aisb = airq_iv_alloc_bit(zpci_aisb_iv);
398 if (aisb == -1UL)
399 goto out;
400 zdev->aisb = aisb;
401
402 /* Create adapter interrupt vector */
403 rc = -ENOMEM;
404 zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK);
405 if (!zdev->aibv)
406 goto out_si;
407
408 /* Wire up shortcut pointer */
409 zpci_aibv[aisb] = zdev->aibv;
410
411 /* Request MSI interrupts */
412 hwirq = 0;
413 for_each_pci_msi_entry(msi, pdev) {
414 rc = -EIO;
415 if (hwirq >= msi_vecs)
416 break;
417 irq = irq_alloc_desc(0); /* Alloc irq on node 0 */
418 if (irq < 0)
419 goto out_msi;
420 rc = irq_set_msi_desc(irq, msi);
421 if (rc)
422 goto out_msi;
423 irq_set_chip_and_handler(irq, &zpci_irq_chip,
424 handle_simple_irq);
425 msg.data = hwirq;
426 msg.address_lo = zdev->msi_addr & 0xffffffff;
427 msg.address_hi = zdev->msi_addr >> 32;
428 pci_write_msi_msg(irq, &msg);
429 airq_iv_set_data(zdev->aibv, hwirq, irq);
430 hwirq++;
431 }
432
433 /* Enable adapter interrupts */
434 rc = zpci_set_airq(zdev);
435 if (rc)
436 goto out_msi;
437
438 return (msi_vecs == nvec) ? 0 : msi_vecs;
439
440 out_msi:
441 for_each_pci_msi_entry(msi, pdev) {
442 if (hwirq-- == 0)
443 break;
444 irq_set_msi_desc(msi->irq, NULL);
445 irq_free_desc(msi->irq);
446 msi->msg.address_lo = 0;
447 msi->msg.address_hi = 0;
448 msi->msg.data = 0;
449 msi->irq = 0;
450 }
451 zpci_aibv[aisb] = NULL;
452 airq_iv_release(zdev->aibv);
453 out_si:
454 airq_iv_free_bit(zpci_aisb_iv, aisb);
455 out:
456 return rc;
457 }
458
arch_teardown_msi_irqs(struct pci_dev * pdev)459 void arch_teardown_msi_irqs(struct pci_dev *pdev)
460 {
461 struct zpci_dev *zdev = to_zpci(pdev);
462 struct msi_desc *msi;
463 int rc;
464
465 /* Disable adapter interrupts */
466 rc = zpci_clear_airq(zdev);
467 if (rc)
468 return;
469
470 /* Release MSI interrupts */
471 for_each_pci_msi_entry(msi, pdev) {
472 if (msi->msi_attrib.is_msix)
473 __pci_msix_desc_mask_irq(msi, 1);
474 else
475 __pci_msi_desc_mask_irq(msi, 1, 1);
476 irq_set_msi_desc(msi->irq, NULL);
477 irq_free_desc(msi->irq);
478 msi->msg.address_lo = 0;
479 msi->msg.address_hi = 0;
480 msi->msg.data = 0;
481 msi->irq = 0;
482 }
483
484 zpci_aibv[zdev->aisb] = NULL;
485 airq_iv_release(zdev->aibv);
486 airq_iv_free_bit(zpci_aisb_iv, zdev->aisb);
487 }
488
zpci_map_resources(struct pci_dev * pdev)489 static void zpci_map_resources(struct pci_dev *pdev)
490 {
491 resource_size_t len;
492 int i;
493
494 for (i = 0; i < PCI_BAR_COUNT; i++) {
495 len = pci_resource_len(pdev, i);
496 if (!len)
497 continue;
498 pdev->resource[i].start =
499 (resource_size_t __force) pci_iomap(pdev, i, 0);
500 pdev->resource[i].end = pdev->resource[i].start + len - 1;
501 }
502 }
503
zpci_unmap_resources(struct pci_dev * pdev)504 static void zpci_unmap_resources(struct pci_dev *pdev)
505 {
506 resource_size_t len;
507 int i;
508
509 for (i = 0; i < PCI_BAR_COUNT; i++) {
510 len = pci_resource_len(pdev, i);
511 if (!len)
512 continue;
513 pci_iounmap(pdev, (void __iomem __force *)
514 pdev->resource[i].start);
515 }
516 }
517
zpci_irq_init(void)518 static int __init zpci_irq_init(void)
519 {
520 int rc;
521
522 rc = register_adapter_interrupt(&zpci_airq);
523 if (rc)
524 goto out;
525 /* Set summary to 1 to be called every time for the ISC. */
526 *zpci_airq.lsi_ptr = 1;
527
528 rc = -ENOMEM;
529 zpci_aisb_iv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC);
530 if (!zpci_aisb_iv)
531 goto out_airq;
532
533 zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
534 return 0;
535
536 out_airq:
537 unregister_adapter_interrupt(&zpci_airq);
538 out:
539 return rc;
540 }
541
zpci_irq_exit(void)542 static void zpci_irq_exit(void)
543 {
544 airq_iv_release(zpci_aisb_iv);
545 unregister_adapter_interrupt(&zpci_airq);
546 }
547
zpci_alloc_iomap(struct zpci_dev * zdev)548 static int zpci_alloc_iomap(struct zpci_dev *zdev)
549 {
550 int entry;
551
552 spin_lock(&zpci_iomap_lock);
553 entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
554 if (entry == ZPCI_IOMAP_MAX_ENTRIES) {
555 spin_unlock(&zpci_iomap_lock);
556 return -ENOSPC;
557 }
558 set_bit(entry, zpci_iomap);
559 spin_unlock(&zpci_iomap_lock);
560 return entry;
561 }
562
zpci_free_iomap(struct zpci_dev * zdev,int entry)563 static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
564 {
565 spin_lock(&zpci_iomap_lock);
566 memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
567 clear_bit(entry, zpci_iomap);
568 spin_unlock(&zpci_iomap_lock);
569 }
570
__alloc_res(struct zpci_dev * zdev,unsigned long start,unsigned long size,unsigned long flags)571 static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start,
572 unsigned long size, unsigned long flags)
573 {
574 struct resource *r;
575
576 r = kzalloc(sizeof(*r), GFP_KERNEL);
577 if (!r)
578 return NULL;
579
580 r->start = start;
581 r->end = r->start + size - 1;
582 r->flags = flags;
583 r->name = zdev->res_name;
584
585 if (request_resource(&iomem_resource, r)) {
586 kfree(r);
587 return NULL;
588 }
589 return r;
590 }
591
zpci_setup_bus_resources(struct zpci_dev * zdev,struct list_head * resources)592 static int zpci_setup_bus_resources(struct zpci_dev *zdev,
593 struct list_head *resources)
594 {
595 unsigned long addr, size, flags;
596 struct resource *res;
597 int i, entry;
598
599 snprintf(zdev->res_name, sizeof(zdev->res_name),
600 "PCI Bus %04x:%02x", zdev->domain, ZPCI_BUS_NR);
601
602 for (i = 0; i < PCI_BAR_COUNT; i++) {
603 if (!zdev->bars[i].size)
604 continue;
605 entry = zpci_alloc_iomap(zdev);
606 if (entry < 0)
607 return entry;
608 zdev->bars[i].map_idx = entry;
609
610 /* only MMIO is supported */
611 flags = IORESOURCE_MEM;
612 if (zdev->bars[i].val & 8)
613 flags |= IORESOURCE_PREFETCH;
614 if (zdev->bars[i].val & 4)
615 flags |= IORESOURCE_MEM_64;
616
617 addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48);
618
619 size = 1UL << zdev->bars[i].size;
620
621 res = __alloc_res(zdev, addr, size, flags);
622 if (!res) {
623 zpci_free_iomap(zdev, entry);
624 return -ENOMEM;
625 }
626 zdev->bars[i].res = res;
627 pci_add_resource(resources, res);
628 }
629
630 return 0;
631 }
632
zpci_cleanup_bus_resources(struct zpci_dev * zdev)633 static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
634 {
635 int i;
636
637 for (i = 0; i < PCI_BAR_COUNT; i++) {
638 if (!zdev->bars[i].size || !zdev->bars[i].res)
639 continue;
640
641 zpci_free_iomap(zdev, zdev->bars[i].map_idx);
642 release_resource(zdev->bars[i].res);
643 kfree(zdev->bars[i].res);
644 }
645 }
646
pcibios_add_device(struct pci_dev * pdev)647 int pcibios_add_device(struct pci_dev *pdev)
648 {
649 struct zpci_dev *zdev = to_zpci(pdev);
650 struct resource *res;
651 int i;
652
653 zdev->pdev = pdev;
654 pdev->dev.groups = zpci_attr_groups;
655 zpci_map_resources(pdev);
656
657 for (i = 0; i < PCI_BAR_COUNT; i++) {
658 res = &pdev->resource[i];
659 if (res->parent || !res->flags)
660 continue;
661 pci_claim_resource(pdev, i);
662 }
663
664 return 0;
665 }
666
pcibios_release_device(struct pci_dev * pdev)667 void pcibios_release_device(struct pci_dev *pdev)
668 {
669 zpci_unmap_resources(pdev);
670 }
671
pcibios_enable_device(struct pci_dev * pdev,int mask)672 int pcibios_enable_device(struct pci_dev *pdev, int mask)
673 {
674 struct zpci_dev *zdev = to_zpci(pdev);
675
676 zdev->pdev = pdev;
677 zpci_debug_init_device(zdev);
678 zpci_fmb_enable_device(zdev);
679
680 return pci_enable_resources(pdev, mask);
681 }
682
pcibios_disable_device(struct pci_dev * pdev)683 void pcibios_disable_device(struct pci_dev *pdev)
684 {
685 struct zpci_dev *zdev = to_zpci(pdev);
686
687 zpci_fmb_disable_device(zdev);
688 zpci_debug_exit_device(zdev);
689 zdev->pdev = NULL;
690 }
691
692 #ifdef CONFIG_HIBERNATE_CALLBACKS
zpci_restore(struct device * dev)693 static int zpci_restore(struct device *dev)
694 {
695 struct pci_dev *pdev = to_pci_dev(dev);
696 struct zpci_dev *zdev = to_zpci(pdev);
697 int ret = 0;
698
699 if (zdev->state != ZPCI_FN_STATE_ONLINE)
700 goto out;
701
702 ret = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
703 if (ret)
704 goto out;
705
706 zpci_map_resources(pdev);
707 zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
708 (u64) zdev->dma_table);
709
710 out:
711 return ret;
712 }
713
zpci_freeze(struct device * dev)714 static int zpci_freeze(struct device *dev)
715 {
716 struct pci_dev *pdev = to_pci_dev(dev);
717 struct zpci_dev *zdev = to_zpci(pdev);
718
719 if (zdev->state != ZPCI_FN_STATE_ONLINE)
720 return 0;
721
722 zpci_unregister_ioat(zdev, 0);
723 zpci_unmap_resources(pdev);
724 return clp_disable_fh(zdev);
725 }
726
727 struct dev_pm_ops pcibios_pm_ops = {
728 .thaw_noirq = zpci_restore,
729 .freeze_noirq = zpci_freeze,
730 .restore_noirq = zpci_restore,
731 .poweroff_noirq = zpci_freeze,
732 };
733 #endif /* CONFIG_HIBERNATE_CALLBACKS */
734
zpci_alloc_domain(struct zpci_dev * zdev)735 static int zpci_alloc_domain(struct zpci_dev *zdev)
736 {
737 spin_lock(&zpci_domain_lock);
738 zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
739 if (zdev->domain == ZPCI_NR_DEVICES) {
740 spin_unlock(&zpci_domain_lock);
741 return -ENOSPC;
742 }
743 set_bit(zdev->domain, zpci_domain);
744 spin_unlock(&zpci_domain_lock);
745 return 0;
746 }
747
zpci_free_domain(struct zpci_dev * zdev)748 static void zpci_free_domain(struct zpci_dev *zdev)
749 {
750 spin_lock(&zpci_domain_lock);
751 clear_bit(zdev->domain, zpci_domain);
752 spin_unlock(&zpci_domain_lock);
753 }
754
pcibios_remove_bus(struct pci_bus * bus)755 void pcibios_remove_bus(struct pci_bus *bus)
756 {
757 struct zpci_dev *zdev = get_zdev_by_bus(bus);
758
759 zpci_exit_slot(zdev);
760 zpci_cleanup_bus_resources(zdev);
761 zpci_free_domain(zdev);
762
763 spin_lock(&zpci_list_lock);
764 list_del(&zdev->entry);
765 spin_unlock(&zpci_list_lock);
766
767 kfree(zdev);
768 }
769
zpci_scan_bus(struct zpci_dev * zdev)770 static int zpci_scan_bus(struct zpci_dev *zdev)
771 {
772 LIST_HEAD(resources);
773 int ret;
774
775 ret = zpci_setup_bus_resources(zdev, &resources);
776 if (ret)
777 goto error;
778
779 zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
780 zdev, &resources);
781 if (!zdev->bus) {
782 ret = -EIO;
783 goto error;
784 }
785 zdev->bus->max_bus_speed = zdev->max_bus_speed;
786 pci_bus_add_devices(zdev->bus);
787 return 0;
788
789 error:
790 zpci_cleanup_bus_resources(zdev);
791 pci_free_resource_list(&resources);
792 return ret;
793 }
794
zpci_enable_device(struct zpci_dev * zdev)795 int zpci_enable_device(struct zpci_dev *zdev)
796 {
797 int rc;
798
799 rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
800 if (rc)
801 goto out;
802
803 rc = zpci_dma_init_device(zdev);
804 if (rc)
805 goto out_dma;
806
807 zdev->state = ZPCI_FN_STATE_ONLINE;
808 return 0;
809
810 out_dma:
811 clp_disable_fh(zdev);
812 out:
813 return rc;
814 }
815 EXPORT_SYMBOL_GPL(zpci_enable_device);
816
zpci_disable_device(struct zpci_dev * zdev)817 int zpci_disable_device(struct zpci_dev *zdev)
818 {
819 zpci_dma_exit_device(zdev);
820 return clp_disable_fh(zdev);
821 }
822 EXPORT_SYMBOL_GPL(zpci_disable_device);
823
zpci_create_device(struct zpci_dev * zdev)824 int zpci_create_device(struct zpci_dev *zdev)
825 {
826 int rc;
827
828 rc = zpci_alloc_domain(zdev);
829 if (rc)
830 goto out;
831
832 mutex_init(&zdev->lock);
833 if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
834 rc = zpci_enable_device(zdev);
835 if (rc)
836 goto out_free;
837 }
838 rc = zpci_scan_bus(zdev);
839 if (rc)
840 goto out_disable;
841
842 spin_lock(&zpci_list_lock);
843 list_add_tail(&zdev->entry, &zpci_list);
844 spin_unlock(&zpci_list_lock);
845
846 zpci_init_slot(zdev);
847
848 return 0;
849
850 out_disable:
851 if (zdev->state == ZPCI_FN_STATE_ONLINE)
852 zpci_disable_device(zdev);
853 out_free:
854 zpci_free_domain(zdev);
855 out:
856 return rc;
857 }
858
zpci_stop_device(struct zpci_dev * zdev)859 void zpci_stop_device(struct zpci_dev *zdev)
860 {
861 zpci_dma_exit_device(zdev);
862 /*
863 * Note: SCLP disables fh via set-pci-fn so don't
864 * do that here.
865 */
866 }
867 EXPORT_SYMBOL_GPL(zpci_stop_device);
868
barsize(u8 size)869 static inline int barsize(u8 size)
870 {
871 return (size) ? (1 << size) >> 10 : 0;
872 }
873
zpci_mem_init(void)874 static int zpci_mem_init(void)
875 {
876 BUILD_BUG_ON(!is_power_of_2(__alignof__(struct zpci_fmb)) ||
877 __alignof__(struct zpci_fmb) < sizeof(struct zpci_fmb));
878
879 zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
880 __alignof__(struct zpci_fmb), 0, NULL);
881 if (!zdev_fmb_cache)
882 goto error_zdev;
883
884 /* TODO: use realloc */
885 zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start),
886 GFP_KERNEL);
887 if (!zpci_iomap_start)
888 goto error_iomap;
889 return 0;
890
891 error_iomap:
892 kmem_cache_destroy(zdev_fmb_cache);
893 error_zdev:
894 return -ENOMEM;
895 }
896
zpci_mem_exit(void)897 static void zpci_mem_exit(void)
898 {
899 kfree(zpci_iomap_start);
900 kmem_cache_destroy(zdev_fmb_cache);
901 }
902
903 static unsigned int s390_pci_probe = 1;
904 static unsigned int s390_pci_initialized;
905
pcibios_setup(char * str)906 char * __init pcibios_setup(char *str)
907 {
908 if (!strcmp(str, "off")) {
909 s390_pci_probe = 0;
910 return NULL;
911 }
912 return str;
913 }
914
zpci_is_enabled(void)915 bool zpci_is_enabled(void)
916 {
917 return s390_pci_initialized;
918 }
919
pci_base_init(void)920 static int __init pci_base_init(void)
921 {
922 int rc;
923
924 if (!s390_pci_probe)
925 return 0;
926
927 if (!test_facility(69) || !test_facility(71))
928 return 0;
929
930 rc = zpci_debug_init();
931 if (rc)
932 goto out;
933
934 rc = zpci_mem_init();
935 if (rc)
936 goto out_mem;
937
938 rc = zpci_irq_init();
939 if (rc)
940 goto out_irq;
941
942 rc = zpci_dma_init();
943 if (rc)
944 goto out_dma;
945
946 rc = clp_scan_pci_devices();
947 if (rc)
948 goto out_find;
949
950 s390_pci_initialized = 1;
951 return 0;
952
953 out_find:
954 zpci_dma_exit();
955 out_dma:
956 zpci_irq_exit();
957 out_irq:
958 zpci_mem_exit();
959 out_mem:
960 zpci_debug_exit();
961 out:
962 return rc;
963 }
964 subsys_initcall_sync(pci_base_init);
965
zpci_rescan(void)966 void zpci_rescan(void)
967 {
968 if (zpci_is_enabled())
969 clp_rescan_pci_devices_simple();
970 }
971