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1/*
2 * Abilis Systems TB10X SOC device tree
3 *
4 * Copyright (C) Abilis Systems 2013
5 *
6 * Author: Christian Ruppert <christian.ruppert@abilis.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
20 */
21
22
23/ {
24	compatible		= "abilis,arc-tb10x";
25	#address-cells		= <1>;
26	#size-cells		= <1>;
27
28	cpus {
29		#address-cells = <1>;
30		#size-cells = <0>;
31		cpu@0 {
32			device_type = "cpu";
33			compatible = "snps,arc770d";
34			reg = <0>;
35		};
36	};
37
38	soc100 {
39		#address-cells	= <1>;
40		#size-cells	= <1>;
41		device_type	= "soc";
42		ranges		= <0xfe000000 0xfe000000 0x02000000
43				0x000F0000 0x000F0000 0x00010000>;
44		compatible	= "abilis,tb10x", "simple-bus";
45
46		pll0: oscillator {
47			compatible = "fixed-clock";
48			#clock-cells = <0>;
49			clock-output-names = "pll0";
50		};
51		cpu_clk: clkdiv_cpu {
52			compatible = "fixed-factor-clock";
53			#clock-cells = <0>;
54			clocks = <&pll0>;
55			clock-output-names = "cpu_clk";
56		};
57		ahb_clk: clkdiv_ahb {
58			compatible = "fixed-factor-clock";
59			#clock-cells = <0>;
60			clocks = <&pll0>;
61			clock-output-names = "ahb_clk";
62		};
63
64		iomux: iomux@FF10601c {
65			compatible = "abilis,tb10x-iomux";
66			#gpio-range-cells = <3>;
67			reg = <0xFF10601c 0x4>;
68		};
69
70		intc: interrupt-controller {
71			compatible = "snps,arc700-intc";
72			interrupt-controller;
73			#interrupt-cells = <1>;
74		};
75		tb10x_ictl: pic@fe002000 {
76			compatible = "abilis,tb10x-ictl";
77			reg = <0xFE002000 0x20>;
78			interrupt-controller;
79			#interrupt-cells = <2>;
80			interrupt-parent = <&intc>;
81			interrupts = <5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
82					20 21 22 23 24 25 26 27 28 29 30 31>;
83		};
84
85		uart@FF100000 {
86			compatible = "snps,dw-apb-uart";
87			reg = <0xFF100000 0x100>;
88			clock-frequency = <166666666>;
89			interrupts = <25 8>;
90			reg-shift = <2>;
91			reg-io-width = <4>;
92			interrupt-parent = <&tb10x_ictl>;
93		};
94		ethernet@FE100000 {
95			compatible = "snps,dwmac-3.70a","snps,dwmac";
96			reg = <0xFE100000 0x1058>;
97			interrupt-parent = <&tb10x_ictl>;
98			interrupts = <6 8>;
99			interrupt-names = "macirq";
100			clocks = <&ahb_clk>;
101			clock-names = "stmmaceth";
102		};
103		dma@FE000000 {
104			compatible = "snps,dma-spear1340";
105			reg = <0xFE000000 0x400>;
106			interrupt-parent = <&tb10x_ictl>;
107			interrupts = <14 8>;
108			dma-channels = <6>;
109			dma-requests = <0>;
110			dma-masters = <1>;
111			#dma-cells = <3>;
112			chan_allocation_order = <0>;
113			chan_priority = <1>;
114			block_size = <0x7ff>;
115			data_width = <2>;
116			clocks = <&ahb_clk>;
117			clock-names = "hclk";
118		};
119
120		i2c0: i2c@FF120000 {
121			#address-cells = <1>;
122			#size-cells = <0>;
123			compatible = "snps,designware-i2c";
124			reg = <0xFF120000 0x1000>;
125			interrupt-parent = <&tb10x_ictl>;
126			interrupts = <12 8>;
127			clocks = <&ahb_clk>;
128		};
129		i2c1: i2c@FF121000 {
130			#address-cells = <1>;
131			#size-cells = <0>;
132			compatible = "snps,designware-i2c";
133			reg = <0xFF121000 0x1000>;
134			interrupt-parent = <&tb10x_ictl>;
135			interrupts = <12 8>;
136			clocks = <&ahb_clk>;
137		};
138		i2c2: i2c@FF122000 {
139			#address-cells = <1>;
140			#size-cells = <0>;
141			compatible = "snps,designware-i2c";
142			reg = <0xFF122000 0x1000>;
143			interrupt-parent = <&tb10x_ictl>;
144			interrupts = <12 8>;
145			clocks = <&ahb_clk>;
146		};
147		i2c3: i2c@FF123000 {
148			#address-cells = <1>;
149			#size-cells = <0>;
150			compatible = "snps,designware-i2c";
151			reg = <0xFF123000 0x1000>;
152			interrupt-parent = <&tb10x_ictl>;
153			interrupts = <12 8>;
154			clocks = <&ahb_clk>;
155		};
156		i2c4: i2c@FF124000 {
157			#address-cells = <1>;
158			#size-cells = <0>;
159			compatible = "snps,designware-i2c";
160			reg = <0xFF124000 0x1000>;
161			interrupt-parent = <&tb10x_ictl>;
162			interrupts = <12 8>;
163			clocks = <&ahb_clk>;
164		};
165
166		spi0: spi@0xFE010000 {
167			#address-cells = <1>;
168			#size-cells = <0>;
169			cell-index = <0>;
170			compatible = "abilis,tb100-spi";
171			num-cs = <1>;
172			reg = <0xFE010000 0x20>;
173			interrupt-parent = <&tb10x_ictl>;
174			interrupts = <26 8>;
175			clocks = <&ahb_clk>;
176		};
177		spi1: spi@0xFE011000 {
178			#address-cells = <1>;
179			#size-cells = <0>;
180			cell-index = <1>;
181			compatible = "abilis,tb100-spi";
182			num-cs = <2>;
183			reg = <0xFE011000 0x20>;
184			interrupt-parent = <&tb10x_ictl>;
185			interrupts = <10 8>;
186			clocks = <&ahb_clk>;
187		};
188
189		tb10x_tsm: tb10x-tsm@ff316000 {
190			compatible = "abilis,tb100-tsm";
191			reg = <0xff316000 0x400>;
192			interrupt-parent = <&tb10x_ictl>;
193			interrupts = <17 8>;
194			output-clkdiv = <4>;
195			global-packet-delay = <0x21>;
196			port-packet-delay = <0>;
197		};
198		tb10x_stream_proc: tb10x-stream-proc {
199			compatible = "abilis,tb100-streamproc";
200			reg =   <0xfff00000 0x200>,
201				<0x000f0000 0x10000>,
202				<0xfff00200 0x105>,
203				<0xff10600c 0x1>,
204				<0xfe001018 0x1>;
205			reg-names =     "mbox",
206					"sp_iccm",
207					"mbox_irq",
208					"cpuctrl",
209					"a6it_int_force";
210			interrupt-parent = <&tb10x_ictl>;
211			interrupts = <20 2>, <19 2>;
212			interrupt-names = "cmd_irq", "event_irq";
213		};
214		tb10x_mdsc0: tb10x-mdscr@FF300000 {
215			compatible = "abilis,tb100-mdscr";
216			reg = <0xFF300000 0x7000>;
217			tb100-mdscr-manage-tsin;
218		};
219		tb10x_mscr0: tb10x-mdscr@FF307000 {
220			compatible = "abilis,tb100-mdscr";
221			reg = <0xFF307000 0x7000>;
222		};
223		tb10x_scr0: tb10x-mdscr@ff30e000 {
224			compatible = "abilis,tb100-mdscr";
225			reg = <0xFF30e000 0x4000>;
226			tb100-mdscr-manage-tsin;
227		};
228		tb10x_scr1: tb10x-mdscr@ff312000 {
229			compatible = "abilis,tb100-mdscr";
230			reg = <0xFF312000 0x4000>;
231			tb100-mdscr-manage-tsin;
232		};
233		tb10x_wfb: tb10x-wfb@ff319000 {
234			compatible = "abilis,tb100-wfb";
235			reg = <0xff319000 0x1000>;
236			interrupt-parent = <&tb10x_ictl>;
237			interrupts = <16 8>;
238		};
239	};
240};
241