1 /*
2 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
3 * Copyright (C) 2009 Sascha Hauer (kernel@pengutronix.de)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/i2c.h>
23 #include <linux/platform_data/at24.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/spi/spi.h>
26 #include <linux/spi/eeprom.h>
27 #include <linux/irq.h>
28 #include <linux/delay.h>
29 #include <linux/gpio.h>
30 #include <linux/usb/otg.h>
31 #include <linux/usb/ulpi.h>
32
33 #include <asm/mach/arch.h>
34 #include <asm/mach-types.h>
35 #include <asm/mach/time.h>
36
37 #include "common.h"
38 #include "devices-imx27.h"
39 #include "ehci.h"
40 #include "hardware.h"
41 #include "iomux-mx27.h"
42 #include "ulpi.h"
43
44 #define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
45 #define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
46 #define SPI1_SS0 (GPIO_PORTD + 28)
47 #define SPI1_SS1 (GPIO_PORTD + 27)
48 #define SD2_CD (GPIO_PORTC + 29)
49
50 static const int pca100_pins[] __initconst = {
51 /* UART1 */
52 PE12_PF_UART1_TXD,
53 PE13_PF_UART1_RXD,
54 PE14_PF_UART1_CTS,
55 PE15_PF_UART1_RTS,
56 /* SDHC */
57 PB4_PF_SD2_D0,
58 PB5_PF_SD2_D1,
59 PB6_PF_SD2_D2,
60 PB7_PF_SD2_D3,
61 PB8_PF_SD2_CMD,
62 PB9_PF_SD2_CLK,
63 SD2_CD | GPIO_GPIO | GPIO_IN,
64 /* FEC */
65 PD0_AIN_FEC_TXD0,
66 PD1_AIN_FEC_TXD1,
67 PD2_AIN_FEC_TXD2,
68 PD3_AIN_FEC_TXD3,
69 PD4_AOUT_FEC_RX_ER,
70 PD5_AOUT_FEC_RXD1,
71 PD6_AOUT_FEC_RXD2,
72 PD7_AOUT_FEC_RXD3,
73 PD8_AF_FEC_MDIO,
74 PD9_AIN_FEC_MDC,
75 PD10_AOUT_FEC_CRS,
76 PD11_AOUT_FEC_TX_CLK,
77 PD12_AOUT_FEC_RXD0,
78 PD13_AOUT_FEC_RX_DV,
79 PD14_AOUT_FEC_RX_CLK,
80 PD15_AOUT_FEC_COL,
81 PD16_AIN_FEC_TX_ER,
82 PF23_AIN_FEC_TX_EN,
83 /* SSI1 */
84 PC20_PF_SSI1_FS,
85 PC21_PF_SSI1_RXD,
86 PC22_PF_SSI1_TXD,
87 PC23_PF_SSI1_CLK,
88 /* onboard I2C */
89 PC5_PF_I2C2_SDA,
90 PC6_PF_I2C2_SCL,
91 /* external I2C */
92 PD17_PF_I2C_DATA,
93 PD18_PF_I2C_CLK,
94 /* SPI1 */
95 PD25_PF_CSPI1_RDY,
96 PD29_PF_CSPI1_SCLK,
97 PD30_PF_CSPI1_MISO,
98 PD31_PF_CSPI1_MOSI,
99 /* OTG */
100 OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
101 PC7_PF_USBOTG_DATA5,
102 PC8_PF_USBOTG_DATA6,
103 PC9_PF_USBOTG_DATA0,
104 PC10_PF_USBOTG_DATA2,
105 PC11_PF_USBOTG_DATA1,
106 PC12_PF_USBOTG_DATA4,
107 PC13_PF_USBOTG_DATA3,
108 PE0_PF_USBOTG_NXT,
109 PE1_PF_USBOTG_STP,
110 PE2_PF_USBOTG_DIR,
111 PE24_PF_USBOTG_CLK,
112 PE25_PF_USBOTG_DATA7,
113 /* USBH2 */
114 USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
115 PA0_PF_USBH2_CLK,
116 PA1_PF_USBH2_DIR,
117 PA2_PF_USBH2_DATA7,
118 PA3_PF_USBH2_NXT,
119 PA4_PF_USBH2_STP,
120 PD19_AF_USBH2_DATA4,
121 PD20_AF_USBH2_DATA3,
122 PD21_AF_USBH2_DATA6,
123 PD22_AF_USBH2_DATA0,
124 PD23_AF_USBH2_DATA2,
125 PD24_AF_USBH2_DATA1,
126 PD26_AF_USBH2_DATA5,
127 /* display */
128 PA5_PF_LSCLK,
129 PA6_PF_LD0,
130 PA7_PF_LD1,
131 PA8_PF_LD2,
132 PA9_PF_LD3,
133 PA10_PF_LD4,
134 PA11_PF_LD5,
135 PA12_PF_LD6,
136 PA13_PF_LD7,
137 PA14_PF_LD8,
138 PA15_PF_LD9,
139 PA16_PF_LD10,
140 PA17_PF_LD11,
141 PA18_PF_LD12,
142 PA19_PF_LD13,
143 PA20_PF_LD14,
144 PA21_PF_LD15,
145 PA22_PF_LD16,
146 PA23_PF_LD17,
147 PA26_PF_PS,
148 PA28_PF_HSYNC,
149 PA29_PF_VSYNC,
150 PA31_PF_OE_ACD,
151 /* free GPIO */
152 GPIO_PORTC | 31 | GPIO_GPIO | GPIO_IN, /* GPIO0_IRQ */
153 GPIO_PORTC | 25 | GPIO_GPIO | GPIO_IN, /* GPIO1_IRQ */
154 GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN, /* GPIO2_IRQ */
155 };
156
157 static const struct imxuart_platform_data uart_pdata __initconst = {
158 .flags = IMXUART_HAVE_RTSCTS,
159 };
160
161 static const struct mxc_nand_platform_data
162 pca100_nand_board_info __initconst = {
163 .width = 1,
164 .hw_ecc = 1,
165 };
166
167 static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
168 .bitrate = 100000,
169 };
170
171 static struct at24_platform_data board_eeprom = {
172 .byte_len = 4096,
173 .page_size = 32,
174 .flags = AT24_FLAG_ADDR16,
175 };
176
177 static struct i2c_board_info pca100_i2c_devices[] = {
178 {
179 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
180 .platform_data = &board_eeprom,
181 }, {
182 I2C_BOARD_INFO("pcf8563", 0x51),
183 }, {
184 I2C_BOARD_INFO("lm75", 0x4a),
185 }
186 };
187
188 static struct spi_eeprom at25320 = {
189 .name = "at25320an",
190 .byte_len = 4096,
191 .page_size = 32,
192 .flags = EE_ADDR2,
193 };
194
195 static struct spi_board_info pca100_spi_board_info[] __initdata = {
196 {
197 .modalias = "at25",
198 .max_speed_hz = 30000,
199 .bus_num = 0,
200 .chip_select = 1,
201 .platform_data = &at25320,
202 },
203 };
204
205 static int pca100_spi_cs[] = {SPI1_SS0, SPI1_SS1};
206
207 static const struct spi_imx_master pca100_spi0_data __initconst = {
208 .chipselect = pca100_spi_cs,
209 .num_chipselect = ARRAY_SIZE(pca100_spi_cs),
210 };
211
pca100_ac97_warm_reset(struct snd_ac97 * ac97)212 static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
213 {
214 mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
215 gpio_set_value(GPIO_PORTC + 20, 1);
216 udelay(2);
217 gpio_set_value(GPIO_PORTC + 20, 0);
218 mxc_gpio_mode(PC20_PF_SSI1_FS);
219 msleep(2);
220 }
221
pca100_ac97_cold_reset(struct snd_ac97 * ac97)222 static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
223 {
224 mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT); /* FS */
225 gpio_set_value(GPIO_PORTC + 20, 0);
226 mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT); /* TX */
227 gpio_set_value(GPIO_PORTC + 22, 0);
228 mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT); /* reset */
229 gpio_set_value(GPIO_PORTC + 28, 0);
230 udelay(10);
231 gpio_set_value(GPIO_PORTC + 28, 1);
232 mxc_gpio_mode(PC20_PF_SSI1_FS);
233 mxc_gpio_mode(PC22_PF_SSI1_TXD);
234 msleep(2);
235 }
236
237 static const struct imx_ssi_platform_data pca100_ssi_pdata __initconst = {
238 .ac97_reset = pca100_ac97_cold_reset,
239 .ac97_warm_reset = pca100_ac97_warm_reset,
240 .flags = IMX_SSI_USE_AC97,
241 };
242
pca100_sdhc2_init(struct device * dev,irq_handler_t detect_irq,void * data)243 static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
244 void *data)
245 {
246 int ret;
247
248 ret = request_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), detect_irq,
249 IRQF_TRIGGER_FALLING, "imx-mmc-detect", data);
250 if (ret)
251 printk(KERN_ERR
252 "pca100: Failed to request irq for sd/mmc detection\n");
253
254 return ret;
255 }
256
pca100_sdhc2_exit(struct device * dev,void * data)257 static void pca100_sdhc2_exit(struct device *dev, void *data)
258 {
259 free_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), data);
260 }
261
262 static const struct imxmmc_platform_data sdhc_pdata __initconst = {
263 .init = pca100_sdhc2_init,
264 .exit = pca100_sdhc2_exit,
265 };
266
otg_phy_init(struct platform_device * pdev)267 static int otg_phy_init(struct platform_device *pdev)
268 {
269 gpio_set_value(OTG_PHY_CS_GPIO, 0);
270
271 mdelay(10);
272
273 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
274 }
275
276 static struct mxc_usbh_platform_data otg_pdata __initdata = {
277 .init = otg_phy_init,
278 .portsc = MXC_EHCI_MODE_ULPI,
279 };
280
usbh2_phy_init(struct platform_device * pdev)281 static int usbh2_phy_init(struct platform_device *pdev)
282 {
283 gpio_set_value(USBH2_PHY_CS_GPIO, 0);
284
285 mdelay(10);
286
287 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
288 }
289
290 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
291 .init = usbh2_phy_init,
292 .portsc = MXC_EHCI_MODE_ULPI,
293 };
294
295 static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
296 .operating_mode = FSL_USB2_DR_DEVICE,
297 .phy_mode = FSL_USB2_PHY_ULPI,
298 };
299
300 static bool otg_mode_host __initdata;
301
pca100_otg_mode(char * options)302 static int __init pca100_otg_mode(char *options)
303 {
304 if (!strcmp(options, "host"))
305 otg_mode_host = true;
306 else if (!strcmp(options, "device"))
307 otg_mode_host = false;
308 else
309 pr_info("otg_mode neither \"host\" nor \"device\". "
310 "Defaulting to device\n");
311 return 1;
312 }
313 __setup("otg_mode=", pca100_otg_mode);
314
315 /* framebuffer info */
316 static struct imx_fb_videomode pca100_fb_modes[] = {
317 {
318 .mode = {
319 .name = "EMERGING-ETV570G0DHU",
320 .refresh = 60,
321 .xres = 640,
322 .yres = 480,
323 .pixclock = 39722, /* in ps (25.175 MHz) */
324 .hsync_len = 30,
325 .left_margin = 114,
326 .right_margin = 16,
327 .vsync_len = 3,
328 .upper_margin = 32,
329 .lower_margin = 0,
330 },
331 /*
332 * TFT
333 * Pixel pol active high
334 * HSYNC active low
335 * VSYNC active low
336 * use HSYNC for ACD count
337 * line clock disable while idle
338 * always enable line clock even if no data
339 */
340 .pcr = 0xf0c08080,
341 .bpp = 16,
342 },
343 };
344
345 static const struct imx_fb_platform_data pca100_fb_data __initconst = {
346 .mode = pca100_fb_modes,
347 .num_modes = ARRAY_SIZE(pca100_fb_modes),
348
349 .pwmr = 0x00A903FF,
350 .lscr1 = 0x00120300,
351 .dmacr = 0x00020010,
352 };
353
pca100_init(void)354 static void __init pca100_init(void)
355 {
356 int ret;
357
358 imx27_soc_init();
359
360 ret = mxc_gpio_setup_multiple_pins(pca100_pins,
361 ARRAY_SIZE(pca100_pins), "PCA100");
362 if (ret)
363 printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
364
365 imx27_add_imx_ssi(0, &pca100_ssi_pdata);
366
367 imx27_add_imx_uart0(&uart_pdata);
368
369 imx27_add_mxc_mmc(1, &sdhc_pdata);
370
371 imx27_add_mxc_nand(&pca100_nand_board_info);
372
373 /* only the i2c master 1 is used on this CPU card */
374 i2c_register_board_info(1, pca100_i2c_devices,
375 ARRAY_SIZE(pca100_i2c_devices));
376
377 imx27_add_imx_i2c(1, &pca100_i2c1_data);
378
379 mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN);
380 mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN);
381 spi_register_board_info(pca100_spi_board_info,
382 ARRAY_SIZE(pca100_spi_board_info));
383 imx27_add_spi_imx0(&pca100_spi0_data);
384
385 gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
386 gpio_direction_output(OTG_PHY_CS_GPIO, 1);
387 gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
388 gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
389
390 if (otg_mode_host) {
391 otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
392 ULPI_OTG_DRVVBUS_EXT);
393
394 if (otg_pdata.otg)
395 imx27_add_mxc_ehci_otg(&otg_pdata);
396 } else {
397 gpio_set_value(OTG_PHY_CS_GPIO, 0);
398 imx27_add_fsl_usb2_udc(&otg_device_pdata);
399 }
400
401 usbh2_pdata.otg = imx_otg_ulpi_create(
402 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
403
404 if (usbh2_pdata.otg)
405 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
406
407 imx27_add_imx_fb(&pca100_fb_data);
408
409 imx27_add_fec(NULL);
410 imx27_add_imx2_wdt();
411 imx27_add_mxc_w1();
412 }
413
pca100_timer_init(void)414 static void __init pca100_timer_init(void)
415 {
416 mx27_clocks_init(26000000);
417 }
418
419 MACHINE_START(PCA100, "phyCARD-i.MX27")
420 .atag_offset = 0x100,
421 .map_io = mx27_map_io,
422 .init_early = imx27_init_early,
423 .init_irq = mx27_init_irq,
424 .init_machine = pca100_init,
425 .init_time = pca100_timer_init,
426 .restart = mxc_restart,
427 MACHINE_END
428