1 /*
2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
4 *
5 * See LICENSE.qlcnic for copyright and licensing details.
6 */
7
8 #include "qlcnic.h"
9 #include "qlcnic_hw.h"
10
11 struct crb_addr_pair {
12 u32 addr;
13 u32 data;
14 };
15
16 #define QLCNIC_MAX_CRB_XFORM 60
17 static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
18
19 #define crb_addr_transform(name) \
20 (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
21 QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
22
23 #define QLCNIC_ADDR_ERROR (0xffffffff)
24
25 static int
26 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter);
27
crb_addr_transform_setup(void)28 static void crb_addr_transform_setup(void)
29 {
30 crb_addr_transform(XDMA);
31 crb_addr_transform(TIMR);
32 crb_addr_transform(SRE);
33 crb_addr_transform(SQN3);
34 crb_addr_transform(SQN2);
35 crb_addr_transform(SQN1);
36 crb_addr_transform(SQN0);
37 crb_addr_transform(SQS3);
38 crb_addr_transform(SQS2);
39 crb_addr_transform(SQS1);
40 crb_addr_transform(SQS0);
41 crb_addr_transform(RPMX7);
42 crb_addr_transform(RPMX6);
43 crb_addr_transform(RPMX5);
44 crb_addr_transform(RPMX4);
45 crb_addr_transform(RPMX3);
46 crb_addr_transform(RPMX2);
47 crb_addr_transform(RPMX1);
48 crb_addr_transform(RPMX0);
49 crb_addr_transform(ROMUSB);
50 crb_addr_transform(SN);
51 crb_addr_transform(QMN);
52 crb_addr_transform(QMS);
53 crb_addr_transform(PGNI);
54 crb_addr_transform(PGND);
55 crb_addr_transform(PGN3);
56 crb_addr_transform(PGN2);
57 crb_addr_transform(PGN1);
58 crb_addr_transform(PGN0);
59 crb_addr_transform(PGSI);
60 crb_addr_transform(PGSD);
61 crb_addr_transform(PGS3);
62 crb_addr_transform(PGS2);
63 crb_addr_transform(PGS1);
64 crb_addr_transform(PGS0);
65 crb_addr_transform(PS);
66 crb_addr_transform(PH);
67 crb_addr_transform(NIU);
68 crb_addr_transform(I2Q);
69 crb_addr_transform(EG);
70 crb_addr_transform(MN);
71 crb_addr_transform(MS);
72 crb_addr_transform(CAS2);
73 crb_addr_transform(CAS1);
74 crb_addr_transform(CAS0);
75 crb_addr_transform(CAM);
76 crb_addr_transform(C2C1);
77 crb_addr_transform(C2C0);
78 crb_addr_transform(SMB);
79 crb_addr_transform(OCM0);
80 crb_addr_transform(I2C0);
81 }
82
qlcnic_release_rx_buffers(struct qlcnic_adapter * adapter)83 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
84 {
85 struct qlcnic_recv_context *recv_ctx;
86 struct qlcnic_host_rds_ring *rds_ring;
87 struct qlcnic_rx_buffer *rx_buf;
88 int i, ring;
89
90 recv_ctx = adapter->recv_ctx;
91 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
92 rds_ring = &recv_ctx->rds_rings[ring];
93 for (i = 0; i < rds_ring->num_desc; ++i) {
94 rx_buf = &(rds_ring->rx_buf_arr[i]);
95 if (rx_buf->skb == NULL)
96 continue;
97
98 pci_unmap_single(adapter->pdev,
99 rx_buf->dma,
100 rds_ring->dma_size,
101 PCI_DMA_FROMDEVICE);
102
103 dev_kfree_skb_any(rx_buf->skb);
104 }
105 }
106 }
107
qlcnic_reset_rx_buffers_list(struct qlcnic_adapter * adapter)108 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
109 {
110 struct qlcnic_recv_context *recv_ctx;
111 struct qlcnic_host_rds_ring *rds_ring;
112 struct qlcnic_rx_buffer *rx_buf;
113 int i, ring;
114
115 recv_ctx = adapter->recv_ctx;
116 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
117 rds_ring = &recv_ctx->rds_rings[ring];
118
119 INIT_LIST_HEAD(&rds_ring->free_list);
120
121 rx_buf = rds_ring->rx_buf_arr;
122 for (i = 0; i < rds_ring->num_desc; i++) {
123 list_add_tail(&rx_buf->list,
124 &rds_ring->free_list);
125 rx_buf++;
126 }
127 }
128 }
129
qlcnic_release_tx_buffers(struct qlcnic_adapter * adapter,struct qlcnic_host_tx_ring * tx_ring)130 void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter,
131 struct qlcnic_host_tx_ring *tx_ring)
132 {
133 struct qlcnic_cmd_buffer *cmd_buf;
134 struct qlcnic_skb_frag *buffrag;
135 int i, j;
136
137 spin_lock(&tx_ring->tx_clean_lock);
138
139 cmd_buf = tx_ring->cmd_buf_arr;
140 for (i = 0; i < tx_ring->num_desc; i++) {
141 buffrag = cmd_buf->frag_array;
142 if (buffrag->dma) {
143 pci_unmap_single(adapter->pdev, buffrag->dma,
144 buffrag->length, PCI_DMA_TODEVICE);
145 buffrag->dma = 0ULL;
146 }
147 for (j = 1; j < cmd_buf->frag_count; j++) {
148 buffrag++;
149 if (buffrag->dma) {
150 pci_unmap_page(adapter->pdev, buffrag->dma,
151 buffrag->length,
152 PCI_DMA_TODEVICE);
153 buffrag->dma = 0ULL;
154 }
155 }
156 if (cmd_buf->skb) {
157 dev_kfree_skb_any(cmd_buf->skb);
158 cmd_buf->skb = NULL;
159 }
160 cmd_buf++;
161 }
162
163 spin_unlock(&tx_ring->tx_clean_lock);
164 }
165
qlcnic_free_sw_resources(struct qlcnic_adapter * adapter)166 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
167 {
168 struct qlcnic_recv_context *recv_ctx;
169 struct qlcnic_host_rds_ring *rds_ring;
170 int ring;
171
172 recv_ctx = adapter->recv_ctx;
173
174 if (recv_ctx->rds_rings == NULL)
175 return;
176
177 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
178 rds_ring = &recv_ctx->rds_rings[ring];
179 vfree(rds_ring->rx_buf_arr);
180 rds_ring->rx_buf_arr = NULL;
181 }
182 kfree(recv_ctx->rds_rings);
183 }
184
qlcnic_alloc_sw_resources(struct qlcnic_adapter * adapter)185 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
186 {
187 struct qlcnic_recv_context *recv_ctx;
188 struct qlcnic_host_rds_ring *rds_ring;
189 struct qlcnic_host_sds_ring *sds_ring;
190 struct qlcnic_rx_buffer *rx_buf;
191 int ring, i;
192
193 recv_ctx = adapter->recv_ctx;
194
195 rds_ring = kcalloc(adapter->max_rds_rings,
196 sizeof(struct qlcnic_host_rds_ring), GFP_KERNEL);
197 if (rds_ring == NULL)
198 goto err_out;
199
200 recv_ctx->rds_rings = rds_ring;
201
202 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
203 rds_ring = &recv_ctx->rds_rings[ring];
204 switch (ring) {
205 case RCV_RING_NORMAL:
206 rds_ring->num_desc = adapter->num_rxd;
207 rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
208 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
209 break;
210
211 case RCV_RING_JUMBO:
212 rds_ring->num_desc = adapter->num_jumbo_rxd;
213 rds_ring->dma_size =
214 QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
215
216 if (adapter->ahw->capabilities &
217 QLCNIC_FW_CAPABILITY_HW_LRO)
218 rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
219
220 rds_ring->skb_size =
221 rds_ring->dma_size + NET_IP_ALIGN;
222 break;
223 }
224 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
225 if (rds_ring->rx_buf_arr == NULL)
226 goto err_out;
227
228 INIT_LIST_HEAD(&rds_ring->free_list);
229 /*
230 * Now go through all of them, set reference handles
231 * and put them in the queues.
232 */
233 rx_buf = rds_ring->rx_buf_arr;
234 for (i = 0; i < rds_ring->num_desc; i++) {
235 list_add_tail(&rx_buf->list,
236 &rds_ring->free_list);
237 rx_buf->ref_handle = i;
238 rx_buf++;
239 }
240 spin_lock_init(&rds_ring->lock);
241 }
242
243 for (ring = 0; ring < adapter->drv_sds_rings; ring++) {
244 sds_ring = &recv_ctx->sds_rings[ring];
245 sds_ring->irq = adapter->msix_entries[ring].vector;
246 sds_ring->adapter = adapter;
247 sds_ring->num_desc = adapter->num_rxd;
248 if (qlcnic_82xx_check(adapter)) {
249 if (qlcnic_check_multi_tx(adapter) &&
250 !adapter->ahw->diag_test)
251 sds_ring->tx_ring = &adapter->tx_ring[ring];
252 else
253 sds_ring->tx_ring = &adapter->tx_ring[0];
254 }
255 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
256 INIT_LIST_HEAD(&sds_ring->free_list[i]);
257 }
258
259 return 0;
260
261 err_out:
262 qlcnic_free_sw_resources(adapter);
263 return -ENOMEM;
264 }
265
266 /*
267 * Utility to translate from internal Phantom CRB address
268 * to external PCI CRB address.
269 */
qlcnic_decode_crb_addr(u32 addr)270 static u32 qlcnic_decode_crb_addr(u32 addr)
271 {
272 int i;
273 u32 base_addr, offset, pci_base;
274
275 crb_addr_transform_setup();
276
277 pci_base = QLCNIC_ADDR_ERROR;
278 base_addr = addr & 0xfff00000;
279 offset = addr & 0x000fffff;
280
281 for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
282 if (crb_addr_xform[i] == base_addr) {
283 pci_base = i << 20;
284 break;
285 }
286 }
287 if (pci_base == QLCNIC_ADDR_ERROR)
288 return pci_base;
289 else
290 return pci_base + offset;
291 }
292
293 #define QLCNIC_MAX_ROM_WAIT_USEC 100
294
qlcnic_wait_rom_done(struct qlcnic_adapter * adapter)295 static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
296 {
297 long timeout = 0;
298 long done = 0;
299 int err = 0;
300
301 cond_resched();
302 while (done == 0) {
303 done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS, &err);
304 done &= 2;
305 if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
306 dev_err(&adapter->pdev->dev,
307 "Timeout reached waiting for rom done");
308 return -EIO;
309 }
310 udelay(1);
311 }
312 return 0;
313 }
314
do_rom_fast_read(struct qlcnic_adapter * adapter,u32 addr,u32 * valp)315 static int do_rom_fast_read(struct qlcnic_adapter *adapter,
316 u32 addr, u32 *valp)
317 {
318 int err = 0;
319
320 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
321 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
322 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
323 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
324 if (qlcnic_wait_rom_done(adapter)) {
325 dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
326 return -EIO;
327 }
328 /* reset abyte_cnt and dummy_byte_cnt */
329 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
330 udelay(10);
331 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
332
333 *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA, &err);
334 if (err == -EIO)
335 return err;
336 return 0;
337 }
338
do_rom_fast_read_words(struct qlcnic_adapter * adapter,int addr,u8 * bytes,size_t size)339 static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
340 u8 *bytes, size_t size)
341 {
342 int addridx;
343 int ret = 0;
344
345 for (addridx = addr; addridx < (addr + size); addridx += 4) {
346 int v;
347 ret = do_rom_fast_read(adapter, addridx, &v);
348 if (ret != 0)
349 break;
350 *(__le32 *)bytes = cpu_to_le32(v);
351 bytes += 4;
352 }
353
354 return ret;
355 }
356
357 int
qlcnic_rom_fast_read_words(struct qlcnic_adapter * adapter,int addr,u8 * bytes,size_t size)358 qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
359 u8 *bytes, size_t size)
360 {
361 int ret;
362
363 ret = qlcnic_rom_lock(adapter);
364 if (ret < 0)
365 return ret;
366
367 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
368
369 qlcnic_rom_unlock(adapter);
370 return ret;
371 }
372
qlcnic_rom_fast_read(struct qlcnic_adapter * adapter,u32 addr,u32 * valp)373 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp)
374 {
375 int ret;
376
377 if (qlcnic_rom_lock(adapter) != 0)
378 return -EIO;
379
380 ret = do_rom_fast_read(adapter, addr, valp);
381 qlcnic_rom_unlock(adapter);
382 return ret;
383 }
384
qlcnic_pinit_from_rom(struct qlcnic_adapter * adapter)385 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
386 {
387 int addr, err = 0;
388 int i, n, init_delay;
389 struct crb_addr_pair *buf;
390 unsigned offset;
391 u32 off, val;
392 struct pci_dev *pdev = adapter->pdev;
393
394 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, 0);
395 QLC_SHARED_REG_WR32(adapter, QLCNIC_RCVPEG_STATE, 0);
396
397 /* Halt all the indiviual PEGs and other blocks */
398 /* disable all I2Q */
399 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x10, 0x0);
400 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x14, 0x0);
401 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x18, 0x0);
402 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x1c, 0x0);
403 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x20, 0x0);
404 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x24, 0x0);
405
406 /* disable all niu interrupts */
407 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x40, 0xff);
408 /* disable xge rx/tx */
409 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x70000, 0x00);
410 /* disable xg1 rx/tx */
411 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x80000, 0x00);
412 /* disable sideband mac */
413 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x90000, 0x00);
414 /* disable ap0 mac */
415 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xa0000, 0x00);
416 /* disable ap1 mac */
417 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xb0000, 0x00);
418
419 /* halt sre */
420 val = QLCRD32(adapter, QLCNIC_CRB_SRE + 0x1000, &err);
421 if (err == -EIO)
422 return err;
423 QLCWR32(adapter, QLCNIC_CRB_SRE + 0x1000, val & (~(0x1)));
424
425 /* halt epg */
426 QLCWR32(adapter, QLCNIC_CRB_EPG + 0x1300, 0x1);
427
428 /* halt timers */
429 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x0, 0x0);
430 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x8, 0x0);
431 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x10, 0x0);
432 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x18, 0x0);
433 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x100, 0x0);
434 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x200, 0x0);
435 /* halt pegs */
436 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x3c, 1);
437 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x3c, 1);
438 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x3c, 1);
439 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x3c, 1);
440 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x3c, 1);
441 msleep(20);
442
443 /* big hammer don't reset CAM block on reset */
444 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
445
446 /* Init HW CRB block */
447 if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
448 qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
449 dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
450 return -EIO;
451 }
452 offset = n & 0xffffU;
453 n = (n >> 16) & 0xffffU;
454
455 if (n >= 1024) {
456 dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
457 return -EIO;
458 }
459
460 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
461 if (buf == NULL)
462 return -ENOMEM;
463
464 for (i = 0; i < n; i++) {
465 if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
466 qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
467 kfree(buf);
468 return -EIO;
469 }
470
471 buf[i].addr = addr;
472 buf[i].data = val;
473 }
474
475 for (i = 0; i < n; i++) {
476
477 off = qlcnic_decode_crb_addr(buf[i].addr);
478 if (off == QLCNIC_ADDR_ERROR) {
479 dev_err(&pdev->dev, "CRB init value out of range %x\n",
480 buf[i].addr);
481 continue;
482 }
483 off += QLCNIC_PCI_CRBSPACE;
484
485 if (off & 1)
486 continue;
487
488 /* skipping cold reboot MAGIC */
489 if (off == QLCNIC_CAM_RAM(0x1fc))
490 continue;
491 if (off == (QLCNIC_CRB_I2C0 + 0x1c))
492 continue;
493 if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
494 continue;
495 if (off == (ROMUSB_GLB + 0xa8))
496 continue;
497 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
498 continue;
499 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
500 continue;
501 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
502 continue;
503 if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
504 continue;
505 /* skip the function enable register */
506 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
507 continue;
508 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
509 continue;
510 if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
511 continue;
512
513 init_delay = 1;
514 /* After writing this register, HW needs time for CRB */
515 /* to quiet down (else crb_window returns 0xffffffff) */
516 if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
517 init_delay = 1000;
518
519 QLCWR32(adapter, off, buf[i].data);
520
521 msleep(init_delay);
522 }
523 kfree(buf);
524
525 /* Initialize protocol process engine */
526 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
527 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
528 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
529 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
530 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
531 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
532 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
533 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
534 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
535 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
536 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
537 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
538 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
539 usleep_range(1000, 1500);
540
541 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
542 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
543
544 return 0;
545 }
546
qlcnic_cmd_peg_ready(struct qlcnic_adapter * adapter)547 static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
548 {
549 u32 val;
550 int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
551
552 do {
553 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CMDPEG_STATE);
554
555 switch (val) {
556 case PHAN_INITIALIZE_COMPLETE:
557 case PHAN_INITIALIZE_ACK:
558 return 0;
559 case PHAN_INITIALIZE_FAILED:
560 goto out_err;
561 default:
562 break;
563 }
564
565 msleep(QLCNIC_CMDPEG_CHECK_DELAY);
566
567 } while (--retries);
568
569 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE,
570 PHAN_INITIALIZE_FAILED);
571
572 out_err:
573 dev_err(&adapter->pdev->dev, "Command Peg initialization not "
574 "complete, state: 0x%x.\n", val);
575 return -EIO;
576 }
577
578 static int
qlcnic_receive_peg_ready(struct qlcnic_adapter * adapter)579 qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
580 {
581 u32 val;
582 int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
583
584 do {
585 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_RCVPEG_STATE);
586
587 if (val == PHAN_PEG_RCV_INITIALIZED)
588 return 0;
589
590 msleep(QLCNIC_RCVPEG_CHECK_DELAY);
591
592 } while (--retries);
593
594 if (!retries) {
595 dev_err(&adapter->pdev->dev, "Receive Peg initialization not "
596 "complete, state: 0x%x.\n", val);
597 return -EIO;
598 }
599
600 return 0;
601 }
602
603 int
qlcnic_check_fw_status(struct qlcnic_adapter * adapter)604 qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
605 {
606 int err;
607
608 err = qlcnic_cmd_peg_ready(adapter);
609 if (err)
610 return err;
611
612 err = qlcnic_receive_peg_ready(adapter);
613 if (err)
614 return err;
615
616 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
617
618 return err;
619 }
620
621 int
qlcnic_setup_idc_param(struct qlcnic_adapter * adapter)622 qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
623
624 int timeo;
625 u32 val;
626
627 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
628 val = QLC_DEV_GET_DRV(val, adapter->portnum);
629 if ((val & 0x3) != QLCNIC_TYPE_NIC) {
630 dev_err(&adapter->pdev->dev,
631 "Not an Ethernet NIC func=%u\n", val);
632 return -EIO;
633 }
634 adapter->ahw->physical_port = (val >> 2);
635 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
636 timeo = QLCNIC_INIT_TIMEOUT_SECS;
637
638 adapter->dev_init_timeo = timeo;
639
640 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
641 timeo = QLCNIC_RESET_TIMEOUT_SECS;
642
643 adapter->reset_ack_timeo = timeo;
644
645 return 0;
646 }
647
qlcnic_get_flt_entry(struct qlcnic_adapter * adapter,u8 region,struct qlcnic_flt_entry * region_entry)648 static int qlcnic_get_flt_entry(struct qlcnic_adapter *adapter, u8 region,
649 struct qlcnic_flt_entry *region_entry)
650 {
651 struct qlcnic_flt_header flt_hdr;
652 struct qlcnic_flt_entry *flt_entry;
653 int i = 0, ret;
654 u32 entry_size;
655
656 memset(region_entry, 0, sizeof(struct qlcnic_flt_entry));
657 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION,
658 (u8 *)&flt_hdr,
659 sizeof(struct qlcnic_flt_header));
660 if (ret) {
661 dev_warn(&adapter->pdev->dev,
662 "error reading flash layout header\n");
663 return -EIO;
664 }
665
666 entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header);
667 flt_entry = vzalloc(entry_size);
668 if (flt_entry == NULL)
669 return -EIO;
670
671 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION +
672 sizeof(struct qlcnic_flt_header),
673 (u8 *)flt_entry, entry_size);
674 if (ret) {
675 dev_warn(&adapter->pdev->dev,
676 "error reading flash layout entries\n");
677 goto err_out;
678 }
679
680 while (i < (entry_size/sizeof(struct qlcnic_flt_entry))) {
681 if (flt_entry[i].region == region)
682 break;
683 i++;
684 }
685 if (i >= (entry_size/sizeof(struct qlcnic_flt_entry))) {
686 dev_warn(&adapter->pdev->dev,
687 "region=%x not found in %d regions\n", region, i);
688 ret = -EIO;
689 goto err_out;
690 }
691 memcpy(region_entry, &flt_entry[i], sizeof(struct qlcnic_flt_entry));
692
693 err_out:
694 vfree(flt_entry);
695 return ret;
696 }
697
698 int
qlcnic_check_flash_fw_ver(struct qlcnic_adapter * adapter)699 qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
700 {
701 struct qlcnic_flt_entry fw_entry;
702 u32 ver = -1, min_ver;
703 int ret;
704
705 if (adapter->ahw->revision_id == QLCNIC_P3P_C0)
706 ret = qlcnic_get_flt_entry(adapter, QLCNIC_C0_FW_IMAGE_REGION,
707 &fw_entry);
708 else
709 ret = qlcnic_get_flt_entry(adapter, QLCNIC_B0_FW_IMAGE_REGION,
710 &fw_entry);
711
712 if (!ret)
713 /* 0-4:-signature, 4-8:-fw version */
714 qlcnic_rom_fast_read(adapter, fw_entry.start_addr + 4,
715 (int *)&ver);
716 else
717 qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET,
718 (int *)&ver);
719
720 ver = QLCNIC_DECODE_VERSION(ver);
721 min_ver = QLCNIC_MIN_FW_VERSION;
722
723 if (ver < min_ver) {
724 dev_err(&adapter->pdev->dev,
725 "firmware version %d.%d.%d unsupported."
726 "Min supported version %d.%d.%d\n",
727 _major(ver), _minor(ver), _build(ver),
728 _major(min_ver), _minor(min_ver), _build(min_ver));
729 return -EINVAL;
730 }
731
732 return 0;
733 }
734
735 static int
qlcnic_has_mn(struct qlcnic_adapter * adapter)736 qlcnic_has_mn(struct qlcnic_adapter *adapter)
737 {
738 u32 capability = 0;
739 int err = 0;
740
741 capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY, &err);
742 if (err == -EIO)
743 return err;
744 if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
745 return 1;
746
747 return 0;
748 }
749
750 static
qlcnic_get_table_desc(const u8 * unirom,int section)751 struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
752 {
753 u32 i, entries;
754 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
755 entries = le32_to_cpu(directory->num_entries);
756
757 for (i = 0; i < entries; i++) {
758
759 u32 offs = le32_to_cpu(directory->findex) +
760 i * le32_to_cpu(directory->entry_size);
761 u32 tab_type = le32_to_cpu(*((__le32 *)&unirom[offs] + 8));
762
763 if (tab_type == section)
764 return (struct uni_table_desc *) &unirom[offs];
765 }
766
767 return NULL;
768 }
769
770 #define FILEHEADER_SIZE (14 * 4)
771
772 static int
qlcnic_validate_header(struct qlcnic_adapter * adapter)773 qlcnic_validate_header(struct qlcnic_adapter *adapter)
774 {
775 const u8 *unirom = adapter->fw->data;
776 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
777 u32 entries, entry_size, tab_size, fw_file_size;
778
779 fw_file_size = adapter->fw->size;
780
781 if (fw_file_size < FILEHEADER_SIZE)
782 return -EINVAL;
783
784 entries = le32_to_cpu(directory->num_entries);
785 entry_size = le32_to_cpu(directory->entry_size);
786 tab_size = le32_to_cpu(directory->findex) + (entries * entry_size);
787
788 if (fw_file_size < tab_size)
789 return -EINVAL;
790
791 return 0;
792 }
793
794 static int
qlcnic_validate_bootld(struct qlcnic_adapter * adapter)795 qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
796 {
797 struct uni_table_desc *tab_desc;
798 struct uni_data_desc *descr;
799 u32 offs, tab_size, data_size, idx;
800 const u8 *unirom = adapter->fw->data;
801 __le32 temp;
802
803 temp = *((__le32 *)&unirom[adapter->file_prd_off] +
804 QLCNIC_UNI_BOOTLD_IDX_OFF);
805 idx = le32_to_cpu(temp);
806 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
807
808 if (!tab_desc)
809 return -EINVAL;
810
811 tab_size = le32_to_cpu(tab_desc->findex) +
812 le32_to_cpu(tab_desc->entry_size) * (idx + 1);
813
814 if (adapter->fw->size < tab_size)
815 return -EINVAL;
816
817 offs = le32_to_cpu(tab_desc->findex) +
818 le32_to_cpu(tab_desc->entry_size) * idx;
819 descr = (struct uni_data_desc *)&unirom[offs];
820
821 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
822
823 if (adapter->fw->size < data_size)
824 return -EINVAL;
825
826 return 0;
827 }
828
829 static int
qlcnic_validate_fw(struct qlcnic_adapter * adapter)830 qlcnic_validate_fw(struct qlcnic_adapter *adapter)
831 {
832 struct uni_table_desc *tab_desc;
833 struct uni_data_desc *descr;
834 const u8 *unirom = adapter->fw->data;
835 u32 offs, tab_size, data_size, idx;
836 __le32 temp;
837
838 temp = *((__le32 *)&unirom[adapter->file_prd_off] +
839 QLCNIC_UNI_FIRMWARE_IDX_OFF);
840 idx = le32_to_cpu(temp);
841 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
842
843 if (!tab_desc)
844 return -EINVAL;
845
846 tab_size = le32_to_cpu(tab_desc->findex) +
847 le32_to_cpu(tab_desc->entry_size) * (idx + 1);
848
849 if (adapter->fw->size < tab_size)
850 return -EINVAL;
851
852 offs = le32_to_cpu(tab_desc->findex) +
853 le32_to_cpu(tab_desc->entry_size) * idx;
854 descr = (struct uni_data_desc *)&unirom[offs];
855 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
856
857 if (adapter->fw->size < data_size)
858 return -EINVAL;
859
860 return 0;
861 }
862
863 static int
qlcnic_validate_product_offs(struct qlcnic_adapter * adapter)864 qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
865 {
866 struct uni_table_desc *ptab_descr;
867 const u8 *unirom = adapter->fw->data;
868 int mn_present = qlcnic_has_mn(adapter);
869 u32 entries, entry_size, tab_size, i;
870 __le32 temp;
871
872 ptab_descr = qlcnic_get_table_desc(unirom,
873 QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
874 if (!ptab_descr)
875 return -EINVAL;
876
877 entries = le32_to_cpu(ptab_descr->num_entries);
878 entry_size = le32_to_cpu(ptab_descr->entry_size);
879 tab_size = le32_to_cpu(ptab_descr->findex) + (entries * entry_size);
880
881 if (adapter->fw->size < tab_size)
882 return -EINVAL;
883
884 nomn:
885 for (i = 0; i < entries; i++) {
886
887 u32 flags, file_chiprev, offs;
888 u8 chiprev = adapter->ahw->revision_id;
889 u32 flagbit;
890
891 offs = le32_to_cpu(ptab_descr->findex) +
892 i * le32_to_cpu(ptab_descr->entry_size);
893 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_FLAGS_OFF);
894 flags = le32_to_cpu(temp);
895 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_CHIP_REV_OFF);
896 file_chiprev = le32_to_cpu(temp);
897
898 flagbit = mn_present ? 1 : 2;
899
900 if ((chiprev == file_chiprev) &&
901 ((1ULL << flagbit) & flags)) {
902 adapter->file_prd_off = offs;
903 return 0;
904 }
905 }
906 if (mn_present) {
907 mn_present = 0;
908 goto nomn;
909 }
910 return -EINVAL;
911 }
912
913 static int
qlcnic_validate_unified_romimage(struct qlcnic_adapter * adapter)914 qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
915 {
916 if (qlcnic_validate_header(adapter)) {
917 dev_err(&adapter->pdev->dev,
918 "unified image: header validation failed\n");
919 return -EINVAL;
920 }
921
922 if (qlcnic_validate_product_offs(adapter)) {
923 dev_err(&adapter->pdev->dev,
924 "unified image: product validation failed\n");
925 return -EINVAL;
926 }
927
928 if (qlcnic_validate_bootld(adapter)) {
929 dev_err(&adapter->pdev->dev,
930 "unified image: bootld validation failed\n");
931 return -EINVAL;
932 }
933
934 if (qlcnic_validate_fw(adapter)) {
935 dev_err(&adapter->pdev->dev,
936 "unified image: firmware validation failed\n");
937 return -EINVAL;
938 }
939
940 return 0;
941 }
942
943 static
qlcnic_get_data_desc(struct qlcnic_adapter * adapter,u32 section,u32 idx_offset)944 struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
945 u32 section, u32 idx_offset)
946 {
947 const u8 *unirom = adapter->fw->data;
948 struct uni_table_desc *tab_desc;
949 u32 offs, idx;
950 __le32 temp;
951
952 temp = *((__le32 *)&unirom[adapter->file_prd_off] + idx_offset);
953 idx = le32_to_cpu(temp);
954
955 tab_desc = qlcnic_get_table_desc(unirom, section);
956
957 if (tab_desc == NULL)
958 return NULL;
959
960 offs = le32_to_cpu(tab_desc->findex) +
961 le32_to_cpu(tab_desc->entry_size) * idx;
962
963 return (struct uni_data_desc *)&unirom[offs];
964 }
965
966 static u8 *
qlcnic_get_bootld_offs(struct qlcnic_adapter * adapter)967 qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
968 {
969 u32 offs = QLCNIC_BOOTLD_START;
970 struct uni_data_desc *data_desc;
971
972 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_BOOTLD,
973 QLCNIC_UNI_BOOTLD_IDX_OFF);
974
975 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
976 offs = le32_to_cpu(data_desc->findex);
977
978 return (u8 *)&adapter->fw->data[offs];
979 }
980
981 static u8 *
qlcnic_get_fw_offs(struct qlcnic_adapter * adapter)982 qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
983 {
984 u32 offs = QLCNIC_IMAGE_START;
985 struct uni_data_desc *data_desc;
986
987 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
988 QLCNIC_UNI_FIRMWARE_IDX_OFF);
989 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
990 offs = le32_to_cpu(data_desc->findex);
991
992 return (u8 *)&adapter->fw->data[offs];
993 }
994
qlcnic_get_fw_size(struct qlcnic_adapter * adapter)995 static u32 qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
996 {
997 struct uni_data_desc *data_desc;
998 const u8 *unirom = adapter->fw->data;
999
1000 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
1001 QLCNIC_UNI_FIRMWARE_IDX_OFF);
1002
1003 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
1004 return le32_to_cpu(data_desc->size);
1005 else
1006 return le32_to_cpu(*(__le32 *)&unirom[QLCNIC_FW_SIZE_OFFSET]);
1007 }
1008
qlcnic_get_fw_version(struct qlcnic_adapter * adapter)1009 static u32 qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
1010 {
1011 struct uni_data_desc *fw_data_desc;
1012 const struct firmware *fw = adapter->fw;
1013 u32 major, minor, sub;
1014 __le32 version_offset;
1015 const u8 *ver_str;
1016 int i, ret;
1017
1018 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1019 version_offset = *(__le32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET];
1020 return le32_to_cpu(version_offset);
1021 }
1022
1023 fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
1024 QLCNIC_UNI_FIRMWARE_IDX_OFF);
1025 ver_str = fw->data + le32_to_cpu(fw_data_desc->findex) +
1026 le32_to_cpu(fw_data_desc->size) - 17;
1027
1028 for (i = 0; i < 12; i++) {
1029 if (!strncmp(&ver_str[i], "REV=", 4)) {
1030 ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
1031 &major, &minor, &sub);
1032 if (ret != 3)
1033 return 0;
1034 else
1035 return major + (minor << 8) + (sub << 16);
1036 }
1037 }
1038
1039 return 0;
1040 }
1041
qlcnic_get_bios_version(struct qlcnic_adapter * adapter)1042 static u32 qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
1043 {
1044 const struct firmware *fw = adapter->fw;
1045 u32 bios_ver, prd_off = adapter->file_prd_off;
1046 u8 *version_offset;
1047 __le32 temp;
1048
1049 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1050 version_offset = (u8 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET];
1051 return le32_to_cpu(*(__le32 *)version_offset);
1052 }
1053
1054 temp = *((__le32 *)(&fw->data[prd_off]) + QLCNIC_UNI_BIOS_VERSION_OFF);
1055 bios_ver = le32_to_cpu(temp);
1056
1057 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
1058 }
1059
qlcnic_rom_lock_recovery(struct qlcnic_adapter * adapter)1060 static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
1061 {
1062 if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
1063 dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
1064
1065 qlcnic_pcie_sem_unlock(adapter, 2);
1066 }
1067
1068 static int
qlcnic_check_fw_hearbeat(struct qlcnic_adapter * adapter)1069 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
1070 {
1071 u32 heartbeat, ret = -EIO;
1072 int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
1073
1074 adapter->heartbeat = QLC_SHARED_REG_RD32(adapter,
1075 QLCNIC_PEG_ALIVE_COUNTER);
1076
1077 do {
1078 msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
1079 heartbeat = QLC_SHARED_REG_RD32(adapter,
1080 QLCNIC_PEG_ALIVE_COUNTER);
1081 if (heartbeat != adapter->heartbeat) {
1082 ret = QLCNIC_RCODE_SUCCESS;
1083 break;
1084 }
1085 } while (--retries);
1086
1087 return ret;
1088 }
1089
1090 int
qlcnic_need_fw_reset(struct qlcnic_adapter * adapter)1091 qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
1092 {
1093 if ((adapter->flags & QLCNIC_FW_HANG) ||
1094 qlcnic_check_fw_hearbeat(adapter)) {
1095 qlcnic_rom_lock_recovery(adapter);
1096 return 1;
1097 }
1098
1099 if (adapter->need_fw_reset)
1100 return 1;
1101
1102 if (adapter->fw)
1103 return 1;
1104
1105 return 0;
1106 }
1107
1108 static const char *fw_name[] = {
1109 QLCNIC_UNIFIED_ROMIMAGE_NAME,
1110 QLCNIC_FLASH_ROMIMAGE_NAME,
1111 };
1112
1113 int
qlcnic_load_firmware(struct qlcnic_adapter * adapter)1114 qlcnic_load_firmware(struct qlcnic_adapter *adapter)
1115 {
1116 __le64 *ptr64;
1117 u32 i, flashaddr, size;
1118 const struct firmware *fw = adapter->fw;
1119 struct pci_dev *pdev = adapter->pdev;
1120
1121 dev_info(&pdev->dev, "loading firmware from %s\n",
1122 fw_name[adapter->ahw->fw_type]);
1123
1124 if (fw) {
1125 u64 data;
1126
1127 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1128
1129 ptr64 = (__le64 *)qlcnic_get_bootld_offs(adapter);
1130 flashaddr = QLCNIC_BOOTLD_START;
1131
1132 for (i = 0; i < size; i++) {
1133 data = le64_to_cpu(ptr64[i]);
1134
1135 if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
1136 return -EIO;
1137
1138 flashaddr += 8;
1139 }
1140
1141 size = qlcnic_get_fw_size(adapter) / 8;
1142
1143 ptr64 = (__le64 *)qlcnic_get_fw_offs(adapter);
1144 flashaddr = QLCNIC_IMAGE_START;
1145
1146 for (i = 0; i < size; i++) {
1147 data = le64_to_cpu(ptr64[i]);
1148
1149 if (qlcnic_pci_mem_write_2M(adapter,
1150 flashaddr, data))
1151 return -EIO;
1152
1153 flashaddr += 8;
1154 }
1155
1156 size = qlcnic_get_fw_size(adapter) % 8;
1157 if (size) {
1158 data = le64_to_cpu(ptr64[i]);
1159
1160 if (qlcnic_pci_mem_write_2M(adapter,
1161 flashaddr, data))
1162 return -EIO;
1163 }
1164
1165 } else {
1166 u64 data;
1167 u32 hi, lo;
1168 int ret;
1169 struct qlcnic_flt_entry bootld_entry;
1170
1171 ret = qlcnic_get_flt_entry(adapter, QLCNIC_BOOTLD_REGION,
1172 &bootld_entry);
1173 if (!ret) {
1174 size = bootld_entry.size / 8;
1175 flashaddr = bootld_entry.start_addr;
1176 } else {
1177 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1178 flashaddr = QLCNIC_BOOTLD_START;
1179 dev_info(&pdev->dev,
1180 "using legacy method to get flash fw region");
1181 }
1182
1183 for (i = 0; i < size; i++) {
1184 if (qlcnic_rom_fast_read(adapter,
1185 flashaddr, (int *)&lo) != 0)
1186 return -EIO;
1187 if (qlcnic_rom_fast_read(adapter,
1188 flashaddr + 4, (int *)&hi) != 0)
1189 return -EIO;
1190
1191 data = (((u64)hi << 32) | lo);
1192
1193 if (qlcnic_pci_mem_write_2M(adapter,
1194 flashaddr, data))
1195 return -EIO;
1196
1197 flashaddr += 8;
1198 }
1199 }
1200 usleep_range(1000, 1500);
1201
1202 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
1203 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
1204 return 0;
1205 }
1206
1207 static int
qlcnic_validate_firmware(struct qlcnic_adapter * adapter)1208 qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
1209 {
1210 u32 val;
1211 u32 ver, bios, min_size;
1212 struct pci_dev *pdev = adapter->pdev;
1213 const struct firmware *fw = adapter->fw;
1214 u8 fw_type = adapter->ahw->fw_type;
1215
1216 if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
1217 if (qlcnic_validate_unified_romimage(adapter))
1218 return -EINVAL;
1219
1220 min_size = QLCNIC_UNI_FW_MIN_SIZE;
1221 } else {
1222 val = le32_to_cpu(*(__le32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
1223 if (val != QLCNIC_BDINFO_MAGIC)
1224 return -EINVAL;
1225
1226 min_size = QLCNIC_FW_MIN_SIZE;
1227 }
1228
1229 if (fw->size < min_size)
1230 return -EINVAL;
1231
1232 val = qlcnic_get_fw_version(adapter);
1233 ver = QLCNIC_DECODE_VERSION(val);
1234
1235 if (ver < QLCNIC_MIN_FW_VERSION) {
1236 dev_err(&pdev->dev,
1237 "%s: firmware version %d.%d.%d unsupported\n",
1238 fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
1239 return -EINVAL;
1240 }
1241
1242 val = qlcnic_get_bios_version(adapter);
1243 qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
1244 if (val != bios) {
1245 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
1246 fw_name[fw_type]);
1247 return -EINVAL;
1248 }
1249
1250 QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID, QLCNIC_BDINFO_MAGIC);
1251 return 0;
1252 }
1253
1254 static void
qlcnic_get_next_fwtype(struct qlcnic_adapter * adapter)1255 qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
1256 {
1257 u8 fw_type;
1258
1259 switch (adapter->ahw->fw_type) {
1260 case QLCNIC_UNKNOWN_ROMIMAGE:
1261 fw_type = QLCNIC_UNIFIED_ROMIMAGE;
1262 break;
1263
1264 case QLCNIC_UNIFIED_ROMIMAGE:
1265 default:
1266 fw_type = QLCNIC_FLASH_ROMIMAGE;
1267 break;
1268 }
1269
1270 adapter->ahw->fw_type = fw_type;
1271 }
1272
1273
1274
qlcnic_request_firmware(struct qlcnic_adapter * adapter)1275 void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
1276 {
1277 struct pci_dev *pdev = adapter->pdev;
1278 int rc;
1279
1280 adapter->ahw->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
1281
1282 next:
1283 qlcnic_get_next_fwtype(adapter);
1284
1285 if (adapter->ahw->fw_type == QLCNIC_FLASH_ROMIMAGE) {
1286 adapter->fw = NULL;
1287 } else {
1288 rc = request_firmware(&adapter->fw,
1289 fw_name[adapter->ahw->fw_type],
1290 &pdev->dev);
1291 if (rc != 0)
1292 goto next;
1293
1294 rc = qlcnic_validate_firmware(adapter);
1295 if (rc != 0) {
1296 release_firmware(adapter->fw);
1297 usleep_range(1000, 1500);
1298 goto next;
1299 }
1300 }
1301 }
1302
1303
1304 void
qlcnic_release_firmware(struct qlcnic_adapter * adapter)1305 qlcnic_release_firmware(struct qlcnic_adapter *adapter)
1306 {
1307 release_firmware(adapter->fw);
1308 adapter->fw = NULL;
1309 }
1310