1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 *
19 ******************************************************************************/
20 #define _HAL_INIT_C_
21
22 #include <linux/firmware.h>
23 #include <linux/vmalloc.h>
24 #include <drv_types.h>
25 #include <rtw_efuse.h>
26 #include <phy.h>
27 #include <rtl8188e_hal.h>
28
29 #include <rtw_iol.h>
30
iol_mode_enable(struct adapter * padapter,u8 enable)31 void iol_mode_enable(struct adapter *padapter, u8 enable)
32 {
33 u8 reg_0xf0 = 0;
34
35 if (enable) {
36 /* Enable initial offload */
37 reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
38 usb_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN);
39
40 if (!padapter->bFWReady) {
41 DBG_88E("bFWReady == false call reset 8051...\n");
42 _8051Reset88E(padapter);
43 }
44
45 } else {
46 /* disable initial offload */
47 reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
48 usb_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN);
49 }
50 }
51
iol_execute(struct adapter * padapter,u8 control)52 s32 iol_execute(struct adapter *padapter, u8 control)
53 {
54 s32 status = _FAIL;
55 u8 reg_0x88 = 0;
56 u32 start = 0, passing_time = 0;
57
58 control = control&0x0f;
59 reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
60 usb_write8(padapter, REG_HMEBOX_E0, reg_0x88|control);
61
62 start = jiffies;
63 while ((reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0)) & control &&
64 (passing_time = rtw_get_passing_time_ms(start)) < 1000) {
65 ;
66 }
67
68 reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
69 status = (reg_0x88 & control) ? _FAIL : _SUCCESS;
70 if (reg_0x88 & control<<4)
71 status = _FAIL;
72 return status;
73 }
74
iol_InitLLTTable(struct adapter * padapter,u8 txpktbuf_bndy)75 static s32 iol_InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
76 {
77 s32 rst = _SUCCESS;
78 iol_mode_enable(padapter, 1);
79 usb_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
80 rst = iol_execute(padapter, CMD_INIT_LLT);
81 iol_mode_enable(padapter, 0);
82 return rst;
83 }
84
85
rtl8188e_iol_efuse_patch(struct adapter * padapter)86 s32 rtl8188e_iol_efuse_patch(struct adapter *padapter)
87 {
88 s32 result = _SUCCESS;
89
90 DBG_88E("==> %s\n", __func__);
91 if (rtw_IOL_applied(padapter)) {
92 iol_mode_enable(padapter, 1);
93 result = iol_execute(padapter, CMD_READ_EFUSE_MAP);
94 if (result == _SUCCESS)
95 result = iol_execute(padapter, CMD_EFUSE_PATCH);
96
97 iol_mode_enable(padapter, 0);
98 }
99 return result;
100 }
101
102 #define MAX_REG_BOLCK_SIZE 196
103
_8051Reset88E(struct adapter * padapter)104 void _8051Reset88E(struct adapter *padapter)
105 {
106 u8 u1bTmp;
107
108 u1bTmp = usb_read8(padapter, REG_SYS_FUNC_EN+1);
109 usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT(2)));
110 usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT(2)));
111 DBG_88E("=====> _8051Reset88E(): 8051 reset success .\n");
112 }
113
rtl8188e_InitializeFirmwareVars(struct adapter * padapter)114 void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
115 {
116 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
117
118 /* Init Fw LPS related. */
119 padapter->pwrctrlpriv.bFwCurrentInPSMode = false;
120
121 /* Init H2C counter. by tynli. 2009.12.09. */
122 pHalData->LastHMEBoxNum = 0;
123 }
124
rtl8188e_free_hal_data(struct adapter * padapter)125 static void rtl8188e_free_hal_data(struct adapter *padapter)
126 {
127 kfree(padapter->HalData);
128 padapter->HalData = NULL;
129 }
130
ReadChipVersion8188E(struct adapter * padapter)131 static void ReadChipVersion8188E(struct adapter *padapter)
132 {
133 u32 value32;
134 struct HAL_VERSION ChipVersion;
135 struct hal_data_8188e *pHalData;
136
137 pHalData = GET_HAL_DATA(padapter);
138
139 value32 = usb_read32(padapter, REG_SYS_CFG);
140 ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
141 ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
142 ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; /* IC version (CUT) */
143
144 dump_chip_info(ChipVersion);
145
146 pHalData->VersionID = ChipVersion;
147 pHalData->rf_type = RF_1T1R;
148 pHalData->NumTotalRFPath = 1;
149
150 MSG_88E("RF_Type is %x!!\n", pHalData->rf_type);
151 }
152
rtl8188e_SetHalODMVar(struct adapter * Adapter,enum hal_odm_variable eVariable,void * pValue1,bool bSet)153 static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
154 {
155 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
156 struct odm_dm_struct *podmpriv = &pHalData->odmpriv;
157 switch (eVariable) {
158 case HAL_ODM_STA_INFO:
159 {
160 struct sta_info *psta = pValue1;
161
162 if (bSet) {
163 DBG_88E("### Set STA_(%d) info\n", psta->mac_id);
164 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
165 ODM_RAInfo_Init(podmpriv, psta->mac_id);
166 } else {
167 DBG_88E("### Clean STA_(%d) info\n", psta->mac_id);
168 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
169 }
170 }
171 break;
172 case HAL_ODM_P2P_STATE:
173 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet);
174 break;
175 case HAL_ODM_WIFI_DISPLAY_STATE:
176 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet);
177 break;
178 default:
179 break;
180 }
181 }
182
hal_notch_filter_8188e(struct adapter * adapter,bool enable)183 static void hal_notch_filter_8188e(struct adapter *adapter, bool enable)
184 {
185 if (enable) {
186 DBG_88E("Enable notch filter\n");
187 usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) | BIT(1));
188 } else {
189 DBG_88E("Disable notch filter\n");
190 usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) & ~BIT(1));
191 }
192 }
rtl8188e_set_hal_ops(struct hal_ops * pHalFunc)193 void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
194 {
195 pHalFunc->free_hal_data = &rtl8188e_free_hal_data;
196
197 pHalFunc->dm_init = &rtl8188e_init_dm_priv;
198
199 pHalFunc->read_chip_version = &ReadChipVersion8188E;
200
201 pHalFunc->set_bwmode_handler = &phy_set_bw_mode;
202 pHalFunc->set_channel_handler = &phy_sw_chnl;
203
204 pHalFunc->hal_dm_watchdog = &rtl8188e_HalDmWatchDog;
205
206 pHalFunc->Add_RateATid = &rtl8188e_Add_RateATid;
207
208 pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8188E;
209 pHalFunc->AntDivCompareHandler = &AntDivCompare8188E;
210 pHalFunc->read_rfreg = &phy_query_rf_reg;
211
212 pHalFunc->sreset_init_value = &sreset_init_value;
213 pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status;
214
215 pHalFunc->SetHalODMVarHandler = &rtl8188e_SetHalODMVar;
216
217 pHalFunc->hal_notch_filter = &hal_notch_filter_8188e;
218 }
219
220 /* */
221 /* */
222 /* LLT R/W/Init function */
223 /* */
224 /* */
_LLTWrite(struct adapter * padapter,u32 address,u32 data)225 static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data)
226 {
227 s32 status = _SUCCESS;
228 s32 count = 0;
229 u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
230 u16 LLTReg = REG_LLT_INIT;
231
232 usb_write32(padapter, LLTReg, value);
233
234 /* polling */
235 do {
236 value = usb_read32(padapter, LLTReg);
237 if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
238 break;
239
240 if (count > POLLING_LLT_THRESHOLD) {
241 RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling write LLT done at address %d!\n", address));
242 status = _FAIL;
243 break;
244 }
245 } while (count++);
246
247 return status;
248 }
249
InitLLTTable(struct adapter * padapter,u8 txpktbuf_bndy)250 s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
251 {
252 s32 status = _FAIL;
253 u32 i;
254 u32 Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;/* 176, 22k */
255
256 if (rtw_IOL_applied(padapter)) {
257 status = iol_InitLLTTable(padapter, txpktbuf_bndy);
258 } else {
259 for (i = 0; i < (txpktbuf_bndy - 1); i++) {
260 status = _LLTWrite(padapter, i, i + 1);
261 if (_SUCCESS != status)
262 return status;
263 }
264
265 /* end of list */
266 status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF);
267 if (_SUCCESS != status)
268 return status;
269
270 /* Make the other pages as ring buffer */
271 /* This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. */
272 /* Otherwise used as local loopback buffer. */
273 for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) {
274 status = _LLTWrite(padapter, i, (i + 1));
275 if (_SUCCESS != status)
276 return status;
277 }
278
279 /* Let last entry point to the start entry of ring buffer */
280 status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy);
281 if (_SUCCESS != status) {
282 return status;
283 }
284 }
285
286 return status;
287 }
288
289 void
Hal_InitPGData88E(struct adapter * padapter)290 Hal_InitPGData88E(struct adapter *padapter)
291 {
292 struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
293
294 if (!pEEPROM->bautoload_fail_flag) { /* autoload OK. */
295 if (!is_boot_from_eeprom(padapter)) {
296 /* Read EFUSE real map to shadow. */
297 EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
298 }
299 } else {/* autoload fail */
300 RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n"));
301 /* update to default value 0xFF */
302 if (!is_boot_from_eeprom(padapter))
303 EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
304 }
305 }
306
307 void
Hal_EfuseParseIDCode88E(struct adapter * padapter,u8 * hwinfo)308 Hal_EfuseParseIDCode88E(
309 struct adapter *padapter,
310 u8 *hwinfo
311 )
312 {
313 struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
314 u16 EEPROMId;
315
316 /* Checl 0x8129 again for making sure autoload status!! */
317 EEPROMId = le16_to_cpu(*((__le16 *)hwinfo));
318 if (EEPROMId != RTL_EEPROM_ID) {
319 DBG_88E("EEPROM ID(%#x) is invalid!!\n", EEPROMId);
320 pEEPROM->bautoload_fail_flag = true;
321 } else {
322 pEEPROM->bautoload_fail_flag = false;
323 }
324
325 DBG_88E("EEPROM ID = 0x%04x\n", EEPROMId);
326 }
327
Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g * pwrInfo24G,u8 * PROMContent,bool AutoLoadFail)328 static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, u8 *PROMContent, bool AutoLoadFail)
329 {
330 u32 rfPath, eeAddr = EEPROM_TX_PWR_INX_88E, group, TxCount = 0;
331
332 memset(pwrInfo24G, 0, sizeof(struct txpowerinfo24g));
333
334 if (AutoLoadFail) {
335 for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
336 /* 2.4G default value */
337 for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
338 pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
339 pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
340 }
341 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
342 if (TxCount == 0) {
343 pwrInfo24G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF;
344 pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF;
345 } else {
346 pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
347 pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
348 pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
349 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
350 }
351 }
352 }
353 return;
354 }
355
356 for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
357 /* 2.4G default value */
358 for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
359 pwrInfo24G->IndexCCK_Base[rfPath][group] = PROMContent[eeAddr++];
360 if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
361 pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
362 }
363 for (group = 0; group < MAX_CHNL_GROUP_24G-1; group++) {
364 pwrInfo24G->IndexBW40_Base[rfPath][group] = PROMContent[eeAddr++];
365 if (pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF)
366 pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
367 }
368 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
369 if (TxCount == 0) {
370 pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0;
371 if (PROMContent[eeAddr] == 0xFF) {
372 pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF;
373 } else {
374 pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
375 if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
376 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
377 }
378
379 if (PROMContent[eeAddr] == 0xFF) {
380 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_OFDM_DIFF;
381 } else {
382 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
383 if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
384 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
385 }
386 pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0;
387 eeAddr++;
388 } else {
389 if (PROMContent[eeAddr] == 0xFF) {
390 pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
391 } else {
392 pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
393 if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
394 pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0;
395 }
396
397 if (PROMContent[eeAddr] == 0xFF) {
398 pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
399 } else {
400 pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
401 if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
402 pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
403 }
404 eeAddr++;
405
406 if (PROMContent[eeAddr] == 0xFF) {
407 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
408 } else {
409 pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
410 if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
411 pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
412 }
413
414 if (PROMContent[eeAddr] == 0xFF) {
415 pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
416 } else {
417 pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
418 if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
419 pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0;
420 }
421 eeAddr++;
422 }
423 }
424 }
425 }
426
Hal_GetChnlGroup88E(u8 chnl,u8 * pGroup)427 static u8 Hal_GetChnlGroup88E(u8 chnl, u8 *pGroup)
428 {
429 u8 bIn24G = true;
430
431 if (chnl <= 14) {
432 bIn24G = true;
433
434 if (chnl < 3) /* Channel 1-2 */
435 *pGroup = 0;
436 else if (chnl < 6) /* Channel 3-5 */
437 *pGroup = 1;
438 else if (chnl < 9) /* Channel 6-8 */
439 *pGroup = 2;
440 else if (chnl < 12) /* Channel 9-11 */
441 *pGroup = 3;
442 else if (chnl < 14) /* Channel 12-13 */
443 *pGroup = 4;
444 else if (chnl == 14) /* Channel 14 */
445 *pGroup = 5;
446 } else {
447
448 /* probably, this branch is suitable only for 5 GHz */
449
450 bIn24G = false;
451
452 if (chnl <= 40)
453 *pGroup = 0;
454 else if (chnl <= 48)
455 *pGroup = 1;
456 else if (chnl <= 56)
457 *pGroup = 2;
458 else if (chnl <= 64)
459 *pGroup = 3;
460 else if (chnl <= 104)
461 *pGroup = 4;
462 else if (chnl <= 112)
463 *pGroup = 5;
464 else if (chnl <= 120)
465 *pGroup = 5;
466 else if (chnl <= 128)
467 *pGroup = 6;
468 else if (chnl <= 136)
469 *pGroup = 7;
470 else if (chnl <= 144)
471 *pGroup = 8;
472 else if (chnl <= 153)
473 *pGroup = 9;
474 else if (chnl <= 161)
475 *pGroup = 10;
476 else if (chnl <= 177)
477 *pGroup = 11;
478 }
479 return bIn24G;
480 }
481
Hal_ReadPowerSavingMode88E(struct adapter * padapter,u8 * hwinfo,bool AutoLoadFail)482 void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
483 {
484 if (AutoLoadFail) {
485 padapter->pwrctrlpriv.bHWPowerdown = false;
486 padapter->pwrctrlpriv.bSupportRemoteWakeup = false;
487 } else {
488 /* hw power down mode selection , 0:rf-off / 1:power down */
489
490 if (padapter->registrypriv.hwpdn_mode == 2)
491 padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT(4));
492 else
493 padapter->pwrctrlpriv.bHWPowerdown = padapter->registrypriv.hwpdn_mode;
494
495 /* decide hw if support remote wakeup function */
496 /* if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */
497 padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT(1)) ? true : false;
498
499 DBG_88E("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__,
500 padapter->pwrctrlpriv.bHWPwrPindetect, padapter->pwrctrlpriv.bHWPowerdown , padapter->pwrctrlpriv.bSupportRemoteWakeup);
501
502 DBG_88E("### PS params => power_mgnt(%x), usbss_enable(%x) ###\n", padapter->registrypriv.power_mgnt, padapter->registrypriv.usbss_enable);
503 }
504 }
505
Hal_ReadTxPowerInfo88E(struct adapter * padapter,u8 * PROMContent,bool AutoLoadFail)506 void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail)
507 {
508 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
509 struct txpowerinfo24g pwrInfo24G;
510 u8 rfPath, ch, group;
511 u8 bIn24G, TxCount;
512
513 Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail);
514
515 if (!AutoLoadFail)
516 pHalData->bTXPowerDataReadFromEEPORM = true;
517
518 for (rfPath = 0; rfPath < pHalData->NumTotalRFPath; rfPath++) {
519 for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
520 bIn24G = Hal_GetChnlGroup88E(ch, &group);
521 if (bIn24G) {
522 pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group];
523 if (ch == 14)
524 pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][4];
525 else
526 pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group];
527 }
528 if (bIn24G) {
529 DBG_88E("======= Path %d, Channel %d =======\n", rfPath, ch);
530 DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch , pHalData->Index24G_CCK_Base[rfPath][ch]);
531 DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch , pHalData->Index24G_BW40_Base[rfPath][ch]);
532 }
533 }
534 for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
535 pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount];
536 pHalData->OFDM_24G_Diff[rfPath][TxCount] = pwrInfo24G.OFDM_Diff[rfPath][TxCount];
537 pHalData->BW20_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW20_Diff[rfPath][TxCount];
538 pHalData->BW40_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW40_Diff[rfPath][TxCount];
539 DBG_88E("======= TxCount %d =======\n", TxCount);
540 DBG_88E("CCK_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->CCK_24G_Diff[rfPath][TxCount]);
541 DBG_88E("OFDM_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->OFDM_24G_Diff[rfPath][TxCount]);
542 DBG_88E("BW20_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW20_24G_Diff[rfPath][TxCount]);
543 DBG_88E("BW40_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW40_24G_Diff[rfPath][TxCount]);
544 }
545 }
546
547 /* 2010/10/19 MH Add Regulator recognize for CU. */
548 if (!AutoLoadFail) {
549 pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x7); /* bit0~2 */
550 if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
551 pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); /* bit0~2 */
552 } else {
553 pHalData->EEPROMRegulatory = 0;
554 }
555 DBG_88E("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory);
556 }
557
Hal_EfuseParseXtal_8188E(struct adapter * pAdapter,u8 * hwinfo,bool AutoLoadFail)558 void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
559 {
560 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
561
562 if (!AutoLoadFail) {
563 pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E];
564 if (pHalData->CrystalCap == 0xFF)
565 pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
566 } else {
567 pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
568 }
569 DBG_88E("CrystalCap: 0x%2x\n", pHalData->CrystalCap);
570 }
571
Hal_EfuseParseBoardType88E(struct adapter * pAdapter,u8 * hwinfo,bool AutoLoadFail)572 void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
573 {
574 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
575
576 if (!AutoLoadFail)
577 pHalData->BoardType = (hwinfo[EEPROM_RF_BOARD_OPTION_88E]
578 & 0xE0) >> 5;
579 else
580 pHalData->BoardType = 0;
581 DBG_88E("Board Type: 0x%2x\n", pHalData->BoardType);
582 }
583
Hal_EfuseParseEEPROMVer88E(struct adapter * padapter,u8 * hwinfo,bool AutoLoadFail)584 void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
585 {
586 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
587
588 if (!AutoLoadFail) {
589 pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E];
590 if (pHalData->EEPROMVersion == 0xFF)
591 pHalData->EEPROMVersion = EEPROM_Default_Version;
592 } else {
593 pHalData->EEPROMVersion = 1;
594 }
595 RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
596 ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n",
597 pHalData->EEPROMVersion));
598 }
599
rtl8188e_EfuseParseChnlPlan(struct adapter * padapter,u8 * hwinfo,bool AutoLoadFail)600 void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
601 {
602 padapter->mlmepriv.ChannelPlan =
603 hal_com_get_channel_plan(padapter,
604 hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF,
605 padapter->registrypriv.channel_plan,
606 RT_CHANNEL_DOMAIN_WORLD_WIDE_13, AutoLoadFail);
607
608 DBG_88E("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan);
609 }
610
Hal_EfuseParseCustomerID88E(struct adapter * padapter,u8 * hwinfo,bool AutoLoadFail)611 void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
612 {
613 struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
614
615 if (!AutoLoadFail) {
616 pHalData->EEPROMCustomerID = hwinfo[EEPROM_CUSTOMERID_88E];
617 } else {
618 pHalData->EEPROMCustomerID = 0;
619 pHalData->EEPROMSubCustomerID = 0;
620 }
621 DBG_88E("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID);
622 }
623
Hal_ReadAntennaDiversity88E(struct adapter * pAdapter,u8 * PROMContent,bool AutoLoadFail)624 void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool AutoLoadFail)
625 {
626 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
627 struct registry_priv *registry_par = &pAdapter->registrypriv;
628
629 if (!AutoLoadFail) {
630 /* Antenna Diversity setting. */
631 if (registry_par->antdiv_cfg == 2) { /* 2:By EFUSE */
632 pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x18)>>3;
633 if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
634 pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION&0x18)>>3;
635 } else {
636 pHalData->AntDivCfg = registry_par->antdiv_cfg; /* 0:OFF , 1:ON, 2:By EFUSE */
637 }
638
639 if (registry_par->antdiv_type == 0) {
640 /* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */
641 pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E];
642 if (pHalData->TRxAntDivType == 0xFF)
643 pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; /* For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */
644 } else {
645 pHalData->TRxAntDivType = registry_par->antdiv_type;
646 }
647
648 if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV)
649 pHalData->AntDivCfg = 1; /* 0xC1[3] is ignored. */
650 } else {
651 pHalData->AntDivCfg = 0;
652 pHalData->TRxAntDivType = pHalData->TRxAntDivType; /* The value in the driver setting of device manager. */
653 }
654 DBG_88E("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType);
655 }
656
Hal_ReadThermalMeter_88E(struct adapter * Adapter,u8 * PROMContent,bool AutoloadFail)657 void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail)
658 {
659 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
660
661 /* ThermalMeter from EEPROM */
662 if (!AutoloadFail)
663 pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E];
664 else
665 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
666
667 if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) {
668 pHalData->bAPKThermalMeterIgnore = true;
669 pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
670 }
671 DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter);
672 }
673