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Searched refs:APBC_REG (Results 1 – 7 of 7) sorted by relevance

/arch/arm/mach-mmp/
Dclock-mmp2.c16 #define APBC_RTC APBC_REG(0x000)
17 #define APBC_TWSI1 APBC_REG(0x004)
18 #define APBC_TWSI2 APBC_REG(0x008)
19 #define APBC_TWSI3 APBC_REG(0x00c)
20 #define APBC_TWSI4 APBC_REG(0x010)
21 #define APBC_KPC APBC_REG(0x018)
22 #define APBC_UART1 APBC_REG(0x02c)
23 #define APBC_UART2 APBC_REG(0x030)
24 #define APBC_UART3 APBC_REG(0x034)
25 #define APBC_GPIO APBC_REG(0x038)
[all …]
Dclock-pxa910.c16 #define APBC_UART0 APBC_REG(0x000)
17 #define APBC_UART1 APBC_REG(0x004)
18 #define APBC_GPIO APBC_REG(0x008)
19 #define APBC_PWM1 APBC_REG(0x00c)
20 #define APBC_PWM2 APBC_REG(0x010)
21 #define APBC_PWM3 APBC_REG(0x014)
22 #define APBC_PWM4 APBC_REG(0x018)
23 #define APBC_SSP1 APBC_REG(0x01c)
24 #define APBC_SSP2 APBC_REG(0x020)
25 #define APBC_RTC APBC_REG(0x028)
[all …]
Dclock-pxa168.c16 #define APBC_UART1 APBC_REG(0x000)
17 #define APBC_UART2 APBC_REG(0x004)
18 #define APBC_GPIO APBC_REG(0x008)
19 #define APBC_PWM1 APBC_REG(0x00c)
20 #define APBC_PWM2 APBC_REG(0x010)
21 #define APBC_PWM3 APBC_REG(0x014)
22 #define APBC_PWM4 APBC_REG(0x018)
23 #define APBC_RTC APBC_REG(0x028)
24 #define APBC_TWSI0 APBC_REG(0x02c)
25 #define APBC_KPC APBC_REG(0x030)
[all …]
Dpxa168.c68 #define APBC_TIMERS APBC_REG(0x34)
Dpxa910.c109 #define APBC_TIMERS APBC_REG(0x34)
Dmmp2.c121 #define APBC_TIMERS APBC_REG(0x024)
/arch/arm/mach-mmp/include/mach/
Daddr-map.h38 #define APBC_REG(x) (APBC_VIRT_BASE + (x)) macro