Searched refs:AR934X_PLL_DDR_CONFIG_REG (Results 1 – 2 of 2) sorted by relevance
| /arch/mips/include/asm/mach-ath79/ | ||
| D | ar71xx_regs.h | 212 #define AR934X_PLL_DDR_CONFIG_REG 0x04 macro |
| /arch/mips/ath79/ | ||
| D | clock.c | 299 pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG); in ar934x_clocks_init() |