Searched refs:AR934X_SRIF_DDR_DPLL1_REG (Results 1 – 2 of 2) sorted by relevance
541 #define AR934X_SRIF_DDR_DPLL1_REG 0x240 macro
291 pll = __raw_readl(dpll_base + AR934X_SRIF_DDR_DPLL1_REG); in ar934x_clocks_init()