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Searched refs:ASID_MASK (Results 1 – 15 of 15) sorted by relevance

/arch/mips/mm/
Dtlb-r3k.c46 old_ctx = read_c0_entryhi() & ASID_MASK; in local_flush_tlb_from()
92 cpu_context(cpu, mm) & ASID_MASK, start, end); in local_flush_tlb_range()
97 int oldpid = read_c0_entryhi() & ASID_MASK; in local_flush_tlb_range()
98 int newpid = cpu_context(cpu, mm) & ASID_MASK; in local_flush_tlb_range()
171 newpid = cpu_context(cpu, vma->vm_mm) & ASID_MASK; in local_flush_tlb_page()
174 oldpid = read_c0_entryhi() & ASID_MASK; in local_flush_tlb_page()
202 pid = read_c0_entryhi() & ASID_MASK; in __update_tlb()
205 if ((pid != (cpu_context(cpu, vma->vm_mm) & ASID_MASK)) || (cpu_context(cpu, vma->vm_mm) == 0)) { in __update_tlb()
246 old_ctx = read_c0_entryhi() & ASID_MASK; in add_wired_entry()
269 old_ctx = read_c0_entryhi() & ASID_MASK; in add_wired_entry()
Dtlb-r8k.c197 pid = read_c0_entryhi() & ASID_MASK; in __update_tlb()
Dtlb-r4k.c303 pid = read_c0_entryhi() & ASID_MASK; in __update_tlb()
/arch/mips/include/asm/
Dmmu_context.h72 #define ASID_MASK 0xfc0 macro
77 #define ASID_MASK 0xff0 macro
82 #define ASID_MASK 0xff macro
87 #define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK)
98 #define ASID_VERSION_MASK ((unsigned long)~(ASID_MASK|(ASID_MASK-1)))
108 if (! ((asid += ASID_INC) & ASID_MASK) ) { in get_new_mmu_context()
Dkvm_host.h353 #define TLB_ASID(x) ((x).tlb_hi & ASID_MASK)
360 TLB_ASID(x) == ((y) & ASID_MASK))
/arch/score/mm/
Dtlb-score.c45 old_ASID = pevn_get() & ASID_MASK; in local_flush_tlb_all()
70 pevn_set(mm->context & ASID_MASK); in drop_mmu_context()
92 int oldpid = pevn_get() & ASID_MASK; in local_flush_tlb_range()
93 int newpid = vma_mm_context & ASID_MASK; in local_flush_tlb_range()
117 pevn_set(vma_mm_context & ASID_MASK); in local_flush_tlb_range()
166 newpid = vma_ASID & ASID_MASK; in local_flush_tlb_page()
169 oldpid = pevn_get() & ASID_MASK; in local_flush_tlb_page()
224 pid = pevn_get() & ASID_MASK; in __update_tlb()
/arch/mips/lib/
Dr3k_dump_tlb.c34 asid = read_c0_entryhi() & ASID_MASK; in dump_tlb()
49 (entryhi & ASID_MASK) == asid)) { in dump_tlb()
58 entryhi & ASID_MASK, in dump_tlb()
/arch/xtensa/include/asm/
Dmmu_context.h50 #define ASID_MASK ((1 << XCHAL_MMU_ASID_BITS) - 1) macro
51 #define ASID_INSERT(x) (0x03020001 | (((x) & ASID_MASK) << 8))
71 if ((++asid & ASID_MASK) == 0) { in get_new_mmu_context()
94 ((asid ^ cpu_asid_cache(cpu)) & ~ASID_MASK)) in get_mmu_context()
/arch/arm/include/asm/
Dmmu.h21 #define ASID_MASK ((~0ULL) << ASID_BITS) macro
22 #define ASID(mm) ((unsigned int)((mm)->context.id.counter & ~ASID_MASK))
/arch/arm64/mm/
Dcontext.c39 #define ASID_MASK (~GENMASK(asid_bits - 1, 0)) macro
44 #define asid2idx(asid) (((asid) & ~ASID_MASK) >> 1)
45 #define idx2asid(idx) (((idx) << 1) & ~ASID_MASK)
48 #define asid2idx(asid) ((asid) & ~ASID_MASK)
119 u64 newasid = generation | (asid & ~ASID_MASK); in new_context()
/arch/arm/mm/
Dcontext.c122 : "I" (~ASID_MASK)); in contextidr_notifier()
157 __set_bit(asid & ~ASID_MASK, asid_map); in flush_context()
199 u64 newasid = generation | (asid & ~ASID_MASK); in new_context()
212 asid &= ~ASID_MASK; in new_context()
/arch/score/include/asm/
Dmmu_context.h40 #define ASID_MASK 0xff0 macro
51 if (!(asid & ASID_MASK)) { in get_new_mmu_context()
/arch/mips/kvm/
Dtlb.c52 return vcpu->arch.guest_kernel_asid[smp_processor_id()] & ASID_MASK; in kvm_mips_get_kernel_asid()
57 return vcpu->arch.guest_user_asid[smp_processor_id()] & ASID_MASK; in kvm_mips_get_user_asid()
81 kvm_info("ASID: %#lx\n", read_c0_entryhi() & ASID_MASK); in kvm_mips_dump_host_tlbs()
619 if (!(asid & ASID_MASK)) { in kvm_get_new_mmu_context()
726 preempt_entryhi & ASID_MASK); in kvm_arch_vcpu_load()
741 ASID_MASK); in kvm_arch_vcpu_load()
745 ASID_MASK); in kvm_arch_vcpu_load()
802 asid = kvm_read_c0_guest_entryhi(cop0) & ASID_MASK; in kvm_get_inst()
Demulate.c1117 vcpu->arch.gprs[rt] & ASID_MASK; in kvm_mips_emulate_CP0()
1120 ASID_MASK) != nasid)) { in kvm_mips_emulate_CP0()
1123 & ASID_MASK, in kvm_mips_emulate_CP0()
1125 & ASID_MASK); in kvm_mips_emulate_CP0()
1709 (cop0) & ASID_MASK)); in kvm_mips_emulate_cache()
1882 (kvm_read_c0_guest_entryhi(cop0) & ASID_MASK); in kvm_mips_emulate_tlbmiss_ld()
1929 (kvm_read_c0_guest_entryhi(cop0) & ASID_MASK); in kvm_mips_emulate_tlbinv_ld()
1974 (kvm_read_c0_guest_entryhi(cop0) & ASID_MASK); in kvm_mips_emulate_tlbmiss_st()
2018 (kvm_read_c0_guest_entryhi(cop0) & ASID_MASK); in kvm_mips_emulate_tlbinv_st()
2063 (kvm_read_c0_guest_entryhi(cop0) & ASID_MASK); in kvm_mips_handle_tlbmod()
[all …]
/arch/xtensa/mm/
Dtlb.c225 unsigned mm_asid = (get_rasid_register() >> 8) & ASID_MASK; in check_tlb_entry()
226 unsigned tlb_asid = r0 & ASID_MASK; in check_tlb_entry()