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Searched refs:AU1000_SYS_FREQCTRL0 (Results 1 – 3 of 3) sorted by relevance

/arch/mips/alchemy/common/
Dpower.c57 sleep_sys_clocks[0] = alchemy_rdsys(AU1000_SYS_FREQCTRL0); in save_core_regs()
88 alchemy_wrsys(sleep_sys_clocks[0], AU1000_SYS_FREQCTRL0); in restore_core_regs()
Dclock.c787 a->reg = AU1000_SYS_FREQCTRL0; in alchemy_clk_init_fgens()
/arch/mips/include/asm/mach-au1x00/
Dau1000.h472 #define AU1000_SYS_FREQCTRL0 0x20 macro