1 /* 2 * auxio.h: Definitions and code for the Auxiliary I/O registers. 3 * 4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 5 * 6 * Refactoring for unified NCR/PCIO support 2002 Eric Brower (ebrower@usa.net) 7 */ 8 #ifndef _SPARC64_AUXIO_H 9 #define _SPARC64_AUXIO_H 10 11 /* AUXIO implementations: 12 * sbus-based NCR89C105 "Slavio" 13 * LED/Floppy (AUX1) register 14 * Power (AUX2) register 15 * 16 * ebus-based auxio on PCIO 17 * LED Auxio Register 18 * Power Auxio Register 19 * 20 * Register definitions from NCR _NCR89C105 Chip Specification_ 21 * 22 * SLAVIO AUX1 @ 0x1900000 23 * ------------------------------------------------- 24 * | (R) | (R) | D | (R) | E | M | T | L | 25 * ------------------------------------------------- 26 * (R) - bit 7:6,4 are reserved and should be masked in s/w 27 * D - Floppy Density Sense (1=high density) R/O 28 * E - Link Test Enable, directly reflected on AT&T 7213 LTE pin 29 * M - Monitor/Mouse Mux, directly reflected on MON_MSE_MUX pin 30 * T - Terminal Count: sends TC pulse to 82077 floppy controller 31 * L - System LED on front panel (0=off, 1=on) 32 */ 33 #define AUXIO_AUX1_MASK 0xc0 /* Mask bits */ 34 #define AUXIO_AUX1_FDENS 0x20 /* Floppy Density Sense */ 35 #define AUXIO_AUX1_LTE 0x08 /* Link Test Enable */ 36 #define AUXIO_AUX1_MMUX 0x04 /* Monitor/Mouse Mux */ 37 #define AUXIO_AUX1_FTCNT 0x02 /* Terminal Count, */ 38 #define AUXIO_AUX1_LED 0x01 /* System LED */ 39 40 /* SLAVIO AUX2 @ 0x1910000 41 * ------------------------------------------------- 42 * | (R) | (R) | D | (R) | (R) | (R) | C | F | 43 * ------------------------------------------------- 44 * (R) - bits 7:6,4:2 are reserved and should be masked in s/w 45 * D - Power Failure Detect (1=power fail) 46 * C - Clear Power Failure Detect Int (1=clear) 47 * F - Power Off (1=power off) 48 */ 49 #define AUXIO_AUX2_MASK 0xdc /* Mask Bits */ 50 #define AUXIO_AUX2_PFAILDET 0x20 /* Power Fail Detect */ 51 #define AUXIO_AUX2_PFAILCLR 0x02 /* Clear Pwr Fail Det Intr */ 52 #define AUXIO_AUX2_PWR_OFF 0x01 /* Power Off */ 53 54 /* Register definitions from Sun Microsystems _PCIO_ p/n 802-7837 55 * 56 * PCIO LED Auxio @ 0x726000 57 * ------------------------------------------------- 58 * | 31:1 Unused | LED | 59 * ------------------------------------------------- 60 * Bits 31:1 unused 61 * LED - System LED on front panel (0=off, 1=on) 62 */ 63 #define AUXIO_PCIO_LED 0x01 /* System LED */ 64 65 /* PCIO Power Auxio @ 0x724000 66 * ------------------------------------------------- 67 * | 31:2 Unused | CPO | SPO | 68 * ------------------------------------------------- 69 * Bits 31:2 unused 70 * CPO - Courtesy Power Off (1=off) 71 * SPO - System Power Off (1=off) 72 */ 73 #define AUXIO_PCIO_CPWR_OFF 0x02 /* Courtesy Power Off */ 74 #define AUXIO_PCIO_SPWR_OFF 0x01 /* System Power Off */ 75 76 #ifndef __ASSEMBLY__ 77 78 #define AUXIO_LTE_ON 1 79 #define AUXIO_LTE_OFF 0 80 81 /* auxio_set_lte - Set Link Test Enable (TPE Link Detect) 82 * 83 * on - AUXIO_LTE_ON or AUXIO_LTE_OFF 84 */ 85 void auxio_set_lte(int on); 86 87 #define AUXIO_LED_ON 1 88 #define AUXIO_LED_OFF 0 89 90 /* auxio_set_led - Set system front panel LED 91 * 92 * on - AUXIO_LED_ON or AUXIO_LED_OFF 93 */ 94 void auxio_set_led(int on); 95 96 #endif /* ifndef __ASSEMBLY__ */ 97 98 #endif /* !(_SPARC64_AUXIO_H) */ 99