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Searched refs:B0 (Results 1 – 25 of 34) sorted by relevance

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/arch/c6x/lib/
Dstrasgi.S36 || cmpltu .l2 B2, B7, B0
40 || [B0] ldw .d2t1 *B4++, A0
44 [B0] sub .d2 B6, 24, B7
45 || [B0] b .s2 _strasgi_loop
46 || cmpltu .l2 B1, B6, B0
48 [B0] ldw .d2t1 *B4++, A1
51 || cmpltu .l2 12, B6, B0
53 [B0] ldw .d2t1 *B4++, A5
56 || cmpltu .l2 8, B6, B0
58 [B0] ldw .d2t1 *B4++, A7
[all …]
Dcsum_64plus.S37 || AND .S2 3,B4,B0
38 OR .L2X B0,A1,B0 ; non aligned condition
43 [B0] BNOP .S1 L6,5
83 CMPGT .L2 B5,0,B0
84 [!B0] BNOP .S1 L82,4
116 L82: AND .S2X 1,A6,B0
117 [!B0] BNOP .S1 L9,5
140 L9: SHRU .S2X A9,16,B0
141 [!B0] BNOP .S1 L10,5
192 SHL .S2 B4,2,B0
[all …]
Dremi.S22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
25 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
48 || xor .s2x B2, A1, B0
51 [B0] addkpc .s2 _divu_ret_1, B3, 1
52 [!B0] addkpc .s2 _divu_ret_2, B3, 1
Dmemcpy_64plus.S18 || AND .L2X 0x4,A6,B0
25 [B0] LDNW .D2T1 *B4++,A9
33 [B0] STNW .D1T1 A9,*A3++ ; return when len < 8
Dremu.S22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
25 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
56 cmpgt .l2 B1, 7, B0
62 || [B0] b .s1 _remu_loop
Ddivi.S22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
25 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
Ddivremi.S30 || xor .s2x B2, A1, B0
33 [B0] addkpc .s2 _divu_ret_1, B3, 1
34 [!B0] addkpc .s2 _divu_ret_2, B3, 1
Ddivu.S22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
25 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
71 cmpgt .l2 B1, 7, B0
76 || [B0] b .s1 _divu_loop
Dmpyll.S42 || mpy32u .m2x B5,A4,B1:B0 ; X0*Y1 (don't need upper 32-bits)
47 add .l1x A2,B0,A5
/arch/c6x/kernel/
Dentry.S51 STW .D2T2 B0,*SP--[2] ; save original B0
52 MVKL .S2 current_ksp,B0
53 MVKH .S2 current_ksp,B0
54 LDW .D2T2 *B0,B1 ; KSP
58 XOR .D2 SP,B1,B0 ; (SP ^ KSP)
59 LDW .D2T2 *+SP[1],B1 ; restore B0/B1
60 LDW .D2T2 *++SP[2],B0
61 SHR .S2 B0,THREAD_SHIFT,B0 ; 0 if already using kstack
62 [B0] STDW .D2T2 SP:DP,*--B1[1] ; user: save user sp/dp kstack
63 [B0] MV .S2 B1,SP ; and switch to kstack
[all …]
Dhead.S27 MVKL .S2 current_ksp,B0
28 MVKH .S2 current_ksp,B0
29 LDW .D2T2 *B0,B15
32 SHR .S2 B6,3,B0 ; number of dwords to clear
36 BDEC .S2 bss_loop,B0
38 CMPLT .L2 B0,0,B1
Dswitch_to.S28 || MVC .S2 ILC,B0
34 || STDW .D2T2 B1:B0,*+B5(THREAD_RICL_ICL)
67 MV .L2X A0,B0
70 MVC .S2 B0,ILC
/arch/blackfin/kernel/cplb-mpu/
DMakefile10 -ffixed-B0 -ffixed-B1 -ffixed-B2 -ffixed-B3
/arch/blackfin/kernel/cplb-nompu/
DMakefile10 -ffixed-B0 -ffixed-B1 -ffixed-B2 -ffixed-B3
/arch/blackfin/include/asm/
Ddpmc.h371 B0 = I0;
378 B0.L = lo(ICPLB_DATA0);
485 FP = B0;
513 B0 = I0;
520 B0.L = lo(ICPLB_DATA15);
526 FP = B0;
/arch/powerpc/include/uapi/asm/
Dtermbits.h121 #define B0 0000000 /* hang up */ macro
/arch/m32r/include/uapi/asm/
Dtermbits.h113 #define B0 0000000 /* hang up */ macro
/arch/ia64/include/uapi/asm/
Dtermbits.h122 #define B0 0000000 /* hang up */ macro
/arch/mn10300/include/uapi/asm/
Dtermbits.h114 #define B0 0000000 /* hang up */ macro
/arch/xtensa/include/uapi/asm/
Dtermbits.h130 #define B0 0000000 /* hang up */ macro
/arch/parisc/include/uapi/asm/
Dtermbits.h114 #define B0 0000000 /* hang up */ macro
/arch/avr32/include/uapi/asm/
Dtermbits.h113 #define B0 0000000 /* hang up */ macro
/arch/frv/include/uapi/asm/
Dtermbits.h114 #define B0 0000000 /* hang up */ macro
/arch/alpha/include/uapi/asm/
Dtermbits.h129 #define B0 0000000 /* hang up */ macro
/arch/mips/include/uapi/asm/
Dtermbits.h137 #define B0 0000000 /* hang up */ macro

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