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Searched refs:BB (Results 1 – 6 of 6) sorted by relevance

/arch/x86/crypto/sha-mb/
Dsha1_x8_avx2.S231 # ymm6 T0 BB
261 BB = %ymm6 define
361 vmovdqu B,BB
412 vpaddd BB,B,B
/arch/arm/boot/dts/
Dtegra30-cardhu.dtsi204 reset-gpio = <&gpio TEGRA_GPIO(BB, 0) GPIO_ACTIVE_LOW>;
460 gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
Dtegra20-colibri-512.dtsi510 gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
/arch/x86/include/asm/
Dperf_event_p4.h598 P4_GEN_ESCR_EMASK(P4_EVENT_TC_DELIVER_MODE, BB, 4),
/arch/powerpc/xmon/
Dppc-opc.c131 #define BB BAT + 1 macro
137 #define BBA BB + 1
3056 { "crnor", XL(19,33), XL_MASK, COM, { BT, BA, BB } },
3064 { "crandc", XL(19,129), XL_MASK, COM, { BT, BA, BB } },
3070 { "crxor", XL(19,193), XL_MASK, COM, { BT, BA, BB } },
3072 { "crnand", XL(19,225), XL_MASK, COM, { BT, BA, BB } },
3074 { "crand", XL(19,257), XL_MASK, COM, { BT, BA, BB } },
3079 { "creqv", XL(19,289), XL_MASK, COM, { BT, BA, BB } },
3083 { "crorc", XL(19,417), XL_MASK, COM, { BT, BA, BB } },
3088 { "cror", XL(19,449), XL_MASK, COM, { BT, BA, BB } },
/arch/x86/kernel/cpu/
Dperf_event_p4.c80 P4_ESCR_EMASK_BIT(P4_EVENT_TC_DELIVER_MODE, BB) |