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Searched refs:BSW_1 (Results 1 – 2 of 2) sorted by relevance

/arch/ia64/include/asm/native/
Dinst.h126 #define BSW_1(clob0, clob1) \ macro
/arch/ia64/kernel/
Divt.S846 BSW_1(r2, r14) // B (6 cyc) regs are saved, switch to bank 1