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Searched refs:CACHEW_INVALIDATE_L1DTLB (Results 1 – 2 of 2) sorted by relevance

/arch/metag/include/asm/
Dmetag_isa.h46 #define CACHEW_INVALIDATE_L1DTLB 0x2 macro
Dtbx.h1297 TBIXCACHE_WD(ADDR, CACHEW_INVALIDATE_L1DTLB)