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Searched refs:CAN0_INTR (Results 1 – 4 of 4) sorted by relevance

/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h1083 #define CAN0_INTR 0xffc02aa4 /* CAN Controller 0 Interrupt Pending Regist… macro
DcdefBF54x_base.h1868 #define bfin_read_CAN0_INTR() bfin_read16(CAN0_INTR)
1869 #define bfin_write_CAN0_INTR(val) bfin_write16(CAN0_INTR, val)
/arch/blackfin/mach-bf609/include/mach/
DdefBF60x_base.h111 #define CAN0_INTR 0xFFC00AA4 /* CAN0 Interrupt Pending Register */ macro
DcdefBF60x_base.h2502 #define bfin_read_CAN0_INTR() bfin_read16(CAN0_INTR)
2503 #define bfin_write_CAN0_INTR(val) bfin_write16(CAN0_INTR, val)