Searched refs:CIU_REG (Results 1 – 3 of 3) sorted by relevance
66 __raw_writel(0x0, CIU_REG(0x64)); in pm_scu_clk_disable()67 __raw_writel(0x0, CIU_REG(0x68)); in pm_scu_clk_disable()70 val = __raw_readl(CIU_REG(0x1c)); in pm_scu_clk_disable()72 __raw_writel(val, CIU_REG(0x1c)); in pm_scu_clk_disable()82 __raw_writel(0x03003003, CIU_REG(0x64)); in pm_scu_clk_enable()83 __raw_writel(0x00303030, CIU_REG(0x68)); in pm_scu_clk_enable()86 val = __raw_readl(CIU_REG(0x1c)); in pm_scu_clk_enable()88 __raw_writel(val, CIU_REG(0x1c)); in pm_scu_clk_enable()239 __raw_writel(__raw_readl(CIU_REG(0x8)) & ~(0x1 << 23), CIU_REG(0x8)); in mmp2_pm_init()
206 while (!(readl(CIU_REG(0x8)) & (1 << 16))) in pxa910_pm_enter()214 while (!(readl(CIU_REG(0x8)) & (1 << 16))) in pxa910_pm_enter()
44 #define CIU_REG(x) (CIU_VIRT_BASE + (x)) macro