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Searched refs:CVMX_CIU_INTX_EN1_W1S (Results 1 – 2 of 2) sorted by relevance

/arch/mips/cavium-octeon/
Docteon-irq.c443 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); in octeon_irq_ciu_enable_v2()
527 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); in octeon_irq_ciu_enable_local_v2()
624 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); in octeon_irq_ciu_enable_all_v2()
827 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); in octeon_irq_ciu_set_affinity_v2()
1036 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(coreid * 2 + 1), 1ull << coreid); in octeon_irq_ciu1_wd_enable_v2()
/arch/mips/include/asm/octeon/
Dcvmx-ciu-defs.h54 #define CVMX_CIU_INTX_EN1_W1S(offset) (CVMX_ADD_IO_SEG(0x0001070000006208ull) + ((offset) & 63) * 1… macro