Home
last modified time | relevance | path

Searched refs:CVMX_GPIO_BIT_CFGX (Results 1 – 3 of 3) sorted by relevance

/arch/mips/cavium-octeon/
Docteon-irq.c646 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd->gpio_line), cfg.u64); in octeon_irq_gpio_setup()
679 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd->gpio_line), 0); in octeon_irq_ciu_disable_gpio_v2()
689 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd->gpio_line), 0); in octeon_irq_ciu_disable_gpio()
1787 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd->gpio_line), 0); in octeon_irq_ciu2_disable_gpio()
Dsetup.c467 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(12), 1); in octeon_halt()
/arch/mips/include/asm/octeon/
Dcvmx-gpio-defs.h31 #define CVMX_GPIO_BIT_CFGX(offset) (CVMX_ADD_IO_SEG(0x0001070000000800ull) + ((offset) & 15) * 8) macro