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Searched refs:CVMX_PCIE_BAR1_PHYS_BASE (Results 1 – 4 of 4) sorted by relevance

/arch/mips/include/asm/octeon/
Dpci-octeon.h18 #define CVMX_PCIE_BAR1_PHYS_BASE ((1ull << 32) - (1ull << 28)) macro
/arch/mips/cavium-octeon/
Ddma-octeon.c33 …if (paddr >= CVMX_PCIE_BAR1_PHYS_BASE && paddr < (CVMX_PCIE_BAR1_PHYS_BASE + CVMX_PCIE_BAR1_PHYS_S… in octeon_hole_phys_to_dma()
34 return paddr - CVMX_PCIE_BAR1_PHYS_BASE + CVMX_PCIE_BAR1_RC_BASE; in octeon_hole_phys_to_dma()
42 return daddr + CVMX_PCIE_BAR1_PHYS_BASE - CVMX_PCIE_BAR1_RC_BASE; in octeon_hole_dma_to_phys()
Dsetup.c965 memory_exclude_page(CVMX_PCIE_BAR1_PHYS_BASE, in plat_mem_setup()
967 memory_exclude_page(CVMX_PCIE_BAR1_PHYS_BASE + in plat_mem_setup()
/arch/mips/pci/
Dpcie-octeon.c928 bar1_index.s.addr_idx = (CVMX_PCIE_BAR1_PHYS_BASE >> 22); in __cvmx_pcie_rc_initialize_gen1()
1411 bar1_index.s.addr_idx = (CVMX_PCIE_BAR1_PHYS_BASE >> 22); in __cvmx_pcie_rc_initialize_gen2()