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Searched refs:CVMX_POW_NW_TIM (Results 1 – 2 of 2) sorted by relevance

/arch/mips/cavium-octeon/
Dsetup.c619 cvmx_write_csr(CVMX_POW_NW_TIM, nm_tim.u64); in octeon_user_io_init()
/arch/mips/include/asm/octeon/
Dcvmx-pow-defs.h41 #define CVMX_POW_NW_TIM (CVMX_ADD_IO_SEG(0x0001670000000210ull)) macro