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Searched refs:D0Ar6 (Results 1 – 21 of 21) sorted by relevance

/arch/metag/tbx/
Dtbictxfpu.S52 MOV D0Ar6, TXENABLE
53 AND D0Ar6, D0Ar6, #(TXENABLE_CLASSALT_FPUR8 << TXENABLE_CLASS_S)
56 XOR D0Ar4, D0Ar4, D0Ar6
62 MOV D0Ar6, TXDEFR
63 LSR D0Re0, D0Ar6, #8
65 AND D0Ar6, D0Ar6, #LO(TXDEFR_FPE_ICTRL_BITS)
66 OR D0Re0, D0Re0, D0Ar6
69 MOV D0Ar6, TXMODE
70 ANDT D0Ar6, D0Ar6, #HI(TXMODE_FPURMODE_BITS)
71 ORT D0Ar6, D0Ar6, #HI(TXMODE_FPURMODEWRITE_BIT)
[all …]
Dtbitimer.S68 NEGS D0Ar6,D0Ar2 /* Set flags from time-stamp */
69 ASR D1Ar5,D0Ar6,#31 /* Sign extend D0Ar6 into D1Ar5 */
70 SETLNZ [A0.3],D0Ar6,D1Ar5 /* ___TBITime(B/I)=-Start if enable */
93 ADDS D0Re0,D0Ar4,D0Ar6 /* Add current time value */
117 ADD D0Re0,D0Ar2,D0Ar6 /* Regenerate new value = result */
149 MOV D0Re0,D0Ar6 /* Old value read = result */
150 SUB D0Ar2,D0Ar6,D0Ar2 /* Delta from (old - new) */
187 MOV D0Ar6,TXTIMER /* Always GET old value */
189 ADDNZ TXTIMER,D0Ar2,D0Ar6 /* Conditional ADD operation */
195 MOV D0Ar6,TXTIMERI /* Always GET old value */
[all …]
Dtbictx.S40 MOV D0Ar6,TXMASKI /* BGNDHALT currently enabled? */
46 OR D0Ar4,D0Ar4,D0Ar6 /* Or in TXMASKI BGNDHALT if set */
65 OR D0.6,D0Ar4,D0Ar6 /* Save TrigMask in D0.6 */
108 GETL D0Ar6,D1Ar5,[D1Ar1+#TBICTX_Ext_AX2] /* Get A0.2, A1.2 state */
113 SETL [A0.2++],D0Ar6,D1Ar5 /* Save A0.2, A1.2 state */
132 MOV D0Ar6,TXL1START
138 SETL [A0.2++],D0Ar6,D1Ar5 /* Save 8*1 bytes */
139 MOV D0Ar6,TXL1END
143 MSETL [A0.2],D0Ar6,D0FrT /* Save 8*2 bytes */
193 MOV D0Ar6,TXMRSIZE
[all …]
Dtbidspram.S45 DL MOV D0Ar6, [D0AR.0++]
48 MSETL [A0.3++], D0Re0, D0Ar6, D0Ar4, D0.5
79 DL MOV D0Ar6, [D0BR.0++]
82 MSETL [A0.3++], D0Re0, D0Ar6, D0Ar4, D0.5
112 MGETL D0Re0, D0Ar6, D0Ar4, D0.5, [A0.3++]
114 DL MOV [D0AW.0++], D0Ar6
146 MGETL D0Re0, D0Ar6, D0Ar4, D0.5, [A0.3++]
148 DL MOV [D0BW.0++], D0Ar6
Dtbilogf.S24 MSETL [A0StP],D0Ar6,D0Ar4,D0Ar2
39 MOV D0Ar6,#1
40 MSETL [A0StP],D0Ar6,D0Ar4,D0Ar2
Dtbipcx.S89 MOVT D0Ar6,#TBICTX_SOFT_BIT /* Only soft thread state */
90 ADD D0Ar6,D0Ar6,D0Ar2 /* Add in PRIV bit if requested */
91 SETL [A0.2],D0Ar6,D1Ar5 /* Push header fields */
93 MSETL [A0.3],D0Re0,D0Ar6,D0Ar4,D0Ar2,D0FrT,D0.5,D0.6,D0.7
94 MOV D0Ar6,#0
96 SETL [A0.3++],D0Ar6,D1Ar5 /* Zero CT register states */
97 SETL [A0.3++],D0Ar6,D1Ar5
142 MSETL [A1.2],D0Ar6,D0Ar4,D0Ar2,D0FrT,D0.5,D0.6,D0.7
150 MOVT D0Ar6,#TBICTX_CBRP_BIT
151 ORNZ D0Re0,D0Re0,D0Ar6 /* Set CBRP if RPDIRTY set */
[all …]
Dtbisoft.S90 MSETL [A0StP],D0Re0,D0Ar6,D0Ar4,D0Ar2,D0FrT,D0.5,D0.6,D0.7
152 MOV A0StP,D0Ar6 /* Stack = Frame */
154 MOV A0FrP,D0Ar6
192 MSETL [A0.2],D0Ar6,D0Ar4 /* Save extra initial args */
205 ADD D0Ar6,A0.2,#TBICTX_BYTES /* New A0StP */
210 MSETL [A0.2],D0Re0,D0Ar6,D0Ar4,D0Ar2,D0FrT,D0.5,D0.6,D0.7
215 MSETL [A0.2],D0Ar6,D0Ar4,D0Ar2,D0FrT D0_5 /* Set DX and then AX regs */
226 MGETL D0Re0,D0Ar6,D0Ar4,[A0FrP] /* Get hidden args */
Dtbidefr.S88 GETD D1RtP, [D0Ar6+D0Re0]
166 GETD D0Re0, [D0Ar6+D0Re0]
/arch/metag/lib/
Dmuldi3.S25 MULW D0Ar6,D0Ar2,D0Ar4 ! (c 2^16)(z 2^0)
26 LSR D1Ar5,D0Ar6,#16
27 LSL D0Ar6,D0Ar6,#16
28 ADDS D0Re0,D0Re0,D0Ar6
33 MULW D0Ar6,D0Ar2,D0Ar4 ! (c 2^16)(y 2^16)
34 ADD D1Re0,D1Re0,D0Ar6
37 MULW D0Ar6,D0Ar2,D0Ar4 ! (d 2^0)(y 2^16)
38 LSR D1Ar5,D0Ar6,#16
39 LSL D0Ar6,D0Ar6,#16
40 ADDS D0Re0,D0Re0,D0Ar6
Dmemcpy.S65 GETL D0Ar6, D1Ar5, [A1.2++]
67 SETL [A0.2++], D0Ar6, D1Ar5
69 GETL D0Ar6, D1Ar5, [A1.2++]
71 SETL [A0.2++], D0Ar6, D1Ar5
85 MOV D0Ar6, A1.2
89 SUBS D0Ar6, D0Ar6, D0Ar4
90 MOV D0Ar4, D0Ar6
101 CMP D0Ar6, #4
107 SUB D0Ar6, D0Ar6, #4
110 ! D0Ar6 = bit offset, D1Ar5 = (32 - bit offset)
[all …]
Ddiv64.S25 ADDS D0Ar6,D0Ar4,D0Ar4
29 CMPEQ D0Ar6,D0Ar4
32 MOV D0Ar4,D0Ar6
42 MOV D0Ar6,#0
43 MOV D1Ar5,D0Ar6
50 ADDS D0Ar6,D0Ar6,D0Re0
69 MOV D0Re0,D0Ar6
Dmemmove.S80 MOV D0Ar6, A1.2
89 SUB D0Ar6, D0Ar4, D0Ar6
90 MOVS D0Ar4, D0Ar6
98 CMP D0Ar6, #4
103 SUB D0Ar6, D0Ar6, #4
105 MULW D1.6, D0Ar6, #8
145 MULW D1.6, D0Ar6, #8
244 MOV D0Ar6, A1.2
249 SUB D0Ar6, D0Ar6, D0Ar4
251 MOVS D0Ar4, D0Ar6
[all …]
Dcopy_page.S14 GETL D0Ar6,D1Ar5,[D0Ar2++]
16 SETL [D1Ar1++],D0Ar6,D1Ar5
Ddivsi3.S62 !! D0Ar6 is curbit which is set to 1 at the start and shifted up
68 MOV D0Ar6,#1 ! Set curbit to 1
82 LSLGT D0Ar6,D0Ar6,D0Ar2 ! ( > 0) ? left shift curbit
91 ADDCC D0Re0, D0Re0, D0Ar6 ! If yes result += curbit
93 LSRS D0Ar6, D0Ar6, #1 ! Shift down curbit, is it zero?
Dashldi3.S22 LSR D0Ar6,D0Re0,D0Ar4 ! TMP= LO >> -(COUNT - 32)
23 OR D1Re0,D1Re0,D0Ar6 ! HI = HI | TMP
Dlshrdi3.S23 LSL D0Ar6,D1Re0,D1Ar3 ! TMP= HI << -(COUNT - 32)
24 OR D0Re0,D0Re0,D0Ar6 ! LO = LO | TMP
Dashrdi3.S23 LSL D0Ar6,D1Re0,D1Ar3 ! TMP= HI << -(COUNT - 32)
24 OR D0Re0,D0Re0,D0Ar6 ! LO = LO | TMP
/arch/metag/kernel/
Dftrace_stub.S19 MSETL [A0StP], D0Ar6, D0Ar4, D0Ar2, D0.4
31 GETL D0Ar6, D1Ar5, [A0StP++#(-8)]
38 MSETL [A0StP], D0Ar6, D0Ar4, D0Ar2, D0.4
55 GETL D0Ar6, D1Ar5, [A0StP++#(-8)]
Dtbiunexp.S15 MSETL [A0StP],D0Ar6,D0Ar4,D0Ar2 ! Save args on stack
Dhead.S30 MOV D0Ar6,#0
/arch/metag/include/asm/
Dmetag_regs.h85 #define D0Ar6 D0.1 macro