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Searched refs:DCPLB_DATA0 (Results 1 – 7 of 7) sorted by relevance

/arch/blackfin/kernel/cplb-mpu/
Dcplbmgr.c167 bfin_write32(DCPLB_DATA0 + idx * 4, d_data); in dcplb_miss()
293 bfin_write32(DCPLB_DATA0 + idx * 4, data); in dcplb_protection_fault()
334 bfin_write32(DCPLB_DATA0 + i * 4, 0); in flush_switched_cplbs()
373 bfin_write32(DCPLB_DATA0 + i * 4, d_data); in set_mask_dcplbs()
/arch/blackfin/mach-common/
Dcache-c.c80 bfin_cache_init(dcplb_tbl, DCPLB_ADDR0, DCPLB_DATA0, DMEM_CONTROL, in bfin_dcache_init()
/arch/blackfin/kernel/cplb-nompu/
Dcplbmgr.c43 bfin_write32(DCPLB_DATA0 + idx * 4, data); in write_dcplb_data()
/arch/blackfin/include/asm/
Ddpmc.h376 I2.L = lo(DCPLB_DATA0);
446 PM_PUSH(2, DCPLB_DATA0)
584 PM_POP(2, DCPLB_DATA0)
Dcdef_LPBlackfin.h60 #define bfin_read_DCPLB_DATA0() bfin_read32(DCPLB_DATA0)
61 #define bfin_write_DCPLB_DATA0(val) bfin_write32(DCPLB_DATA0,val)
Ddef_LPBlackfin.h294 #define DCPLB_DATA0 0xFFE00200 /* Data Cache 0 Status */ macro
/arch/blackfin/kernel/
Ddebug-mmrs.c653 D32(DCPLB_DATA0); in bfin_debug_mmrs_init()