Searched refs:DMA17_IRQ_STATUS (Results 1 – 6 of 6) sorted by relevance
573 #define DMA17_IRQ_STATUS 0xFFC01E68 /* DMA Channel 17 Interrupt/Status Register */ macro
950 #define bfin_read_DMA17_IRQ_STATUS() bfin_read16(DMA17_IRQ_STATUS)951 #define bfin_write_DMA17_IRQ_STATUS(val) bfin_write16(DMA17_IRQ_STATUS, val)
786 #define DMA17_IRQ_STATUS 0xffc01d68 /* DMA Channel 17 Interrupt/Status Register … macro
1326 #define bfin_read_DMA17_IRQ_STATUS() bfin_read16(DMA17_IRQ_STATUS)1327 #define bfin_write_DMA17_IRQ_STATUS(val) bfin_write16(DMA17_IRQ_STATUS, val)
1887 #define DMA17_IRQ_STATUS 0xFFC07230 /* DMA17 Status Register */ macro
976 #define bfin_read_DMA17_IRQ_STATUS() bfin_read32(DMA17_IRQ_STATUS)977 #define bfin_write_DMA17_IRQ_STATUS(val) bfin_write32(DMA17_IRQ_STATUS, val)