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Searched refs:DMA1_10_CONFIG (Results 1 – 2 of 2) sorted by relevance

/arch/blackfin/mach-bf561/include/mach/
DdefBF561.h453 #define DMA1_10_CONFIG 0xFFC01E88 /* DMA1 Channel 10 Configuration register */ macro
DcdefBF561.h787 #define bfin_read_DMA1_10_CONFIG() bfin_read16(DMA1_10_CONFIG)
788 #define bfin_write_DMA1_10_CONFIG(val) bfin_write16(DMA1_10_CONFIG,val)