Searched refs:DMA1_CONFIG (Results 1 – 14 of 14) sorted by relevance
200 #define DMA1_CONFIG 0xFFC00C48 /* DMA Channel 1 Configuration Register */ macro
168 #define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)169 #define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG,val)
237 #define DMA1_CONFIG 0xFFC00C48 /* DMA Channel 1 Configuration Register */ macro
404 #define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)405 #define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG, val)
421 #define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)422 #define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG, val)
213 #define DMA1_CONFIG 0xFFC00C48 /* DMA Channel 1 Configuration Register … macro
383 #define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)384 #define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG,val)
214 #define DMA1_CONFIG 0xFFC00C48 /* DMA Channel 1 Configuration Register */ macro
516 #define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)517 #define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG, val)
225 #define DMA1_CONFIG 0xffc00c48 /* DMA Channel 1 Configuration Register */ macro
342 #define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)343 #define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG, val)
1543 #define DMA1_CONFIG 0xFFC41088 /* DMA1 Configuration Register */ macro
368 #define bfin_read_DMA1_CONFIG() bfin_read32(DMA1_CONFIG)369 #define bfin_write_DMA1_CONFIG(val) bfin_write32(DMA1_CONFIG, val)