Home
last modified time | relevance | path

Searched refs:DMA9_CURR_X_COUNT (Results 1 – 12 of 12) sorted by relevance

/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h358 #define DMA9_CURR_X_COUNT 0xFFC00E70 /* DMA Channel 9 Current X Count Register */ macro
DcdefBF512.h638 #define bfin_read_DMA9_CURR_X_COUNT() bfin_read16(DMA9_CURR_X_COUNT)
639 #define bfin_write_DMA9_CURR_X_COUNT(val) bfin_write16(DMA9_CURR_X_COUNT, val)
/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h358 #define DMA9_CURR_X_COUNT 0xFFC00E70 /* DMA Channel 9 Current X Count Register */ macro
DcdefBF522.h655 #define bfin_read_DMA9_CURR_X_COUNT() bfin_read16(DMA9_CURR_X_COUNT)
656 #define bfin_write_DMA9_CURR_X_COUNT(val) bfin_write16(DMA9_CURR_X_COUNT, val)
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h334 #define DMA9_CURR_X_COUNT 0xFFC00E70 /* DMA Channel 9 Current X Count Register … macro
DcdefBF534.h617 #define bfin_read_DMA9_CURR_X_COUNT() bfin_read16(DMA9_CURR_X_COUNT)
618 #define bfin_write_DMA9_CURR_X_COUNT(val) bfin_write16(DMA9_CURR_X_COUNT,val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h463 #define DMA9_CURR_X_COUNT 0xFFC01C70 /* DMA Channel 9 Current X Count Register */ macro
DcdefBF538.h746 #define bfin_read_DMA9_CURR_X_COUNT() bfin_read16(DMA9_CURR_X_COUNT)
747 #define bfin_write_DMA9_CURR_X_COUNT(val) bfin_write16(DMA9_CURR_X_COUNT, val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h362 #define DMA9_CURR_X_COUNT 0xffc00e70 /* DMA Channel 9 Current X Count Register */ macro
DcdefBF54x_base.h592 #define bfin_read_DMA9_CURR_X_COUNT() bfin_read16(DMA9_CURR_X_COUNT)
593 #define bfin_write_DMA9_CURR_X_COUNT(val) bfin_write16(DMA9_CURR_X_COUNT, val)
/arch/blackfin/mach-bf609/include/mach/
DdefBF60x_base.h1720 #define DMA9_CURR_X_COUNT 0xFFC414B4 /* DMA9 Current Count(1D) or intra-row X… macro
DcdefBF60x_base.h682 #define bfin_read_DMA9_CURR_X_COUNT() bfin_read32(DMA9_CURR_X_COUNT)
683 #define bfin_write_DMA9_CURR_X_COUNT(val) bfin_write32(DMA9_CURR_X_COUNT, val)