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Searched refs:DSCR_CMD0_SW (Results 1 – 2 of 2) sorted by relevance

/arch/mips/include/asm/mach-au1x00/
Dau1xxx_dbdma.h233 #define DSCR_CMD0_SW(x) (((x) & 0x3) << 18) macro
/arch/mips/alchemy/common/
Ddbdma.c462 cmd0 |= DSCR_CMD0_SW(DSCR_CMD0_BYTE); in au1xxx_dbdma_ring_alloc()
465 cmd0 |= DSCR_CMD0_SW(DSCR_CMD0_HALFWORD); in au1xxx_dbdma_ring_alloc()
469 cmd0 |= DSCR_CMD0_SW(DSCR_CMD0_WORD); in au1xxx_dbdma_ring_alloc()