Home
last modified time | relevance | path

Searched refs:EBIU_DDRBRC0 (Results 1 – 3 of 3) sorted by relevance

/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h174 #define EBIU_DDRBRC0 0xffc00a60 /* DDR Bank0 Read Count Register */ macro
DcdefBF54x_base.h249 #define bfin_read_EBIU_DDRBRC0() bfin_read32(EBIU_DDRBRC0)
250 #define bfin_write_EBIU_DDRBRC0(val) bfin_write32(EBIU_DDRBRC0, val)
/arch/blackfin/kernel/
Ddebug-mmrs.c907 D32(EBIU_DDRBRC0); in bfin_debug_mmrs_init()