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Searched refs:EBIU_DDRBRC1 (Results 1 – 3 of 3) sorted by relevance

/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h175 #define EBIU_DDRBRC1 0xffc00a64 /* DDR Bank1 Read Count Register */ macro
DcdefBF54x_base.h251 #define bfin_read_EBIU_DDRBRC1() bfin_read32(EBIU_DDRBRC1)
252 #define bfin_write_EBIU_DDRBRC1(val) bfin_write32(EBIU_DDRBRC1, val)
/arch/blackfin/kernel/
Ddebug-mmrs.c908 D32(EBIU_DDRBRC1); in bfin_debug_mmrs_init()