Searched refs:EBIU_DDRBWC3 (Results 1 – 3 of 3) sorted by relevance
185 #define EBIU_DDRBWC3 0xffc00a8c /* DDR Bank3 Write Count Register */ macro
271 #define bfin_read_EBIU_DDRBWC3() bfin_read32(EBIU_DDRBWC3)272 #define bfin_write_EBIU_DDRBWC3(val) bfin_write32(EBIU_DDRBWC3, val)
918 D32(EBIU_DDRBWC3); in bfin_debug_mmrs_init()