Searched refs:EBIU_DDRBWC5 (Results 1 – 3 of 3) sorted by relevance
187 #define EBIU_DDRBWC5 0xffc00a94 /* DDR Bank5 Write Count Register */ macro
275 #define bfin_read_EBIU_DDRBWC5() bfin_read32(EBIU_DDRBWC5)276 #define bfin_write_EBIU_DDRBWC5(val) bfin_write32(EBIU_DDRBWC5, val)
920 D32(EBIU_DDRBWC5); in bfin_debug_mmrs_init()