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Searched refs:EBIU_DDRGC1 (Results 1 – 3 of 3) sorted by relevance

/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h194 #define EBIU_DDRGC1 0xffc00ab4 /* DDR Grant Count 1 Register */ macro
DcdefBF54x_base.h289 #define bfin_read_EBIU_DDRGC1() bfin_read32(EBIU_DDRGC1)
290 #define bfin_write_EBIU_DDRGC1(val) bfin_write32(EBIU_DDRGC1, val)
/arch/blackfin/kernel/
Ddebug-mmrs.c928 D32(EBIU_DDRGC1); in bfin_debug_mmrs_init()