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Searched refs:EXYNOS3_PAD_RETENTION_MMC2_SYS_PWR_REG (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
Dregs-pmu.h296 #define EXYNOS3_PAD_RETENTION_MMC2_SYS_PWR_REG 0x1218 macro
Dpmu.c117 { EXYNOS3_PAD_RETENTION_MMC2_SYS_PWR_REG, { 0x1, 0x1, 0x0} },