Home
last modified time | relevance | path

Searched refs:EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-exynos/
Dpmu.c412 { EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG, { 0x1, 0x0, 0x0} },
530 { EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
Dregs-pmu.h430 #define EXYNOS5_GPIO_MODE_SYSMEM_SYS_PWR_REG 0x1320 macro